JPH03257911A - Chip type multilayer ceramic capacitor - Google Patents

Abstract

PURPOSE:To prevent the generation of cracks in an inner electrode of ceramic dielectric, and increase the mounting density on a printed board, by alternately arranging inner electrodes in the vertical direction, connecting the inner electrodes of one side with a first outer electrode, connecting the inner electrodes of the other side with a second outer electrode, and connecting electrodes for connection use positioned in the vertical direction with the first and the second electrodes. CONSTITUTION:First and second inner electrodes 2 are alternately arranged in the vertical direction. Electrodes 7 for connection use are connected with a substratum electrode 4, an intermediate electrode 5, and outer electrodes 6, and arranged in the vertical direction. When a capacitor is arranged on a printed board, the outer electrode of one side, which electrode is covered with insulator 8, is mounted on the board surface, and the electrodes 7 for connection use, which are positioned in the vertical direction, are soldered with a conductor pattern. By this constitution, cracks are not generated, and the occupied area on the printed board can be reduced, so that high degree integration can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a chip-type multilayer ceramic capacitor that can be used in electronic circuits of electronic communication equipment such as television receivers, video tape recorders, and audio equipment.

BACKGROUND OF THE INVENTION In a conventional chip-type multilayer ceramic capacitor mounted on a printed circuit board, as shown in FIG. It is given.

This chip-type multilayer ceramic capacitor is mounted on a printed circuit board using a mounting machine.

Problems to be Solved by the Invention However, in the case of conventional chip-type multilayer ceramic capacitors, as the capacitance increases, the spacing between the internal electrode layers becomes narrower, and when mounted on a printed circuit board, the ceramic dielectric and internal electrodes are damaged due to thermal shock. There is a problem with cranking. Furthermore, this chip-type multilayer capacitor requires a large mounting area, and there is a limit to high-density mounting.

In view of the above-mentioned problems, it is an object of the present invention to provide a chip-type multilayer ceramic capacitor that can prevent cracks in ceramic dielectrics, increase packaging density, and allow a wide range of circuits to be incorporated into printed circuit boards. be.

Means for Solving RB In the chip-type multilayer ceramic capacitor according to the present invention, fixed internal electrodes are vertically arranged and staggered, one internal electrode is connected to the first external electrode, and the other internal electrode is connected to the first external electrode. connecting the inner electrode to the second outer electrode; connecting connection electrodes located perpendicularly to the second external electrodes, respectively;
This is a chip-type multilayer capacitor molded with a ceramic dielectric using the above connection electrode.

Operation By adopting the above-described configuration, the present invention prevents cranking of the ceramic dielectric material due to thermal shock and reduces the distance between electrodes on the printed circuit board by 172 to 1/2 when mounted on a printed circuit board.
3, and the printed circuit board can be made compact in terms of circuit formation.

EXAMPLE Hereinafter, a chip type multilayer capacitor according to an example of the present invention will be described with reference to FIGS. 1a and 1b.

Reference numeral 1 indicates internal electrodes arranged vertically, and 2 indicates first and second internal electrodes, which are arranged vertically and alternately. 3 is a dielectric filled between the internal electrodes 1 and 2, 4 is a base electrode to which the first internal electrode 2 or the second internal electrode 2 is commonly connected, and 5 is an intermediate connected to the base electrode 4. The sixth electrode is an external electrode connected to the intermediate electrode 5. Reference numeral 7 denotes connection electrodes, which are connected to the base electrode 4, the intermediate electrode 5. It has the same electrode configuration as the external electrode 6, and is connected thereto and provided in the vertical direction. 8 is an insulator for insulating the external electrode 6 and the connection electrode 7. When this capacitor is arranged on a printed circuit board, one of the external electrodes 6 covered with the insulator 8 is placed on the surface of the board, and the connection electrodes 7 located in the vertical direction are soldered to the conductive pattern. With this configuration, cracks do not occur, and the area occupied on the printed circuit board is small, allowing for high integration.

Effects of the Invention As described above, according to the present invention, unchangeable internal electrodes are arranged vertically and alternately, one internal electrode is connected to the first external electrode, and the other internal electrode is connected to the first external electrode. the second external electrode; By connecting connection electrodes located perpendicularly to the second external electrode and constructing a chip-type multilayer capacitor molded with ceramic dielectric using the connection electrodes, ceramic dielectric internal electrode cranking is prevented. At the same time, it is possible to increase the mounting density on the printed circuit board, and it is also possible to increase the density of the circuit configuration.

[Brief explanation of drawings]

1A and 1B are cross-sectional views of a chip-type multilayer ceramic capacitor according to an embodiment of the present invention, and FIG. 2 is a perspective view of a conventional ceramic capacitor. 1... Internal electrodes arranged vertically, 2...
...First. second internal electrode, 3...dielectric, 4...base electrode, 5...intermediate electrode,
6... External electrode, 7... Connection electrode,
8...Insulator.

Claims (1)

[Claims] Invariant internal electrodes are vertically arranged and staggered, one internal electrode is connected to a first external electrode, the other internal electrode is connected to a second external electrode, and the first and second external electrodes are connected to each other. A chip-type multilayer ceramic capacitor in which connecting electrodes located vertically are connected to the external electrodes of No. 2 and molded with a ceramic dielectric using the connecting electrodes.