JPH03257870A - Schottky barrier diode - Google Patents

Schottky barrier diode

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Publication number
JPH03257870A
JPH03257870A JP5598490A JP5598490A JPH03257870A JP H03257870 A JPH03257870 A JP H03257870A JP 5598490 A JP5598490 A JP 5598490A JP 5598490 A JP5598490 A JP 5598490A JP H03257870 A JPH03257870 A JP H03257870A
Authority
JP
Japan
Prior art keywords
metal
voltage
depletion layer
schottky barrier
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5598490A
Other languages
Japanese (ja)
Inventor
Takashi Suga
菅 孝
Masaru Wakatabe
勝 若田部
Shinji Kuri
伸治 九里
Hiroaki Iwaguro
弘明 岩黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP5598490A priority Critical patent/JPH03257870A/en
Publication of JPH03257870A publication Critical patent/JPH03257870A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make a recombination current value approximately constant in a voltage region higher than a pinch off voltage (Vp) by providing metal having high phiR to a bottom section and a side of a recessed section of an irregular semiconductor surface and by providing metal having low phi to an approximately planar surface of the upper part of a projecting section. CONSTITUTION:When a backward voltage is applied, a recombination current in a depletion layer extending from a junction formed by a metal 2 occupies a large part of a backward current until a depletion layer (i) spreading from a metal 1 fills a width (a) of a projecting section. Electric field E applied to a Schottky barrier junction formed by the metal 2 is almost fixed from VP and a depletion layer (ii) wherein the width (a) of the projecting section is buried by a depletion layer which extends from a junction of the metal 1. If a voltage is further applied after VP, a recombination current between a depletion layer (iii) which extends from the metal 1 until a breakdown voltage VR and a delpletion layer formed by a metal having a large phiB value becomes a relatively small leak current value.

Description

【発明の詳細な説明】 本発明は従来のものより更に整流特性が良好であって損
失の少ないショットキバリアダイオードに関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Schottky barrier diode which has better rectification characteristics and less loss than conventional ones.

メタルと半導体との接触により生ずる電位障壁を利用し
て整流する第1図の如き構造をもつショットキバリアダ
イオード(図において(6)はシリコン基板、(4)は
エピタキシャル層、(1)はバリヤメタル)は、他のダ
イオードに比して高速かつ正方向立上り電圧が低く低損
失であることから電力用として多く用いられている。特
に最近における集積回路の駆動電圧の低圧化はその必要
をとみに高めつつあり、更に低損失のショットキバリア
ダイオードへの要求が強い。
A Schottky barrier diode has a structure as shown in Figure 1, which rectifies using the potential barrier created by contact between metal and semiconductor (in the figure, (6) is a silicon substrate, (4) is an epitaxial layer, and (1) is a barrier metal). These diodes are often used for power applications because they are faster, have a lower positive rising voltage, and have lower losses than other diodes. In particular, the recent demand for lower driving voltages for integrated circuits has been increasing, and there is a strong demand for Schottky barrier diodes with even lower losses.

これを実現するためには正方向電圧降下と逆方向電流が
現在のものより小さく、グイヤオードの損失即ち正、方
向損失と逆方向損失の和の小さい整流特性の良好なもの
の実現が必要である。しかし、ショットキバリアダイオ
ードの正方向電圧降下と逆方向電流は第2図に示す定性
的な関係図のように、シゴットキ接合を形成するバリヤ
メタルの材質によって決定される。一般には正方向電圧
降下の小さいものは逆方向電流が大きく、逆方向電流の
小なるものは正方向電圧降下が大きいと云う正逆相反す
る特性を有する。
In order to achieve this, it is necessary to realize a rectifier with good rectification characteristics, which has smaller forward voltage drop and reverse current than the current ones, and has small Guyaode loss, that is, the sum of forward and reverse direction losses. However, the forward voltage drop and reverse current of the Schottky barrier diode are determined by the material of the barrier metal forming the Schottky junction, as shown in the qualitative relationship diagram shown in FIG. In general, a device with a small forward voltage drop has a large reverse current, and a device with a small reverse current has a large forward voltage drop, which are contradictory characteristics.

例えば正方向電圧降下を従来知られているメタルで見れ
ば、第2図のようにチタン(Ti)、りロム(Cr )
 、現在最も多く用いられているモリブデン(M o 
)の順序で大となって正方向損失を大とする傾向を示す
、一方逆方向電流は上記とは逆にモリブデン(Mo )
 、クロム(Cr)、チタン(Ti)の順序で大となっ
て逆方向損失を増大させる傾向をもつ。
For example, if we look at the positive direction voltage drop in conventionally known metals, as shown in Figure 2, titanium (Ti), lithium-ion (Cr)
, molybdenum (Mo
), which tends to increase the forward loss, while the reverse current tends to increase in the order of
, chromium (Cr), and titanium (Ti), which tend to increase the reverse direction loss.

従って損失が正方向と逆方向損失の和で与えられるダイ
オードにおいては、正逆両方向損失の兼ね合いによって
最も低損失が実現される材質を選ばざるを得ず、現状で
はモリブデン(Mo)が最も多く用いられている。しか
し現在以上に低損失のショットキバリヤダイオードを現
状の構造によって実現するには、新しい材質の開拓など
の難しい課題が解決されなければならない。
Therefore, for diodes whose loss is given by the sum of forward and reverse losses, it is necessary to choose a material that achieves the lowest loss by balancing both forward and reverse losses, and currently molybdenum (Mo) is the most commonly used material. It is being However, in order to realize a Schottky barrier diode with even lower loss using the current structure, difficult issues such as the development of new materials must be solved.

そこで本願出願人は先にチタン(Ti)等の正ダイオー
ドを提案した。(特願平1−146573号)本発明は
係るダイオードの改良に関するもので、半導体基板の表
面にショットキバリアを形成する金属を有する半導体装
置において、バリア高さ(φ■)の異なる複数の金属が
凹凸形状の半導体表面に設けてあり、前記凹部の底部及
び側面には高いφ■を有する金属を設け又、前記凸部の
上部の略平面には低いφを有する金属を設けたことを特
徴とする。
Therefore, the applicant of the present application previously proposed a positive diode made of titanium (Ti) or the like. (Japanese Patent Application No. 1-146573) The present invention relates to an improvement of such a diode, and in a semiconductor device having a metal forming a Schottky barrier on the surface of a semiconductor substrate, a plurality of metals having different barrier heights (φ■) are used. It is provided on an uneven semiconductor surface, and a metal having a high φ is provided on the bottom and side surfaces of the concave portion, and a metal having a low φ is provided on a substantially flat surface of the upper portion of the convex portion. do.

第3図(a)(b)は本発明の一実施例を示す平面図及
び断面図、第4図はその動作説明図でAさφ1.の大き
な金属、2はバリア高さφ。の小さな金属、3は表面保
護膜、4は半導体(例えばN型シリコン結晶)、5は半
導体4の中に形成された4とは反対の導電型層で、−射
的にはガードリング、と呼ばれる領域である。6は4と
同じ導電型の低抵抗半導体層、7は電極金属である。
3(a) and 3(b) are a plan view and a sectional view showing an embodiment of the present invention, and FIG. 4 is an explanatory diagram of its operation. 2 is the barrier height φ. 3 is a surface protective film, 4 is a semiconductor (for example, N-type silicon crystal), and 5 is a layer of conductivity type opposite to that of 4 formed in the semiconductor 4, which is radiationally referred to as a guard ring. This is an area called 6 is a low resistance semiconductor layer of the same conductivity type as 4, and 7 is an electrode metal.

なお半導体4の表面は凹凸形状に形成され、凹部の底部
と側面をバリア高さφ1.の大なる金属で接合を形成し
、凸部上部の略平面をバリア高さφ8の小さな金属で接
合を形成し、配置しである。
Note that the surface of the semiconductor 4 is formed in an uneven shape, and the bottom and side surfaces of the recesses are formed with a barrier height of φ1. A bond is formed with a metal having a large barrier height of φ8, and a bond is formed with a metal having a small barrier height of φ8 on the substantially flat surface of the upper portion of the convex portion.

因みにバリア高さφ、はTi (0,5ev)、Cr 
(0,61ev)、Mo (0,88ev)Al (0
,74ev)、Au (0,8ev)、次に本発明構造
のショットキバリアダイオードの動作原理を以下に説明
する。
Incidentally, the barrier height φ is Ti (0,5ev), Cr
(0,61ev), Mo (0,88ev) Al (0
, 74ev), Au (0,8ev).Next, the operating principle of the Schottky barrier diode having the structure of the present invention will be explained below.

本構造はいわば小バリア高さのショットキバリアダイオ
ードと、大バリア高さのショットキバリアダイオードを
併動接続した等価回路で表現される。
This structure is expressed as an equivalent circuit in which a Schottky barrier diode with a small barrier height and a Schottky barrier diode with a large barrier height are connected in parallel.

従って、A電極が正、B電極が負の順方向電界が印加さ
れると、まず、小バリア高さの接合部においてバリア高
さの大きな接合よりも先に電子が半導体4から金属2に
流れ込む、金属2をTi、金属1をAIで形成した場合
には電流密度200A/−程度までは、はとんど小バリ
ア高さショットキバリアダイオードのJFVP特性が支
配的になる。そして電流密度300A/car以上でよ
うやく大バリア高さショットキダイオードの接合面積及
びバリア高さφ■を横切る順方向電流の重なりが、小バ
リア接合面積で大電流順方向電流が流れ難いのを補助す
るように効いてくる。
Therefore, when a forward electric field is applied, with the A electrode being positive and the B electrode being negative, electrons first flow from the semiconductor 4 to the metal 2 in the junction with a small barrier height than in the junction with a large barrier height. When the metal 2 is made of Ti and the metal 1 is made of AI, the JFVP characteristics of a Schottky barrier diode with a small barrier height become dominant up to a current density of about 200 A/-. Then, at a current density of 300 A/car or more, the overlap of the forward current across the junction area of the large barrier height Schottky diode and the barrier height φ■ helps the difficulty in flowing a large forward current with a small barrier junction area. It works like this.

従って、本発明構造では従来構造SBD特性と較べると
、順方向特性は若干劣る。
Therefore, in the structure of the present invention, the forward direction characteristics are slightly inferior compared to the SBD characteristics of the conventional structure.

一方逆方向特性は、A電極に負、B電極が正に印加され
ると、金属/半導体接合がら空乏層が半導体側に形成さ
れ、逆方向印加電圧の上昇と伴に拡がって来る。
On the other hand, in the reverse direction characteristic, when a negative voltage is applied to the A electrode and a positive voltage is applied to the B electrode, a depletion layer is formed on the semiconductor side due to the metal/semiconductor junction, and expands as the reverse applied voltage increases.

しかしながら、ショットキバリア高さφ■の大きな接合
はど空乏層Wの拡り巾は大きく、なおかつ空乏層内での
再結合電流はφ■が大きい程小さい、もちろん、接合面
積も小さければ逆方向漏れ電流は小さくなる。
However, the width of the depletion layer W at a junction with a large Schottky barrier height φ■ is large, and the recombination current within the depletion layer is smaller as φ■ becomes larger.Of course, if the junction area is small, reverse leakage occurs. The current becomes smaller.

逆方向電圧が印加されると、第4図に示すように金属l
から拡がって来る空乏層(イ)が凸部の巾aを埋めるま
では金属2が形成する接合から伸びてくる空乏層内での
再結合電流が逆方向電流の大部分を占める。
When a reverse voltage is applied, the metal l
The recombination current within the depletion layer extending from the junction formed by the metal 2 accounts for most of the reverse current until the depletion layer (a) expanding from the junction fills the width a of the convex portion.

凸部の巾aが金属1の接合から伸びてくる空乏層で埋め
られた(口)、ピンチオフ電圧■、からは、金属2が形
成するショットキバリア接合にかかる電界Eはほぼ固定
され、その後逆方向電圧が大きくなっても金属2接合の
電界Eは増大しないため、はぼ金属2ショットキバリア
を横切る再結合電流JgI、J2は■2よりも高い電圧
領域でほぼ一定値となる。
Since the width a of the convex portion is filled with a depletion layer extending from the metal 1 junction (mouth) and the pinch-off voltage ■, the electric field E applied to the Schottky barrier junction formed by metal 2 is almost fixed, and then reversed. Even if the directional voltage increases, the electric field E at the two-metal junction does not increase, so the recombination currents JgI and J2 that cross the two-metal Schottky barrier have approximately constant values in the voltage region higher than (2).

いいかえれば、小さなショットキバリア高さφ■の接合
を横切る漏れ電流を、■、電圧以後は小さな値に抑える
ことが出来る。
In other words, the leakage current across the junction with a small Schottky barrier height φ■ can be suppressed to a small value after the voltage ■.

■、後も電圧印加すると、金属1から伸びる空乏層は電
圧降伏Vnするまで伸びる(ハ)が大きなφ8値を持つ
金属が形成する空乏層の再結合電流JIIIIJIは比
較的小さい漏れ電流値となる。
■If voltage is applied again after that, the depletion layer extending from metal 1 will extend until the voltage breakdown Vn (c), but the recombination current JIIIJI of the depletion layer formed by the metal with a large φ8 value will be a relatively small leakage current value. .

〈実施例〉 NをシリコンエピタキシアルウェハーにTi膜(φn”
0. 5 e v )とALIf4(φn=0.74e
V)を形成する例を以下に説明する。
<Example> N is deposited on a silicon epitaxial wafer with a Ti film (φn”
0. 5 e v ) and ALIf4 (φn=0.74e
An example of forming V) will be described below.

ヒ素不純物原子をドープした比抵抗0.003Ω・■厚
さ400μm (u)のシリコン基板上にリンを不純物
原子とした比抵抗0.5Ω・国のエピタキシアルシリコ
ン層を6μm(i)堆積させる。
On a silicon substrate doped with arsenic impurity atoms with a specific resistance of 0.003 Ω and a thickness of 400 μm (u), an epitaxial silicon layer with a specific resistance of 0.5 Ω and a thickness of 6 μm (i) with phosphorus as an impurity atom is deposited.

スチーム酸化処理で約1μm厚さのS i O*膜を形
成し、1次写真処理でカードリング部分のみの酸化膜を
除去する第1次の写真処理を行う、その後、バッファエ
ッチ液でガードリング部を窓開部P″″″拡散m(c)
を形成する。
A SiO* film with a thickness of approximately 1 μm is formed by steam oxidation treatment, and a first photo process is performed to remove the oxide film only on the card ring area.Then, the guard ring is removed using a buffer etchant. The window opening P″″″diffusion m(c)
form.

次に、第2次写真を施し、Tiを蒸着する領域の酸化膜
を除去し、なおかつTiの蒸着に先立って、種々の結晶
格子歪みを含んでいる表面Siを約1000〜2000
人エツチングして取り去る。前記前処理の直後に、Ti
を電子ビーム蒸着する。膜厚は約3000〜3500人
とする。
Next, a second photograph is applied to remove the oxide film in the area where Ti is to be deposited, and prior to the Ti deposition, the surface Si containing various crystal lattice strains is
Etch people and remove them. Immediately after the pretreatment, Ti
is deposited by electron beam evaporation. The film thickness will be approximately 3,000 to 3,500 people.

第3次写真を施し、2.5X2.5μm角のTiパター
ンが残るような写真パターンで、Ti膜の湿式エツチン
グを行う。Tiエツチング液組成はH2O,1容、ED
TA2容の混合液を65℃±2℃に加温すると約3分間
でTi膜をエツチングすることができる。
A tertiary photograph is applied, and the Ti film is wet-etched using a photographic pattern that leaves a 2.5×2.5 μm square Ti pattern. Ti etching solution composition: H2O, 1 volume, ED
When a mixture of 2 volumes of TA is heated to 65° C.±2° C., the Ti film can be etched in about 3 minutes.

なお、ガードリング内側の面積は0.01cn+とした
0次に第4次写真としてTiパターンの上からTi膜部
がホトレジストで被われて、Ti部以外のシリコン部に
2X2μmの正方形にエツチング掘り込むパターンを約
0.75μmの微細加工が可能なステッパーアライメン
トを用いて写真処理する。この時、6000人厚のポジ
レジストを塗布する。
In addition, the area inside the guard ring is 0.01cn+, and as a 4th order photo, the Ti film part is covered with photoresist from above the Ti pattern, and the silicon part other than the Ti part is etched into a square of 2 x 2 μm. The pattern is photoprocessed using stepper alignment that allows microfabrication of about 0.75 μm. At this time, a 6,000-layer thick positive resist is applied.

RI E (Reactive Ion Etcher
)を使用してCC12F 2ガスを導入し、約5 mL
orrに調整したら約2KWの電力を投入して、約3μ
m深さ(h)で開口部が約3μm(f)を約7〜8分で
Et chする。
RI E (Reactive Ion Etcher)
) to introduce CC12F2 gas, approximately 5 mL
After adjusting to orr, apply about 2KW of power and about 3μ
Etch a depth (h) of m and an opening of approximately 3 μm (f) in approximately 7 to 8 minutes.

はぼU字形にエツチングする。こうしてa# 24m、
5−3μ、h=3μの凹凸形状(8)がほぼできた、T
i膜の下部にまでSiサイドエッチが及びTi膜のはり
出しが起こるが、このはり出しTiは前記Tiエツチン
グ液にて約30秒エツチングして取り去る。なお、Si
エツチング形状の制御はSi  Etch  Gasの
種類をCF、、NF、1等のF系、CC1,、CC1,
Fm等のCI系ガスの比率を調整することにより、深さ
に対する上部開口部の距離を調整することも可能である
Etch into a U-shape. Thus a# 24m,
5-3μ, h=3μ uneven shape (8) is almost completed, T
The Si side etch extends to the bottom of the i film, causing the Ti film to protrude, but this protruding Ti is removed by etching with the Ti etching solution for about 30 seconds. In addition, Si
The etching shape can be controlled by selecting the type of Si Etch Gas such as CF, NF, F series such as 1, CC1, CC1, etc.
By adjusting the ratio of CI gas such as Fm, it is also possible to adjust the distance of the upper opening with respect to the depth.

次に、電子線ダメージ層を除去するため、約200〜5
00人のSiを公知のSiエツチング液で除去する。
Next, in order to remove the electron beam damage layer, approximately 20 to 5
00 Si was removed using a known Si etching solution.

この時2通常は電子線ダメージ層を熱的にアニールして
取り除くが、本発明構造を実現するためには、Tiバリ
アを熱的に破壊しないように細心の注意を要する。
At this time, the electron beam damaged layer is usually removed by thermal annealing, but in order to realize the structure of the present invention, extreme care must be taken not to thermally destroy the Ti barrier.

1記ダメ一ジ層除去のSiエツチング処理の直後にAL
を蒸着する。ALをU字形Sjの底部側面に充分回らせ
るため、蒸着入射角とウェハーの自転、公転の角度及び
回転速度を調整し、実用上問題ない程度に改善した。A
Lの膜厚は約5ooo人とし、引き続きCr及びNi蒸
着を同一真空蒸着室内で通常方法にて行った。CrはA
L及びNiの拡散バリア金属の役目をする。また、Si
ウェハーの裏面にもCr / N i蒸着を引き続き処
理する。
1. Immediately after the Si etching process for removing the damaged layer, AL
Deposit. In order to make the AL sufficiently rotate around the bottom side of the U-shape Sj, the deposition incident angle, the rotation and revolution angles, and rotational speed of the wafer were adjusted, and the improvements were made to a level that poses no problem in practical use. A
The film thickness of L was about 5 mm, and Cr and Ni were subsequently deposited in the same vacuum deposition chamber by a normal method. Cr is A
It serves as a diffusion barrier metal for L and Ni. Also, Si
The back side of the wafer is also subsequently treated with Cr/Ni deposition.

次に、パターン面のA電極必要領域にのみAL/Cr 
/N iが存在するように第5次写真を行う。
Next, apply AL/Cr only to the required area of the A electrode on the pattern surface.
The fifth photograph is taken so that /N i exists.

Niのエツチング液は塩化第2鉄系のエツチング液で、
Crは硝酸第2セリウム系のエツチング液で、さらにA
Lは公知のH2PO4系のエツチング液でエツチングし
た。
The Ni etching solution is a ferric chloride based etching solution.
Cr is a ceric nitrate-based etching solution, and A
L was etched using a known H2PO4-based etching solution.

その後、ウェハー上のNi面にPb−8n系ハンダを溶
融、チップをダイシングし、通常の工程にて、ショット
キバリアダイオードチップを完成させた。
Thereafter, Pb-8n solder was melted on the Ni surface of the wafer, the chip was diced, and a Schottky barrier diode chip was completed through the usual process.

以上の製作工程により、ガードリング内側面積0.01
cnf 、 T iショットキ面積7.48X10−3
d、a=24mALショットキ領域f・3μmを完成さ
せた。第5図(a)(b)は従来例と比較した本発明ダ
イオドの特性図で(a)は順方向特性図、bは逆方向特
性図で図中夫々(イ)は従来例、(ロ)は本発明実施例
の特性を示す、即ち本実施例による順方向特性(ロ)は
V 、=0 、33 volt (a t 200A+
eP/cm)であり、従来構造(イ)のTi  5BD
V、=0.294voltよりは劣る。一方逆方向特性
において本実施例では特性(ロ)に示すように降伏電圧
V +、# 52 volt点ではIR=1.0mA程
度の逆方向漏れ電流(IR)を得た。従来構造のT1バ
リアダイオードではI R= 13mAであす大巾に少
なくできた。従って電力損失では、整流回路に適用する
と従来構造TiバリアSBDに較べて約27′3に減少
することができた。
Through the above manufacturing process, the inner area of the guard ring is 0.01
cnf, Ti Schottky area 7.48X10-3
d, a=24mAL Schottky region f・3μm was completed. Figures 5(a) and 5(b) are characteristic diagrams of the diode of the present invention in comparison with a conventional example, in which (a) is a forward characteristic diagram, and b is a reverse characteristic diagram. ) shows the characteristics of the embodiment of the present invention, that is, the forward characteristic (b) of this embodiment is V, = 0, 33 volt (a t 200A+
eP/cm), and Ti 5BD with conventional structure (a)
V, = 0.294 volt. On the other hand, in the reverse direction characteristic, in this example, as shown in characteristic (b), a reverse direction leakage current (IR) of about IR=1.0 mA was obtained at breakdown voltage V + and #52 volt point. With a T1 barrier diode of conventional structure, I R = 13 mA, which can be reduced by a wide margin. Therefore, when applied to a rectifier circuit, the power loss could be reduced to about 27'3 compared to the conventional structure Ti barrier SBD.

なお、本発明原理によれば、小バリア接合面積と大バリ
ア接合面積及び・、凹凸形状寸法a、fの効果は、寸法
aは小バリア金属の順方向特性からは大きい程望ましく
、逆方向ピンチオフ効果がらは小さい程望ましい背反す
る要因を持っており、実験結果からバリア金属に2=T
i及び1にM。
According to the principles of the present invention, the effects of the small barrier bonding area, the large barrier bonding area, and the uneven shape dimensions a and f are such that the larger the dimension a is, the more desirable it is from the forward direction characteristics of the small barrier metal. There are contradictory factors that make it desirable for the effect to be smaller, and the experimental results show that 2 = T for barrier metals.
M on i and 1.

以上のφ■金属を使用した時、約1〜2μmが最適であ
り、又、fについては、金属1のφ1.が大きい程、実
用電流領域の順方向特性に寄与しなくなり、大部分金属
2が占める面積で順方向特性が決まってしまうため、出
来るだけfは小さい方が望ましいことになる。しかし、
製作技術及び製造歩留り等を加味すると、f=2〜5μ
mが最適点となる0以上の説明から明らかなように本発
明によれば、電力用として好適する低損失のショットキ
バリアダイオードを提供しつる。
When using the above φ■ metals, approximately 1 to 2 μm is optimal, and f is approximately φ1. The larger f is, the less it contributes to the forward characteristics in the practical current range, and the forward characteristics are mostly determined by the area occupied by the metal 2. Therefore, it is desirable that f be as small as possible. but,
Considering manufacturing technology, manufacturing yield, etc., f=2~5μ
As is clear from the explanation that m is 0 or more as the optimal point, the present invention provides a low-loss Schottky barrier diode suitable for power use.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のショットキバリアダイオードの説明図、
第2図は各種バリアメタルによる従来のショットキバリ
アダイオードの整流特性図、第3図(a)(b)は本発
明の一実施例の平面図及び断面図、第4図は動作説明図
、第5図は従来例を比較した本発明実施例の特性図であ
る。
Figure 1 is an explanatory diagram of a conventional Schottky barrier diode.
FIG. 2 is a rectification characteristic diagram of a conventional Schottky barrier diode using various barrier metals, FIGS. 3(a) and 3(b) are a plan view and a sectional view of an embodiment of the present invention, FIG. FIG. 5 is a characteristic diagram of the embodiment of the present invention in comparison with the conventional example.

Claims (1)

【特許請求の範囲】[Claims]  半導体基板の表面にショットキバリアを形成する金属
を有する半導体装置において、バリア高さ(φ_■)の
異なる複数の金属が凹凸形状の半導体表面に設けてあり
、前記凹部の底部及び側面には高いφ_■を有する金属
を設け又、前記凸部の上部の略平面には低いφ_■を有
する金属を設けたことを特徴とするショットキバリアダ
イオード。
In a semiconductor device having a metal that forms a Schottky barrier on the surface of a semiconductor substrate, a plurality of metals having different barrier heights (φ_■) are provided on the uneven semiconductor surface, and a high φ_■ is provided at the bottom and side surfaces of the recess. 2. A Schottky barrier diode characterized in that a metal having a low φ_■ is provided on a substantially flat surface of the upper part of the convex portion.
JP5598490A 1990-03-07 1990-03-07 Schottky barrier diode Pending JPH03257870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5598490A JPH03257870A (en) 1990-03-07 1990-03-07 Schottky barrier diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5598490A JPH03257870A (en) 1990-03-07 1990-03-07 Schottky barrier diode

Publications (1)

Publication Number Publication Date
JPH03257870A true JPH03257870A (en) 1991-11-18

Family

ID=13014349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5598490A Pending JPH03257870A (en) 1990-03-07 1990-03-07 Schottky barrier diode

Country Status (1)

Country Link
JP (1) JPH03257870A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008022029A (en) * 2002-04-30 2008-01-31 Furukawa Electric Co Ltd:The GaN-BASED SEMICONDUCTOR DEVICE AND GROUP III-V NITRIDE SEMICONDUCTOR DEVICE
EP2302687A3 (en) * 2005-01-06 2011-05-04 Velox Semiconductor Corporation Gallium nitride semiconductor devices
JP2011166181A (en) * 2011-05-31 2011-08-25 Sumitomo Electric Ind Ltd Rectifying element and method of manufacturing the same
CN102738213A (en) * 2011-04-06 2012-10-17 罗姆股份有限公司 Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008022029A (en) * 2002-04-30 2008-01-31 Furukawa Electric Co Ltd:The GaN-BASED SEMICONDUCTOR DEVICE AND GROUP III-V NITRIDE SEMICONDUCTOR DEVICE
EP2302687A3 (en) * 2005-01-06 2011-05-04 Velox Semiconductor Corporation Gallium nitride semiconductor devices
CN102738213A (en) * 2011-04-06 2012-10-17 罗姆股份有限公司 Semiconductor device
JP2011166181A (en) * 2011-05-31 2011-08-25 Sumitomo Electric Ind Ltd Rectifying element and method of manufacturing the same

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