JPH03254037A - Semiconductor electron emission element - Google Patents

Abstract

PURPOSE:To optionally set up a position, of an electron beam, a beam diameter and a current flow of the electron beam as well as to stabilize an electron emission characteristic by providing a Schottky barrier electrode on a P-type semiconductor while providing a P<+> region thereunder and a plurality of N<+> regions along its circumference. CONSTITUTION:A P<-> layer 102 is formed on a P<+> semiconductor board 101. A P<+> region 107 and the N<+> regions 103 to 106 are formed inside the layer 102 and a Schottky barrier electrode 114 is formed on the region 107. When a reverse bias is impressed in a vacuum by the power supply 115 to 118, 119 in this constitution, electron emission is generated so as to enable an expanse of a depletion layer 120 to be formed by a PN junction of the N<+> regions with a base body by voltage to be impressed on the regions 103 to 106 to be optionally changed. Thereby, an electron emission characteristic is stabilized and a position, a shape and a current flow of an electron beam to be emitted can be controlled.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor electron-emitting device.

[Prior Art] Among conventional semiconductor electron-emitting devices, one that uses avalanche amplification is disclosed in, for example, U.S. Pat. No. 4,259,578.
and US Pat. No. 4,303,930.

This semiconductor electron-emitting device emits electrons by forming a P-type semiconductor layer and an N-type semiconductor layer on a semiconductor substrate, and depositing cesium or the like on the surface of the N-type semiconductor layer to lower the work function of the surface. By applying a reverse bias voltage to both ends of a diode formed by a P-type semiconductor layer and an N-type semiconductor layer and causing avalanche amplification, electrons are made hot, and the electrons are transferred from the electron-emitting region to the surface of the semiconductor substrate. It emits electrons in the direction perpendicular to .

[Problems to be Solved by the Invention] However, the conventional semiconductor electron-emitting device described above has the following drawbacks because cesium, which is used to form the electron-emitting portion, is a chemically extremely active element. there were.

■Ultra-high vacuum (10-1° Torr) is used to ensure stable operation.
above).

■Life span, efficiency, etc. strongly depend on the degree of vacuum.

■The device cannot be exposed to the atmosphere.

Furthermore, in conventional semiconductor electron-emitting devices, the structure is such that electrons that have gained high energy through avalanche amplification pass through the N-type semiconductor layer and reach the surface of the electron-emitting region. There was also the drawback that it was lost due to lattice scattering within the layer. In order to suppress this energy loss, it is necessary to make the N-type semiconductor layer extremely thin (200 Å or less), but it is difficult to fabricate such an extremely thin N-type semiconductor layer with uniformity, high concentration, and low defects. Therefore, there was a problem in that it was difficult to stably manufacture the device.

The present invention solves the above-mentioned conventional problems and provides a semiconductor electron-emitting device that can achieve stable electron-emitting characteristics and further allows the position, beam diameter, and current amount of the emitted electron beam to be set arbitrarily. purpose.

[Means and Effects for Solving the Problems] In order to achieve the above object, the inventors of the present invention took the following measures as a result of intensive studies.

(1) Having a Schottky barrier electrode on a P-type semiconductor, consisting of a P+ region under the Schottky barrier electrode in the P-type semiconductor and a plurality of N1 regions formed around the P'''' region. Semiconductor electron-emitting device.

(2) A semiconductor electron-emitting device in which the spread of each depletion layer of a PN junction formed by the P-type semiconductor and each N3 region can be controlled by a voltage applied to each N1 region.

(3) By controlling the spread of the depletion layers of the plurality of PN junctions, the current distribution in the P-type semiconductor and P+ region can be controlled, and the position of the emitted electron beam can be arbitrarily defined. Emitting element.

(4) By controlling the spread of the depletion layer, P
A semiconductor electron-emitting device that can control the current distribution in a type semiconductor and a P+ region, and arbitrarily define the beam diameter or beam shape of an emitted electron beam.

That is.

That is, according to the present invention, a plurality of N""" formed around a Schottky barrier electrode directly involved in electron emission.
By arbitrarily changing the spread of each depletion layer formed by the PN junction with the region body by changing the voltage applied to the N'' region, it is possible to control the position, beam diameter, and current value of the emitted electron beam. It is something.

[Example] Example 1 FIG. 1 is a schematic diagram showing a semiconductor electron-emitting device according to an example of the present invention, and FIG. 1(a) is a plan view, and FIG.
) is a sectional view taken along line AA in FIG. 1(a). In the figure 1
01 is a P゛ semiconductor substrate, 102 is a P- layer, 103 to 10
6 is the N1 region, 107 is the P+ region, 108 to 111 are ohmic electrodes for 103 to 106, respectively, 112
1 is an insulating film, 113 is an ohmic electrode for the P′″ substrate, 114 is a Schottky electrode, 115 to 118 are power supplies connected to the ohmic electrodes 108 to 111, respectively;
19 is a power source connected to the Schottky electrode.

The manufacturing process of the semiconductor electron-emitting device shown in FIG. 1 will be described below.

■ On a Zn-doped PGaAs substrate 101 with an impurity concentration of 5 x 1018 cm-3, a Zn concentration of 2 x 101
A 6 cm-3 P- layer 102 was grown.

■Next, using FIB (focused ion beam) implantation technology, Si ions are implanted into the N''' regions 103 to 106 so that the impurity concentration is I x 1019 cm-3, and P3
In the region 107, Be ions are added at an impurity concentration of 2×lQ18.
Ion implantation was performed in each case to a depth of cm-3, and activation was performed by annealing.

(2) Thereafter, an insulating film 112 of 5 in 2 was vacuum-deposited on the surface, and openings were formed by ordinary photolithography.

■Au/Ge is vacuum-deposited on the N+ regions 103 to 106, and Au/Cr is vacuum-deposited on the back surface of the substrate, and heat-treated to
Ohmic electrodes 08 to 111 and 113 were formed.

(2) In addition to GaAs, for example, LaBa, which is a low work function material, can be used as a material for the Schottky electrode 114.
(φwk#2.6eV) was electron beam evaporated to form a Schottky electrode.

The semiconductor electron-emitting device (Fig. 1) manufactured in this manner is placed in a vacuum chamber maintained at 1 x 10-' Torr, and a reverse bias of 5V is applied to each of the power supplies 115 to 118 and the power supply 119. When the voltage was applied, electron emission of about 1 nA was observed. FIG. 2 shows the calculated shape of the depletion layer within the element at this time. FIG. 2(a) is a plan view showing only the N+ regions 103 to 106 and the depletion layer 120 formed in the P-type semiconductor, and FIG. 2(b) is a cross section of the device at the B-B position and the plan view at this time. FIG. 2 is a diagram showing a depletion layer 120 formed within a P-type semiconductor.

Next, the power supply 119 applies reverse bias SV, Z source 115,
Reverse bias 8V by 116, 117, 118 respectively
, 4V, 8V, and 12V were applied, approximately 0.3nA
electron emission was obtained, and the emission position was shifted to near the N+ region 104. FIG. 3 shows the calculated shape of the depletion layer within the element at this time.

FIG. 3(a) is a plan view showing only the N+ regions 103 to 106 and the depletion layer 120 formed in the P-type semiconductor,
FIG. 3(b) is a diagram showing a cross section of the device at the CC position and the depletion layer 120 formed in the P-type semiconductor at this time.

The operating principle of the semiconductor electron-emitting device of the present invention will be explained below with reference to FIGS. 2 and 4.

In FIG. 2, in principle, semiconductor materials include, for example, St, Ge, GaAs, GaP, Al4As,
GaAsPAfGaAs, SiC, BP, etc. are applicable, and indirect transition type materials with a large band gap are particularly suitable. In addition, the P1 region 107 and its Schottky electrode 114, which are directly involved in electron emission, which will be described later, are electrically independent, and furthermore, there are a plurality of electrically independent N'''' regions in this device. The plurality of N'' regions each form a PN junction with the P- layer 102, and a depletion layer 120 is formed by applying a reverse bias. Since the shape of this depletion layer 120 can be controlled by the voltage applied to each N+ region, the position where avalanche breakdown occurs under reverse bias of the Schottky barrier junction can be controlled. Therefore, the position and shape of the emitted electron beam can be changed arbitrarily.

The electron emission process in the semiconductor electron-emitting device of the present invention will be explained with reference to FIG.

By applying a reverse bias to a Schottky diode made of a P-type semiconductor and a low work function material, the bottom EC of the conduction band of the P-type semiconductor is brought to the vacuum level E of the Schottky electrode.
The energy level is higher than VAC. Electrons generated by avalanche amplification gain energy higher than the lattice temperature due to the electric field in the depletion layer generated at the semiconductor-metal electrode interface, and are injected into the Schottky electrode made of a low work function material. Electrons that do not lose energy due to lattice scattering or the like and have energy greater than the work function of the Schottky electrode surface are emitted into vacuum from the Schottky electrode surface (ie, the electron emitting portion).

Embodiment 2 FIG. 5 is a schematic diagram showing a semiconductor electron-emitting device according to another embodiment of the present invention, in which FIG. 5(a) is a plan view, and FIG. 5(b) is a plan view of FIG. ) is a sectional view taken along line DD. In the figure, 501 is a P+ semiconductor substrate, 502 is a P- layer, 503 to
510 is an N2 region, 511 is a P" region, 512 is an insulating film, and 513 to 520 are N'" regions 503 to 510, respectively.
521 is an ohmic electrode for the back surface of the substrate, 522 is a Schottky electrode, 523 is a power source for applying voltage to the Schottky electrode, 524 to 531
are power sources that apply voltages to the ohmic electrodes 513 to 520, respectively.

The manufacturing process of the semiconductor electron-emitting device shown in FIG. 5 will be described below.

■CVD (chemical vapor deposition) on As-doped P+Si substrate 501 with impurity concentration of 1 x 1019 cm-3
The P- layer 50 with an As concentration of I x 1016 cm-3 is formed by
I grew 2.

■Next, using FIB (focused ion beam) implantation technology,
The N+ regions 503 to 510 are doped with B ions so as to have an impurity concentration of 1 x 10"cm-3, and are doped with P.
In the + region 511, As ions were implanted so that the impurity concentration became 1 x 10110l8', and each region was activated by annealing.

(2) Thereafter, an insulating film 512 of 5 in 2 was vacuum-deposited on the surface, and openings were formed by ordinary photolithography.

(2) Af was vacuum-deposited on the N+ regions 503-510 and on the back surface of the substrate, respectively, to form ohmic electrodes 513-520 and 521.

■Furthermore, as a material that becomes Schottky%1i522,
For example, Gd (φwk 43 , 1
Gd5
iz was formed to form a high quality Schottky junction with the P9 region 511.

The semiconductor electron-emitting device (FIG. 5) manufactured in this manner was placed in a vacuum chamber maintained at I x 10-' Torr, and reverse biased at 6 V by a power source 523 and reverse biased by a power source 523.
24.525.526.527.528.529.53
Reverse bias IOV, 8V, 7 by 0.531 respectively
V.

When applying 6V, 7V, 8V, IOV, and 12V,
Electron emission of about 0.2 nA was obtained, and the emission position was N+
It was close to region 506 and had a semi-elliptical shape.

FIG. 6 shows the calculated shape of the depletion layer within the element at this time. FIG. 6(a) shows the N″″ area 503~
A plan view showing only the depletion layer 510 and the depletion layer 532 formed in the P-type semiconductor, FIG. 6(b) is the same as E- in FIG. 6(a).
FIG. 6 is a diagram showing a cross section of the device at position E and a depletion layer 532 formed in the P-type semiconductor at this time.

Next, the power supply 523 applies a reverse bias 6■, the power supply 524,
525.526.527.528.529.530.5
Reverse bias 6V, IOV, 6V, 1 by 31 respectively
．． OV.

When applying 6V, IOV, 6V, IOV, about 0,
Electron emission of 4 nA was obtained, the emission position was at the center, and the shape of the electron beam was a cross.

FIG. 7 shows the calculated shape of the depletion layer within the device at this time. FIG. 7(a) shows the N' area 503 to 5.
10 and a plan view showing only the depletion layer 532 formed in the P-type semiconductor, FIG. FIG.

[Effects of the Invention] As explained above, according to the semiconductor electron-emitting device of the present invention, the position, shape, and current amount of the emitted electron beam can be controlled by controlling the shape of the depletion layer formed by a plurality of PN junctions. can be controlled.

[Brief explanation of drawings]

1 to 3 are a plan view and a sectional view of a semiconductor electron-emitting device embodying the present invention. FIG. 4 is a band diagram of the semiconductor electron-emitting device of the present invention. 5 to 7 are a plan view and a sectional view of a semiconductor electron-emitting device according to another embodiment of the present invention. 101... Semiconductor substrate 102... P- layer 10
3 to 106...N” area 107...P1 area 10
8-111... Ohmic electrode 112... Insulating film 113... Ohmic electrode 114... Schottky electrode 115-118... Power supply 119... Power supply 12
0...Depletion layer width

Claims (4)

[Claims] (1) Having a Schottky barrier electrode on a P-type semiconductor, P^+ below the Schottky barrier electrode in the P-type semiconductor, and a plurality of N^+ regions formed around the P^+ region. A semiconductor electron-emitting device consisting of. (2) A semiconductor electron-emitting device in which the spread of each depletion layer of a PN junction formed by the P-type semiconductor and each N^+ region can be controlled by a voltage applied to each N^+ region. (3) By controlling the spread of the depletion layers of the plurality of PN junctions, it is possible to control the current distribution in the P-type semiconductor and the P^+ region, and arbitrarily define the position of the emitted electron beam. Semiconductor electron-emitting device. (4) By controlling the spread of the depletion layer, P
A semiconductor electron-emitting device that can control current distribution in a type semiconductor and a P^+ region, and arbitrarily define the beam diameter or beam shape of an emitted electron beam.