JPH03248446A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH03248446A
JPH03248446A JP4609790A JP4609790A JPH03248446A JP H03248446 A JPH03248446 A JP H03248446A JP 4609790 A JP4609790 A JP 4609790A JP 4609790 A JP4609790 A JP 4609790A JP H03248446 A JPH03248446 A JP H03248446A
Authority
JP
Japan
Prior art keywords
package
adhesive
cap
semiconductor device
double
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4609790A
Other languages
Japanese (ja)
Inventor
Nobuyuki Morita
守田 伸幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4609790A priority Critical patent/JPH03248446A/en
Publication of JPH03248446A publication Critical patent/JPH03248446A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable removal of a foreign material in a package and to prevent troubles such as short-circuiting by exposing an adhesive side of a material having an adhesive surface and by providing it to a cavity side of a cap of the package. CONSTITUTION:A package is DIP type and a cavity side of a cap 5 is provided with an adhesive double-coated film 8 which is provided with an adhesive layer is provided closely on both sides of a film base material as an adhesive member. The adhesive double-coated film 8 faces a cavity space and its surface is adhesive; therefore, if the package is made upside down after sealed, a foreign material entered inside the package drops on the adhesive double-coated film 8 and fixed. After the treatment, the foreign material 7 never come into contact with a bonding wire 4, etc.

Description

【発明の詳細な説明】 [産業上の利用分野1 本発明は、半導体装置、特に気密封止タイプのパッケー
ジを有する半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a hermetically sealed type package.

[従来の技術1 従来の気密封止パッケージの半導体装置は、第2図の断
面図に示すように、キャップ5は周縁が高くなり、中央
部は凹部をなし、キャビティ面になっている。パッケー
ジのベース2に半導体チップ3を溶接後、ボンディング
ワイヤ4によってリード接続がなされた後、キャップ5
をベース2にシールガラス6によりろう接することで封
止がなされる。
[Prior Art 1] In a conventional hermetically sealed package semiconductor device, as shown in the cross-sectional view of FIG. 2, the cap 5 has a raised peripheral edge and a recessed central portion, which serves as a cavity surface. After welding the semiconductor chip 3 to the base 2 of the package, lead connections are made with bonding wires 4, and then the cap 5 is
Sealing is achieved by soldering the base 2 to the sealing glass 6.

[発明が解決しようとする課題] この種の半導体装置では、封止工程において、チップか
らのシリコン屑、あるいはマウント材層等の導電性異物
が混入する機会がしばしばある。これらの異物は第2図
に導電性異物7として示しであるが、半導体装置が各種
試験を含む製造工程中において、振動・衝撃をうけたと
きに、パッケージのキャビティ内を移動し、ボンディン
グワイヤ間・ステッチ間で、電気印加時に電気的ショー
ト等の不都合を生ずることがある。
[Problems to be Solved by the Invention] In this type of semiconductor device, conductive foreign matter such as silicon debris from the chip or the mounting material layer often gets mixed in during the sealing process. These foreign objects, shown as conductive foreign objects 7 in FIG. 2, move within the cavity of the package when the semiconductor device is subjected to vibrations and shocks during the manufacturing process, including various tests, and move between the bonding wires.・When electricity is applied between stitches, problems such as electrical shorts may occur.

本発明の目的は、上記のように気密封止パッケージ内に
導電性異物が含まれるような場合にも、この異物を除去
することのできる半導体装置を提供することにある。
An object of the present invention is to provide a semiconductor device that can remove conductive foreign matter even if it is contained in a hermetically sealed package as described above.

〔課題を解決するための手段] 本発明の半導体装置は、表面が粘着質の部材を、該粘着
面を露出して、パッケージのキャップのキャビティ面に
設けるようにしている。
[Means for Solving the Problems] In the semiconductor device of the present invention, a member having an adhesive surface is provided on the cavity surface of the cap of the package with the adhesive surface exposed.

C作  用  J 表面が粘着質の部材は、パッケージ内の導電性異物(以
下、単に異物という)が粘着面に接触したときに、異物
を固定する。したがって、例えば、封止後キャップが下
側になるようにパッケージを転倒させると、異物は粘着
質の部材に接触し、固定される。
C Effect J A member with an adhesive surface fixes a conductive foreign object in the package (hereinafter simply referred to as foreign object) when it comes into contact with the adhesive surface. Therefore, for example, if the package is turned over so that the cap is on the lower side after sealing, foreign objects come into contact with the adhesive member and are fixed.

〔実施例j 以下、図面を参照して、本発明の一実施例につき説明す
る。第1図は実施例の断面図であり、パッケージを転倒
させた状態を示す。パッケージはDIPタイプのもので
、キャップ5のキャビティ面には、粘着質の部材として
、フィルム基材の両面に接着剤層を設けた両面粘着膜8
を、密着して設ける。両面粘着膜8はキャビティ空間に
面して表面が粘着質になっているので、封止後パッケー
ジを転倒させると、パッケージ内に混入した異物7はす
べて、両面粘着膜8上に落下し、固定される。この処理
後、異物7はボンディングワイヤ4等に接触することば
全く生じない。また、封止後、パッケージを転倒するの
でなく、封止工程を、第1図の上下関係で行なうように
してもよい。
[Embodiment j Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of the embodiment, showing the package in an overturned state. The package is of the DIP type, and the cavity surface of the cap 5 is coated with a double-sided adhesive film 8, which is an adhesive layer provided on both sides of a film base material.
are placed in close contact with each other. Since the double-sided adhesive film 8 has a sticky surface facing the cavity space, when the package is turned over after sealing, all foreign matter 7 that has entered the package will fall onto the double-sided adhesive film 8 and be fixed. be done. After this treatment, the foreign matter 7 does not come into contact with the bonding wire 4 or the like at all. Furthermore, instead of inverting the package after sealing, the sealing process may be performed in the vertical relationship shown in FIG.

〔発明の効果1 以上説明したように本発明は、パッケージのキャップの
キャビティ面に粘着質の部材を設け、封止中あるいは封
止後において異物が粘着質面に付着可能にして製造し、
必要であれば、特別に振動・衝撃を加えることにより、
異物を粘着面に固定することを可能としたものである。
[Advantageous Effects of the Invention 1] As explained above, the present invention is manufactured by providing an adhesive member on the cavity surface of a package cap and allowing foreign matter to adhere to the adhesive surface during or after sealing,
If necessary, by applying special vibrations and shocks,
This makes it possible to fix foreign objects to the adhesive surface.

これにより、パッケージ内の異物によるショート等の故
障が生ずるおそれのない半導体装置をうることができる
Thereby, it is possible to obtain a semiconductor device that is free from failures such as short circuits due to foreign matter in the package.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の断面図、第2図は往来例の
断面図である。 2・・・ベース、     3・・・半導体チップ、4
・・・ボンディングワイヤ、 5・・−キャップ、    7−・・(導電性)異物、
8・・−両面粘着膜。
FIG. 1 is a sectional view of one embodiment of the present invention, and FIG. 2 is a sectional view of a conventional example. 2...Base, 3...Semiconductor chip, 4
...Bonding wire, 5...-Cap, 7-...(Conductive) foreign matter,
8...-Double-sided adhesive film.

Claims (1)

【特許請求の範囲】[Claims] 気密封止パッケージを有する半導体装置において、表面
が粘着質の部材を、該粘着面を露出して、パッケージの
キャップのキャビティ面に設けたことを特徴とする半導
体装置。
1. A semiconductor device having a hermetically sealed package, characterized in that a member having an adhesive surface is provided on a cavity surface of a cap of the package with the adhesive surface exposed.
JP4609790A 1990-02-26 1990-02-26 Semiconductor device Pending JPH03248446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4609790A JPH03248446A (en) 1990-02-26 1990-02-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4609790A JPH03248446A (en) 1990-02-26 1990-02-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH03248446A true JPH03248446A (en) 1991-11-06

Family

ID=12737489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4609790A Pending JPH03248446A (en) 1990-02-26 1990-02-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH03248446A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009528707A (en) * 2006-03-03 2009-08-06 ウエイブニクス インク. Multilayer package structure and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009528707A (en) * 2006-03-03 2009-08-06 ウエイブニクス インク. Multilayer package structure and manufacturing method thereof

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