JPH0324736A - Forming method of semiconductor thin film - Google Patents

Forming method of semiconductor thin film

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Publication number
JPH0324736A
JPH0324736A JP16048089A JP16048089A JPH0324736A JP H0324736 A JPH0324736 A JP H0324736A JP 16048089 A JP16048089 A JP 16048089A JP 16048089 A JP16048089 A JP 16048089A JP H0324736 A JPH0324736 A JP H0324736A
Authority
JP
Japan
Prior art keywords
conductivity type
amorphous semiconductor
semiconductor layer
single crystal
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16048089A
Other languages
Japanese (ja)
Inventor
Kenji Tomita
賢時 冨田
Noritoshi Yamaguchi
文紀 山口
Hiroaki Kubo
裕明 久保
Yoshiteru Nitta
新田 佳照
Kiyonari Tanaka
聖也 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP16048089A priority Critical patent/JPH0324736A/en
Publication of JPH0324736A publication Critical patent/JPH0324736A/en
Pending legal-status Critical Current

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  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To form a uniform semiconductor thin film by a simple process by a method wherein an amorphous semiconductor layer of a conductivity type and an amorphous semiconductor layer of opposite conductivity type are stuck and formed in the contact state on an insulative substrate, and fused and solidified by projecting laser light. CONSTITUTION:On an insulative substrate 1, a conductivity type amorphous semiconductor layer 2 is stuck and formed, and a specified part is etched and eliminated; in the eliminated part, an amorphous semiconductor layer 3 whose conductivity type is opposite to that of the layer 2 is stuck and formed in the state of contact with the layer 2. These amorphous semiconductor layers 2, 3 are fused and solidified by projecting laser light. Thus the layers 2, 3 are transformed into single crystal, and at the same time, a semiconductor junction part constituted of a conductivity type semiconductor single crystal and an opposite type semiconductor single crystal is formed. Thereby semiconductor thin film single crystal 2, 3 can be simply formed without using complicated process and a large-scaled apparatus.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体薄膜の形成方法に関し、特に半導体接合
部を有する単結晶半導体薄膜の形成方法に関する. (従来の技術及びその問題点) 従来から非晶質半導体層にレーザー光を照射して非晶質
半導体層を溶融一固化させて単結晶化するレーザービー
ム結晶化法がある.このレーザービーム結晶化法を応用
して三次元IC等を製造する方法も種々提案されている
が、三次元ICを製造する場合基板は必ず単結晶シリコ
ン基板に限られてしまい、大面積化は到底望めないと共
に、半導体層に不純物イオンを拡散する場合イオン注入
法や熱拡散法で行うことから、不純物イオンを広い領域
にわたって均一に拡散させることができなかったり、高
温加熱に耐えられる基板を用いなければならない等技術
上不可、避の問題がある.そこで、このような問題を解
決する方法として例えば特開昭62−214668号公
報では一第3図に示すように、基板11として大面積化
が可能で安価なガラス基板を用い、このガラス基板上に
SiO2膜12等を形成し、このSiO2膜の所定部分
に後にトランジスタのチャンネル領域を形成する不純物
となるホウ素12aとリン12bをイオン注入法等で注
入し、このS z 02 膜1 2上にシリコン薄膜1
3を堆積させてシリコン薄膜13にレーザー光を照射し
て加熱することによりS i O2膜12中の不純物を
シリコン薄膜13に熱拡散させてチャンネル領域を形成
して、ガラス基板11上に逆チャンネル型の薄膜トラン
ジスタ18、23等を形成することも提案されている.
ところが、この従来の薄膜トランジスタの製造方法では
、S i O2膜12に予めトランジスタのチャンネル
領域を形成する不純物をイオン注入法等で注入して置か
なければならず、製造工程が煩雑で装置も大掛かりなも
のを用意しなければならないという問題が依然としてあ
る. (発明の目的〉 本発明はこのような従来方法の問題点に鑑み案出された
ものであり、イオン注入法等の煩雑な工程や大掛かりな
装置を用いずに簡単に形成することができる半導体薄膜
単結晶の形成方法を提供することを目的とするものであ
る. (発明の構成) 本発明によれば、絶縁基板上に一導電型の非晶質半導体
層を被着形戒して所定部分を工・ソチング除去し、前記
絶縁基板上の一導電型非晶質半導体層を除去した部分に
前記一導電型とは反対の導電型の非晶質半導体層を前記
一導電型非晶質半導体層と接触した状態に被着形成し、
これら非晶質半導体層にレーザー光を照射して溶融・固
化させることにより半導体層を単結晶化すると同時に一
導電型半導体単結晶と他の導電型半導体単結晶とで構成
される半導体接合部を形成する半導体薄膜の形成方法が
提供される. 《実施例) 以下、本発明を添付図面に基づき詳細に説明する. 第1図(a)(W (c)(イ)は、本発明に係る半導
体薄膜の形成方法を説明するための図である. 本発明に係る方法に用いられる絶縁基板1は、ナトリウ
ムイオンをほとんど含有しないガラスや石英等からなり
、非晶質半導体層とのgB張率の差や価格を考慮すると
#7059基板等が好適に用いられる.基板1として#
7059基板を用いる場合は、基板の表面に例えば酸化
シリコン膜(Si02)等を0.01〜2.01tm程
度の厚みに被着させて置くとよい.なぜなら、後述する
非晶質半導体層の結晶化工程で基板1からの不純物の混
入を阻止したり熱衝撃を緩和させることができるからで
ある. 次に、同図(a)に示すように、絶縁基vil上に一導
電型非晶質半導体層2を形成する.この非晶質半導体層
2は、プラズマCVD法、熱CVD法、或いは光CVD
法等で形成される.プラズマCvD法で形成する場合、
プラズマ反応炉を2TOrr程度に減圧して、反応炉内
にモノシラン(SiH.)等の水素化シリコンガスに不
純物用ガスをlppm〜1%程度混入させて絶縁基板1
を200〜300℃に加熱しながらグロー放電分解する
ことにより絶縁基板1上に堆積する.不純物用ガスとし
ては、n型半導体層(例えば一導電型非晶質半導体層)
を形成する場合はフ才スフィン(PH3)等が用いられ
、p型半導体層(例えば一導電型非晶質半導体層とは反
対の導電型非晶質半導体層〉を形戒する場合はジボラン
(82 Hs )等が用いられる.この不純物ガスの濃
度を調整することによって、最終的に形成される半導体
単結晶内の不純物濃度を1 0 12c m−’〜1 
022c m−’の範囲内等で任意に調整することがで
きる.この非晶質半導体層2は、500〜20000人
程度の厚みに形成される. 次に、同図(日に示すように、一導電型非晶質半導体層
2の所定部分に有機材料等から成るフォトレジスト膜を
塗布して1〜10%のフッ硝酸溶液( H N 03 
+ H F )中に2〜60分程度浸漬してフォトレジ
スト膜が塗布された部分以外の一導電型非晶質半導体層
2をエッチング除去する.次に、同図(c)に示すよう
に、一導電型非晶質半導体層2がエッチング除去された
部分に一導電型非晶質半導体層とは反対の導電型非晶質
半導体層3をプラズマCVD法、熱CVD法、或いは光
CVD法により形成する.この一導電型非晶質半導体層
がエッチング除去された部分に反対の導電型非晶質半導
体層を形成するにあたっては、例えばメタルマスクで一
導電型非晶質半導体層を被覆してエッチング除去された
部分だけに反対の導電型の非晶質半導体層を堆積しても
よいし、全面に反対の導電型非晶質半導体層を堆積して
重複部分の反対の導電型の非晶質半導体層を除去して形
成してもよい.また、一導電型非晶質半導体層と反対の
導電型非晶質半導体層との間に間隙を生じないように接
触して形成する.尚、一導電型非晶質半導体層と反対の
導電型非晶質とは一部が重複するように形成してもよい
. 次に、絶縁基板1を500〜600℃に2時間程度加熱
して、非晶質半導体層2、3内の水素を排出する.即ち
、非晶質半導体層2、3を絶縁基板1に均質に堆積する
ためにはシリコンの結合手を飽和させるための水素を含
有させなければならない.例えば絶縁基板1を200〜
300℃に加熱して非晶質半導体膜2、3を堆積すると
非晶質半導体膜2、3中に1021個cm””程度の水
素が含有されてしまう.ところが、水素を含有した状態
で非晶質半導体膜2、3を単結晶化すると、レーザーを
照射して加熱した際に水素が突沸して非晶質半導体膜が
絶縁基板から剥離する.そこで、絶縁基板1を500〜
600℃に加熱して非晶質半導体層2、3中の水素を1
0′!個c m−’程度まで低減させる.なお、加熱処
理温度が500℃未満の場合は含有水素量を所望値まで
低減させ難く、また600℃以上の場合は非晶質半導体
層2、3が多結晶化して単結晶化工程で膜中にクラック
(亀裂)を生じ易くなる.従って、この加熱処理温度は
500〜600℃の範囲で行うことが望ましい. 次に、同図(イ)に示すように、非晶質半導体層2、3
にレーザー光を照射して単結晶化させると同時に一導電
型半導体単結晶2と反対の導電型半導体単結晶3とで構
成される半導体接合部を形成する.レーザーとしては、
.例えばビームスポットが20〜100μmでパワー0
.5〜20Wの連続発振アルゴンレーザー等が好適に用
いられ、走査速度は1〜20cm/sec程度である.
レーザー光を照射すると非晶質半導体膜2、3は140
0℃以上に加熱されて瞬間的に溶融しレーザー光が通り
過ぎると瞬時に固化して単結晶化する.半導体接合部の
不純物拡散領域の境界を明瞭にしていわゆる逆方向特性
やリーク電流等の素子特性を向上させるためにレーザー
の走査速度は単結晶化できる範囲でできるだけ速くする
ことが望ましく、また溶融した非晶質半導体層2、3を
瞬時に固化させるために非晶質半導体層2、3上等に放
熱を促進するポリエチレングリコール等の粘性物質を塗
布してレーザー光を照射するとよい.また、非晶質半導
体層2、3上に酸化シリコンli ( S z 02 
)等を0.5μm程度の厚みに例えばプラズマCVD法
等で被着して置くとよい.なぜなら、非晶質半導体層2
、3がレーザーで加熱された際の熱をいち早く吸収して
瞬時に固化させることができ、また大気中から非晶質半
導体層2、3内への汚染を防止でき、さらに非晶質半導
体層2、3の表面の波打ち等を防止できるからである.
なお、一導電型半導体単結晶2及び反対の導電型半導体
単結晶3の不純物濃度は非晶質半導体層2、3を形成す
る際の不純物ガスの濃度にそのまま依存している. 上記実施例では一導電型非晶質半導体層と他の導電型非
晶質半導体層とでp−n接合を形成することについて述
べたが、全く同様の方法によって第2図(一〜(イ)に
示すようなれ4″−p  n 1″接合も形成すること
ができる. このように形成した半導体接合部を有する半導体薄膜2
、3上に例えば酸化シリコンや窒化シリコン等からなる
フィールド酸化膜やゲート絶縁膜を形成し、さらにアル
ミニュウムやニッケル等から成るソース電極、ゲート電
極、及びドレイン電極を所定部分に形成することにより
、異なるチャンネルのトランジスタで構成されるC−M
OS.}−ランジスタを極めて容易に形成することがで
きる.(発明の効果〉 以上のように、本発明に係る半導体薄膜の形成方法によ
れば、絶縁基板上に7導電型の非晶質半導体層を被着形
成して所定部分をエッチング除去し、前記絶縁基板上の
一導電型非晶質半導体層を除去した部分に前記一導電型
とは反対の導電型の非晶質半導体層を前記一導電型非晶
質半導体層と接触した状態に被着形成し、これら非晶質
半導体層にレーザー光を照射して溶融・固化させること
により半導体層を単結晶化すると同時に一導電型半導体
単結晶と他の導電型半導体単結晶とで構成される半導体
接合部を形戒することから、例えばイオン注入装置のよ
うな大掛かりな装置を用いずに簡単な工程で大面積にわ
たって均質な半導体薄膜を高温処理工程を経ずに形成す
ることができ、もって基板としてガラス等の安価で大面
積の基板にC−MOS等の異なるチャンネルのトランジ
スタを簡単に形成できる.
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for forming a semiconductor thin film, and more particularly to a method for forming a single crystal semiconductor thin film having a semiconductor junction. (Prior art and its problems) There is a conventional laser beam crystallization method in which an amorphous semiconductor layer is irradiated with laser light to melt and solidify the amorphous semiconductor layer to form a single crystal. Various methods have been proposed for manufacturing three-dimensional ICs by applying this laser beam crystallization method, but when manufacturing three-dimensional ICs, the substrate is always limited to a single-crystal silicon substrate, and it is difficult to increase the area. In addition, since impurity ions are diffused into the semiconductor layer using ion implantation or thermal diffusion, it is not possible to diffuse impurity ions uniformly over a wide area, and it is difficult to use a substrate that can withstand high temperature heating. There is a problem of technical impossibility and avoidance, such as having to do so. Therefore, as a method for solving such problems, for example, Japanese Patent Application Laid-Open No. 62-214668 uses an inexpensive glass substrate that can be made into a large area as the substrate 11, as shown in FIG. A SiO2 film 12, etc. is formed on the SiO2 film, and boron 12a and phosphorus 12b, which will become impurities that will later form the channel region of the transistor, are implanted into a predetermined portion of this SiO2 film by ion implantation or the like, and then on this S z 02 film 12. Silicon thin film 1
3 is deposited and heated by irradiating the silicon thin film 13 with laser light, impurities in the SiO2 film 12 are thermally diffused into the silicon thin film 13 to form a channel region, and a reverse channel is formed on the glass substrate 11. It has also been proposed to form type thin film transistors 18, 23, etc.
However, in this conventional thin film transistor manufacturing method, impurities that form the channel region of the transistor must be implanted in advance into the SiO2 film 12 by ion implantation, etc., and the manufacturing process is complicated and the equipment is large. There is still the problem of having to prepare things. (Objective of the Invention) The present invention was devised in view of the problems of the conventional method, and provides a semiconductor that can be easily formed without using complicated processes such as ion implantation or large-scale equipment. It is an object of the present invention to provide a method for forming a thin film single crystal. (Structure of the Invention) According to the present invention, an amorphous semiconductor layer of one conductivity type is deposited on an insulating substrate and a predetermined layer is formed on the insulating substrate. A portion of the amorphous semiconductor layer of one conductivity type on the insulating substrate is removed by etching and sowing, and an amorphous semiconductor layer of a conductivity type opposite to the one conductivity type is added to the portion where the amorphous semiconductor layer of one conductivity type on the insulating substrate has been removed. Formed in contact with the semiconductor layer,
By irradiating these amorphous semiconductor layers with laser light and melting and solidifying them, the semiconductor layer is made into a single crystal, and at the same time, a semiconductor junction consisting of a semiconductor single crystal of one conductivity type and a semiconductor single crystal of another conductivity type is formed. A method for forming a semiconductor thin film is provided. <<Example>> Hereinafter, the present invention will be explained in detail based on the accompanying drawings. 1(a) (W) (c) and (a) are diagrams for explaining the method of forming a semiconductor thin film according to the present invention. The insulating substrate 1 used in the method according to the present invention contains sodium ions #7059 substrate is preferably used, considering the difference in gB elongation with the amorphous semiconductor layer and the price.
When using a 7059 substrate, it is recommended that a silicon oxide film (Si02) or the like be deposited on the surface of the substrate to a thickness of about 0.01 to 2.01 tm. This is because it is possible to prevent impurities from entering the substrate 1 and to alleviate thermal shock in the crystallization process of the amorphous semiconductor layer, which will be described later. Next, as shown in FIG. 4A, an amorphous semiconductor layer 2 of one conductivity type is formed on the insulating base vil. This amorphous semiconductor layer 2 is formed by a plasma CVD method, a thermal CVD method, or a photo CVD method.
Formed by law, etc. When forming by plasma CvD method,
The pressure of the plasma reactor is reduced to about 2 TOrr, and about 1 ppm to 1% of an impurity gas is mixed into hydrogenated silicon gas such as monosilane (SiH.) in the reactor to form the insulating substrate 1.
is deposited on the insulating substrate 1 by glow discharge decomposition while heating to 200 to 300°C. As an impurity gas, an n-type semiconductor layer (for example, an amorphous semiconductor layer of one conductivity type)
When forming a p-type semiconductor layer (for example, an amorphous semiconductor layer of a conductivity type opposite to one conductivity type amorphous semiconductor layer), diborane (PH3) is used. 82 Hs), etc. By adjusting the concentration of this impurity gas, the impurity concentration in the semiconductor single crystal that is finally formed can be adjusted to 1012 cm-' to 1.
It can be arbitrarily adjusted within the range of 022cm-'. This amorphous semiconductor layer 2 is formed to a thickness of about 500 to 20,000 layers. Next, as shown in FIG.
+ HF) for about 2 to 60 minutes to etch away the amorphous semiconductor layer 2 of one conductivity type except for the portion coated with the photoresist film. Next, as shown in FIG. 2C, an amorphous semiconductor layer 3 of a conductivity type opposite to the amorphous semiconductor layer 3 of the conductivity type is formed in the portion where the amorphous semiconductor layer 2 of the one conductivity type has been etched away. It is formed by a plasma CVD method, a thermal CVD method, or a photoCVD method. To form an amorphous semiconductor layer of the opposite conductivity type in the portion where the amorphous semiconductor layer of one conductivity type has been etched away, for example, the amorphous semiconductor layer of one conductivity type is covered with a metal mask and the amorphous semiconductor layer of one conductivity type is etched away. An amorphous semiconductor layer of the opposite conductivity type may be deposited only on the overlapped portion, or an amorphous semiconductor layer of the opposite conductivity type may be deposited on the entire surface, and an amorphous semiconductor layer of the opposite conductivity type may be deposited on the overlapping portion. It may also be formed by removing. Further, the amorphous semiconductor layer of one conductivity type and the amorphous semiconductor layer of the opposite conductivity type are formed in contact with each other without creating a gap. Note that the amorphous semiconductor layer of one conductivity type and the amorphous semiconductor layer of the opposite conductivity type may be formed so as to partially overlap. Next, the insulating substrate 1 is heated to 500 to 600° C. for about 2 hours to exhaust hydrogen in the amorphous semiconductor layers 2 and 3. That is, in order to uniformly deposit the amorphous semiconductor layers 2 and 3 on the insulating substrate 1, it is necessary to contain hydrogen to saturate the silicon bonds. For example, the insulating substrate 1 is
When the amorphous semiconductor films 2 and 3 are deposited by heating to 300° C., about 1021 cm" of hydrogen is contained in the amorphous semiconductor films 2 and 3. However, when the amorphous semiconductor films 2 and 3 are made into single crystals while containing hydrogen, the hydrogen bumps when heated by laser irradiation, causing the amorphous semiconductor films to peel off from the insulating substrate. Therefore, the insulating substrate 1 was
By heating to 600°C, hydrogen in the amorphous semiconductor layers 2 and 3 is reduced to 1
0′! Reduce the number of particles to about m-'. Note that if the heat treatment temperature is less than 500°C, it is difficult to reduce the hydrogen content to the desired value, and if the heat treatment temperature is 600°C or higher, the amorphous semiconductor layers 2 and 3 will become polycrystalline and the film will not be formed during the single crystallization process. cracks are more likely to occur. Therefore, it is desirable that this heat treatment be carried out at a temperature in the range of 500 to 600°C. Next, as shown in the same figure (a), amorphous semiconductor layers 2 and 3
A laser beam is irradiated to form a single crystal, and at the same time a semiconductor junction consisting of a semiconductor single crystal 2 of one conductivity type and a semiconductor single crystal 3 of the opposite conductivity type is formed. As a laser,
.. For example, when the beam spot is 20 to 100 μm, the power is 0.
.. A continuous wave argon laser of 5 to 20 W is preferably used, and the scanning speed is about 1 to 20 cm/sec.
When irradiated with laser light, the amorphous semiconductor films 2 and 3 become 140
When heated above 0°C, it melts instantaneously, and when a laser beam passes through it, it instantly solidifies and becomes a single crystal. In order to clarify the boundary of the impurity diffusion region of the semiconductor junction and improve device characteristics such as so-called reverse direction characteristics and leakage current, it is desirable to make the scanning speed of the laser as fast as possible within the range that can form a single crystal. In order to instantly solidify the amorphous semiconductor layers 2 and 3, it is preferable to apply a viscous substance such as polyethylene glycol that promotes heat dissipation onto the amorphous semiconductor layers 2 and 3, and then irradiate the layers with laser light. Further, silicon oxide li (S z 02
) etc. to a thickness of about 0.5 μm using, for example, plasma CVD. Because the amorphous semiconductor layer 2
, 3 can quickly absorb heat when heated by a laser and instantly solidify, and can prevent contamination from the atmosphere into the amorphous semiconductor layers 2 and 3. This is because it is possible to prevent the undulations, etc. on the surface of 2 and 3.
Note that the impurity concentration of the semiconductor single crystal 2 of one conductivity type and the semiconductor single crystal 3 of the opposite conductivity type directly depends on the concentration of impurity gas when forming the amorphous semiconductor layers 2 and 3. In the above embodiment, it has been described that a p-n junction is formed between an amorphous semiconductor layer of one conductivity type and an amorphous semiconductor layer of another conductivity type. ) It is also possible to form a curved 4"-p n 1" junction as shown in FIG.
, 3, by forming a field oxide film or a gate insulating film made of silicon oxide, silicon nitride, etc., and further forming source electrodes, gate electrodes, and drain electrodes made of aluminum, nickel, etc. in predetermined parts. C-M consisting of channel transistors
O.S. }-A transistor can be formed extremely easily. (Effects of the Invention) As described above, according to the method for forming a semiconductor thin film according to the present invention, an amorphous semiconductor layer of 7 conductivity types is formed on an insulating substrate, a predetermined portion is etched away, and a An amorphous semiconductor layer of a conductivity type opposite to the one conductivity type is deposited on a portion of the insulating substrate from which the one conductivity type amorphous semiconductor layer is removed, in contact with the one conductivity type amorphous semiconductor layer. By irradiating these amorphous semiconductor layers with laser light and melting and solidifying them, the semiconductor layer is made into a single crystal, and at the same time, a semiconductor composed of a semiconductor single crystal of one conductivity type and a semiconductor single crystal of another conductivity type is formed. By controlling the shape of the junction, it is possible to form a homogeneous semiconductor thin film over a large area in a simple process without using large-scale equipment such as an ion implanter, and without going through a high-temperature treatment process. As a result, transistors with different channels such as C-MOS can be easily formed on an inexpensive, large-area substrate such as glass.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(3)(ij (c)(イ)はそれぞれ本発明に
係る薄膜半導体の製造方法を説明するための図、第2図
(a)(bl(c)(イ)はそれぞれ他の実施例を説明
するための図、第3図は従来の半導体薄膜の製造方法を
説明するための図である. 1、絶縁基板 2、一導電型非晶質半導体層 3、反対の導電型非晶質半導体層
Figures 1 (3) (ij (c) and (a) are diagrams for explaining the method for manufacturing a thin film semiconductor according to the present invention, respectively, and Figures 2 (a) (bl (c) and (a) are diagrams for explaining the method for manufacturing a thin film semiconductor according to the present invention, respectively). Figure 3 is a diagram for explaining an example and a diagram for explaining a conventional method for manufacturing a semiconductor thin film. 1. An insulating substrate 2, an amorphous semiconductor layer 3 of one conductivity type, and a non-crystalline semiconductor layer of the opposite conductivity type. crystalline semiconductor layer

Claims (1)

【特許請求の範囲】[Claims] 絶縁基板上に一導電型の非晶質半導体層を被着形成して
所定部分をエッチング除去し、前記絶縁基板上の一導電
型非晶質半導体層を除去した部分に前記一導電型とは反
対の導電型の非晶質半導体層を前記一導電型非晶質半導
体層と接触した状態に被着形成し、これら非晶質半導体
層にレーザー光を照射して溶融・固化させることにより
半導体層を単結晶化すると同時に一導電型半導体単結晶
と他の導電型半導体単結晶とで構成される半導体接合部
を形成する半導体薄膜の形成方法。
An amorphous semiconductor layer of one conductivity type is deposited on an insulating substrate, a predetermined portion is etched away, and the amorphous semiconductor layer of one conductivity type is formed on the removed portion of the insulating substrate. An amorphous semiconductor layer of the opposite conductivity type is deposited in contact with the amorphous semiconductor layer of one conductivity type, and these amorphous semiconductor layers are irradiated with laser light to melt and solidify the semiconductor. A method for forming a semiconductor thin film in which a layer is single-crystalized and at the same time a semiconductor junction portion consisting of a semiconductor single crystal of one conductivity type and a semiconductor single crystal of another conductivity type is formed.
JP16048089A 1989-06-22 1989-06-22 Forming method of semiconductor thin film Pending JPH0324736A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16048089A JPH0324736A (en) 1989-06-22 1989-06-22 Forming method of semiconductor thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16048089A JPH0324736A (en) 1989-06-22 1989-06-22 Forming method of semiconductor thin film

Publications (1)

Publication Number Publication Date
JPH0324736A true JPH0324736A (en) 1991-02-01

Family

ID=15715863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16048089A Pending JPH0324736A (en) 1989-06-22 1989-06-22 Forming method of semiconductor thin film

Country Status (1)

Country Link
JP (1) JPH0324736A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6534832B2 (en) 1993-09-07 2003-03-18 Semiconductor Energy Laboratory Co., Ltd. Display device and glass member and substrate member having film comprising aluminum, nitrogen and oxygen
US7038302B2 (en) 1993-10-12 2006-05-02 Semiconductor Energy Laboratory Co., Ltd. Glass substrate assembly, semiconductor device and method of heat-treating glass substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6534832B2 (en) 1993-09-07 2003-03-18 Semiconductor Energy Laboratory Co., Ltd. Display device and glass member and substrate member having film comprising aluminum, nitrogen and oxygen
US7038302B2 (en) 1993-10-12 2006-05-02 Semiconductor Energy Laboratory Co., Ltd. Glass substrate assembly, semiconductor device and method of heat-treating glass substrate

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