JPH03247186A - Video signal encoding method - Google Patents

Abstract

PURPOSE:To prevent a change in picture quality which is uncomfortable to eyes from being caused in a picture data by devising the method such that a quantization step size is not revised when a in-frame encoding processing in a forced refresh mode is designated while the said mode is repeated at a prescribed period. CONSTITUTION:A quantization control unit 36 discriminates whether or not a type of a processing object macro block is of the forced refresh. When the answer is affirmative, the quantization control unit 36 sets a preceding frame quantization step size PQNT used for the quantization processing as a quantization step size PQNT. Then the quantization is executed by the same quantization step size as that of the preceding frame. Thus, when the forced refresh processing is executed, a change in the picture quality practically not causing unpleasant observation is avoided.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A: Industrial field of application B: Outline of the invention C: Prior art (Figs. 10 to 12) D: Problems to be solved by the invention (Fig. 11) E! l! !
Means for solving (Fig. 1) F effect (Fig. 1) G embodiment (G1) Overall configuration of image information transmission system (Figs. 1 to 5) (G2) Quantization step size determination process ( Figures 1 and 6
7, 8 and 9) (G3) Other embodiments H Effects of the invention The image data is converted into image data.

B. Summary of the Invention According to the present invention, in a video signal encoding method, the quantization step size is not changed during forced refresh mode, thereby making it possible to prevent an unsightly change in image quality from occurring during forced refresh.

C. Conventional technology Conventionally, in video telephone systems and conference call systems, relatively severe limitations on transmission capacity have been achieved by highly efficient encoding of video signals consisting of moving images into intra-frame encoded data and inter-frame encoded data. A video signal transmission system has been proposed in which a moving image signal is transmitted through a certain transmission path (Japanese Patent Laid-Open No. 1183/1983).

That is, for example, as shown in FIG. 10(A), at time j
=t+, Lz, t3... When trying to transmit each image PCI, PO2, PO2... that makes up the moving image, the video signal has a feature that has a large autocorrelation as time passes. It is a process that increases transmission efficiency by compressing image data to be transmitted using a certain point, and intra-frame encoding processing is performed by compressing image data to be transmitted. For example, compression processing such as comparing pixel data with a predetermined reference value to find a difference is performed, and thus each image PCI, PO2, PO2
. . . A compressed amount of image data is transmitted using autocorrelation between pixel data within the same frame.

In addition, the interframe encoding process is performed sequentially on adjacent images PCI and PO2, PO2 and P as shown in FIG.
Image data PC12, PO23, etc. consisting of the difference in pixel data between O2, etc. are obtained, and this is calculated at time 1=1. The initial image Pct is transmitted together with the intra-frame encoded image data.

In this way, the images PCI, PO2, PO2, etc. can be encoded with high efficiency into digital data with a much smaller amount of data than in the case of transmitting all the image data, and can be sent to the transmission path. .

Such video signal encoding processing is executed in the image data generation device 1 having the configuration shown in FIG.

The image data generation device 1 processes the input video signal VD in the preprocessing circuit 2 to perform processing such as one field drop processing and one field line thinning processing, and then converts the luminance signal and chroma signal into 16 pixels (horizontally). ×16
It is converted into transmission unit block (referred to as a macroblock) data Sit consisting of data for pixels (in the vertical direction) and is supplied to the image data encoding circuit 3.

The image data encoding circuit 3 generates interframe encoded data by receiving the predicted current frame data S12 formed in the predictive encoding circuit 4 and calculating the difference from the macroblock data Sll, and converts the data into interframe encoding mode. or by determining the difference between the macroblock data Sll and the reference value data to form intra-frame encoded data, which is supplied to the transform encoding circuit 5 as difference data S13.

The transform encoding circuit 5 is composed of a discrete cosine transform circuit, and sends out quantized image data S15 by supplying transform encoded data S14, which is obtained by orthogonally transforming the difference data S13 and encoding it with high efficiency, to the quantization circuit 6. let

The quantized image data S obtained from the quantization circuit 6 in this way
15 is subjected to high-efficiency encoding processing again in the retransformation encoding circuit 7 including a variable length encoding circuit, and then supplied to the transmission buffer memory 8 as transmission image data S16.

In addition, the quantized image data 315 is subjected to inverse quantization and inverse transform encoding processing in the predictive encoding circuit 4, and is decoded into difference data. After that, the pre-prediction frame data is corrected by the difference data. In addition to storing new pre-prediction frame data, the pre-prediction frame data stored in the predictive encoding circuit 4 is motion-compensated using motion detection data formed based on the macroblock data Sll, thereby generating the predicted current frame data. This allows the data to be generated and supplied to the image data encoding circuit 3, so that the difference between the macroblock data Sll of the frame to be currently transmitted (that is, the current frame) and the predicted current frame data S12 can be obtained as difference data 313. is being done.

In the configuration of FIG. 11, when transmitting the moving image described above with reference to FIG. 10, first, at time tl in FIG. conversion circuit 3
enters the intra-frame encoding mode and supplies this to the transform encoding circuit 5 as the intra-frame encoded difference data S13, thereby passing it through the quantization circuit 6 and the re-transform encoding circuit 7 to the transmission buffer memory. 8 to transmit image data S
Supply L6.

At the same time, the quantized image data S15 obtained at the output end of the quantization circuit 6 is subjected to predictive coding processing in the predictive coding circuit 4, so that the pre-prediction data representing the transmission image data S16 sent to the transmission buffer memory 8 is Frame data is held in the previous frame memory, and subsequently, at time t2, when macroblock data Sll representing image PC2 is supplied to image data encoding circuit 3, motion compensation is performed on predicted current frame data 312, and image data is encoded. circuit 3
is supplied to

Thus, at time L = j z, the image data encoding circuit 3 generates the difference data S13 subjected to the interframe encoding process.
is supplied to the conversion encoding circuit 5, whereby the difference data representing the change in the image between the frames becomes the transmission image data S1.
6 is supplied to the transmission buffer memory 8, and the quantized image data S15 is also supplied to the predictive encoding circuit 4, whereby pre-prediction frame data is formed and stored in the predictive encoding circuit 4.

The same operation is repeated thereafter, and while the image data encoding circuit 3 executes interframe encoding processing, only the difference data representing the change in the image between the previous frame and the current frame is stored in the transmission buffer memory. 8 will be sent out sequentially.

The transmission buffer memory 8 stores the transmission image data S16 sent out in this way, and sequentially transfers the stored transmission image data 316 to the transmission data D at a predetermined data transmission rate determined by the transmission capacity of the transmission line 9. , and transmit it to the transmission line 9.

At the same time, the transmission buffer memory 8 detects the amount of remaining data and feeds back the remaining amount data S17 that changes according to the amount of remaining data to the quantization circuit 6, and performs a quantization step according to the remaining amount data S17. By controlling the size and adjusting the amount of data generated as the transmission image data 316, it is possible to maintain an appropriate remaining amount of data (an amount of data that does not cause overflow or underflow) in the transmission buffer memory 8. It is done like this.

Incidentally, when the remaining amount of data in the transmission buffer memory 8 increases to the allowable upper limit, by increasing the step size of the quantization step 5TPS (FIG. 12) of the quantization circuit 6 using the remaining amount data S17, By performing rough quantization in the quantization circuit 6, the transmitted image data S
16 data amount is reduced.

On the contrary, when the remaining amount of data in the transmission buffer memory 8 decreases to the allowable lower limit value, the remaining amount data S17 controls the step size of the quantization step 5TPS of the quantization circuit 6 to a small value. As a result, the quantization circuit 6
By performing fine quantization in the transmission image data S16, the amount of data generated for the transmission image data S16 is increased.

D Problems to be Solved by the Invention As described above, the conventional image data generation device 1 is capable of generating data most efficiently while matching the transmission condition in which the data transmission speed of the transmission data DiIIII is limited based on the transmission capacity of the transmission line 9. A transmission buffer memory 8 is provided as a means for transmitting significant image information, and a transmission buffer memory 8 is provided according to the remaining data amount of the transmission buffer memory 8 so that the remaining data amount of the transmission buffer memory 8 is always maintained in a state where it does not overflow or underflow. Although the quantization step size of the quantization circuit 6 is controlled, if it remains as it is, the image quality of the transmission data DTR^113 will be affected when the pre-prediction frame data stored in the predictive encoding circuit 4 is forcibly refreshed. There is a risk that it will become an eyesore.

Incidentally, in the forced refresh process, after the image data that has undergone intra-frame encoding processing is transmitted as transmission data D 71111183, the image data that has been subjected to inter-frame encoding processing based on this is continued to be transmitted for a long time. If even one bit of transmission error occurs during this period, the image data encoding circuit 3 By forcibly switching to the intra-frame encoding mode, the intra-frame encoded data, which is the standard for decoding the image data, is sent out as transmission data D TRANS on the receiving side, and is also stored in the predictive encoding circuit 4. This operation mode is called forced refresh mode.

The present invention has been made in consideration of the above points, and it is an object of the present invention to propose a video signal encoding method that can prevent obtrusive changes in image quality from occurring in transmitted data when such forced refresh processing is performed. It is.

Means for Solving EBB In order to solve this problem, in the present invention, the video signal VD is encoded alternately by intra-frame encoding or inter-frame encoding, and then quantized to convert it into quantized image data 339. In a video signal encoding method, when intraframe encoding processing in forced refresh mode is specified, the previous frame quantization step size PQ
Quantization is performed with a quantization step size QNT having the same value as NT.

F action When repeating forced refresh mode at a predetermined cycle,
By not changing the quantization step size QNT when intraframe encoding processing in forced refresh mode is specified, it is possible to prevent an unsightly change in image quality from occurring in decoded image data during forced refresh.

Embodiment G An embodiment in which the present invention is applied to a videophone will be described in detail below with reference to the drawings.

(G1) Overall configuration of image information transmission system In FIGS. 1 and 2, the image information transmission system 21 includes an encoder 2
1A and a decoder 21B, and the encoder 21A preprocesses the input video signals VD and H in the input circuit section 22, and then converts the input video signals VD and H into the analog/digital conversion circuit 23.
, the transmission unit block data consisting of pixel data for 16×16 pixels, that is, the input image data S21 consisting of the pixel data of the macro program MB, is sent to the pixel data processing system SYMI, and the pixel data processing system SY is sent to the pixel data processing system SYMI.
At the timing when pixel data is processed in units of macroblocks MB in each processing stage of MI, processing information data corresponding to the data to be processed is sequentially transmitted via the header data processing system SYM2. Pixel data and header data are processed by pixel data processing system SYMI and header data processing system SYM, respectively.
2, processed by the Vibrine method (.

In the case of this embodiment, macroblock data sequentially sent out as input image data S21 is extracted from frame image data FRM by a method as shown in FIG.

First, one frame image data FRM is divided into 2 (horizontally) x 6 (vertically) block groups GOB as shown in FIG. 3(A), and each block group GOB is divided into block groups GOB as shown in FIG. As shown in FIG. 3(B), it includes 11 (horizontally) x 3 (vertically) macroblocks MB, and each macroblock MB has 16×16 pixels as shown in FIG. 3(C). Luminance signal data Y, . ~
Yt+ (each consisting of luminance signal data for 8×8 pixels) and color signal data Cb and C7 consisting of color signal data corresponding to all pixel data of luminance signal data Y0° to YII
Contains.

In this way, the input image data S21 sent for each macroblock MB is given to the motion compensation circuit 25, and the motion compensation circuit 25 receives motion detection control given from the motion compensation control unit 26 provided for the Helada data processing system SYM2. In response to the signal 322, the pre-prediction frame memory 2
7 pre-prediction frame data 323 and input image data S2
1 to detect the motion vector data MVD (X) and MVD (V) and supply them to the motion compensation control unit 26 as data of the first hellada data MDI (FIG. 4). 25A, motion vector data MV is added to the pre-prediction frame data S23.
By performing motion compensation for D (X) and MVD (Y), predicted current frame data S24 is formed and is supplied to the image data encoding circuit 28 together with current frame data S25 consisting of input image data 521 that is currently being processed. do.

Here, the motion compensation control unit 26, as shown in FIG.
r and its block group (, OB (Figure 3 (A)
) Block group number data representing GOB addr
ess and macroblock number data MB address representing one of the macroblocks MB, thereby displaying the macroblocks MB that are sequentially transmitted to each processing stage of the pixel data processing system SYMI. Macroblock MB to be processed
flag data FLAGS representing the processing or processing format of the macroblock MB; and motion vector data MVD of the macroblock MB.
(x) and MVD 01) and difference data ΣA-B l representing the evaluation value thereof.

As shown in FIG. 5, the flag data FLAGS is designed to have a maximum of one word (16 bits) worth of flags, and the O-th bit contains the macroblock M to be processed.
A motion compensation control flag MConloff indicating whether or not B should be processed in motion compensation mode is set.

In addition, the first bit of the flag data FLAGS contains interframe/intraframe information indicating whether the macroblock MB to be processed should be processed in interframe coding mode or intraframe coding mode. Flag I
inter/Intra is set.

Further, a filter flag Filter onloff indicating whether or not to use the loop filter 25B of the motion compensation circuit 25 is set in the second bit of the flag data FLAGS.

Furthermore, the third bit of the flag data FLAGS contains block data Y6 included in the macroblock to be processed.
A transmission flag Coded/Not-coded indicating whether or not 0 to C- (FIG. 3(C)) should be transmitted can be set.

Further, the fourth bit of the flag data FLAGS can be set with a drop flag indicating whether or not to drop the macroblock MB to be processed.

In addition, the fifth bit of the flag data F^GS contains a forced refresh flag Refresh on indicating whether or not to forcibly refresh the macroblock MB to be processed.
loff can be set.

Furthermore, the sixth bit of the flag data FLAGS contains a macroblock power evaluation flag MBP appreciat
e can be set.

Further, the difference data Σl A-B l is the macroblock data A to be currently processed in the current frame data 325.
and the macroblock data B compensated by the detection motion vector of the pre-prediction frame data S23, and the detected motion vector can be evaluated based on this value.

The image data encoding circuit 28 supplies the current frame data S25 given from the motion compensation circuit 25 as is as difference data S26 to the transform encoding circuit 29 in the intraframe encoding mode, and in contrast, in the interframe encoding mode. At this time, difference data S26 consisting of the difference between the pixel data of the current frame data S25 and the pixel data of the predicted current frame data S24 is supplied to the conversion encoding circuit 29.

The header data processing system SYM2 is provided with an interframe/intraframe encoding control unit 30 corresponding to the image data encoding circuit 28, and a motion compensation control unit 26.
Inter/intraframe flag Inter/In for specifying the encoding mode of the image data encoding circuit 28 based on the header data HDI supplied from the image data encoding circuit 28 and the calculation data S31 supplied from the image data encoding circuit 28.
tra (FIG. 5) and a filter flag F for controlling the operation of the loop filter 25B of the motion compensation circuit 25.
The data necessary to obtain the filter onloff (FIG. 5) is calculated and sent to the filter control unit 31 as the second filter data HD2.

As shown in FIG. 4, the second header data HD2 includes transmission frame number data T constituting the header data MDI.
RCounter~Difference data Σl Power data Σ(A) necessary for inheriting A-B as is and forming interframe/intraframe encoding mode switching signal S33 and filter on/off signal S34 in filter control unit 31 (L) and Σ(A)” (H
), Σ(A-B)"(L) and Σ(A-B)"(H
), E (A-FB)” (L) and Σ(A-FB)”
(H) and Σ(A) are added in the interframe/intraframe encoding control unit 30.

Here, the power data Σ(A)"(L) and Σ(A)"
(H) represents the lower bit and upper bit of the 2-towa macroblock pixel data A of the current frame data S25,
Power data Σ(A-B)” (L) and Σ(A-B)
” (H) is the lower bit of the sum of squares of the difference A-B between the macroblock pixel data A of the current frame data S25 and the macroblock pixel data B of the predicted current frame data S24 formed without going through the loop filter 25B. and represents the upper bit, power data Σ(A-FB)” (L)
and Σ(A-F B)” (H) is the current frame data S
25 macroblock pixel data A and loop filter 2
The power data Σ
(A) represents the sum of the macroblock pixel data A of the current frame data S25, and the data amount is expressed as a power value in order to evaluate the size of the data to be processed (the sum of squares is a value independent of the sign). ).

The filter control unit 31 controls the image data encoding circuit based on the second frame data HD2 passed from the interframe/intraframe encoding control unit 30 and the remaining amount data S32 supplied from the transmission buffer memory 32. 2
8, and transmits a filter on/off signal S34 to the loop filter 25B,
A filter flag Filter onloff representing the contents of the filter on/off signal S34 is added to the second hellada data HD2 and passed to the threshold control unit 35 as third hellada data HD3.

Here, the filter control unit 31 first controls the image data encoding circuit 28 when the amount of data to be transmitted when performing interframe encoding processing is larger than the amount of data to be transmitted when performing intraframe encoding processing. Control to intraframe coding mode.

Further, the filter control unit 31 secondly controls the predicted current frame data S that has been processed in the loop filter 25B while processing in the interframe coding mode.
Predicted current frame data 32 that is not subjected to the processing from 24
If the difference value is smaller in the filter on/off signal S34, the loop filter 25B is controlled so as not to perform the filtering operation.

Thirdly, when the filter control unit 31 enters the forced refresh mode, it switches the image data encoding circuit 28 to the intraframe encoding mode using the interframe/intraframe encoding mode switching signal S33.

Furthermore, fourthly, the filter control unit 31 detects when the transmission buffer memory 32 is in a state where there is a risk of overflow based on the remaining amount data S32 supplied from the transmission buffer memory 32, and performs a preventive process. Third data HD3 containing flags instructing what to do is sent to the threshold control unit 35.

In this way, the image data encoding circuit 28 encodes the difference data S2 in a mode that minimizes the difference between the current frame data S25 and the predicted current frame data S24.
6 is supplied to the transform encoding circuit 29.

As shown in FIG. 4, the third header data HD3 includes transmission frame number data TRCo from the header data HD2.
unter ~ motion vector data MVD (x) and M
6 corresponding to block data yaa-cr in the filter control unit 31.
Filter flag for bits Filter onloff
is added.

The transform encoding circuit 29 is a discrete cosine transform circuit, and converts the coefficient value after the discrete cosine transform into 6
blocks Y0゜, Y, 1, YIo, Y+I, Cb
, C-, and sends it to the transmission block setting circuit 34 as converted encoded data S35 obtained by zigzag scanning.

The transmission block setting circuit 34 receives six block data Y which is sent out as converted encoded data 335. ~C,
(FIG. 3(C)), calculate the sum of squares of up to n pieces from the first coefficient data, and use the calculation result as power detection data S36 to the threshold control unit 35.
give it to

At this time, the threshold control unit 35 compares the power detection data 336 with a predetermined threshold for each block data Y0° to C7, and when the power detection data S36 is smaller than the threshold, does not allow transmission of the block data, and 6 bits of transmission permission/denial data CBPN indicating that it is allowed is formed when it is larger than that, and is added to the third hellada data HD3 passed from the filter control unit 31 and quantized as fourth hellada data HD4. At the same time as passing it to the control unit 36, the corresponding block data Y0° to C is sent from the transmission block setting circuit 34.
, , are sent out by the quantization circuit 37 as transmission block patterned data 337.

Here, the fourth header data HD4 is the transmission frame number data TRC of the header data HD3, as shown in FIG.
outer~Filter flag Filter onlo
block Y, in the threshold control unit 35, while taking over ff as is. A 6-bit transmission permission flag CBPN generated corresponding to C1 is added.

The quantization control unit 36 is the threshold control unit 3
The quantization step is performed by executing the quantization step size determination processing routine RTO shown in FIG. A size control signal S38 is given to the quantization circuit 37, which causes the quantization circuit 37 to perform quantization processing with a quantization step size adapted to the data included in the macroblock MB. The quantized image data S39 is supplied to the variable length encoding circuit 38.

At the same time, as shown in FIG. 4, the quantization control unit 36 generates block data Yoo=C-(third
Flag data FLAGS corresponding to each of the diagram (C))
and motion vector data MVO(x) and MVD CV
) and arranged in series to form data, which is passed to the variable length encoding circuit 38 and the inverse quantization circuit 40.

Here, the header data HD5 is as shown in FIG.
Transmission frame number data TR of header data HD4
Counter ~ Macroblock number data MB ad
At the same time, the quantization control unit 36 takes over the quantization size data QNT and the flags 7'-4FLAG for the block data Y0° to C1.
S, motion vector data MVD (x) and MVD
Add (y).

The variable length encoding circuit 38 performs variable length encoding processing on the Hellada data HD5 and the quantized image data S39 to form transmission image data S40, and supplies this to the transmission buffer memory 32.

The variable length encoding circuit 38 converts block data Yoo to C, .
When performing variable length encoding, the corresponding flag data FLA
When "drop-proof" or "untransmittable" is specified based on the GS, the block data is transmitted as image data 3.
40 and discards it without sending it.

The transmission buffer memory 32 stores the transmission image data S40 (at the same time, reads it at a predetermined transmission speed, combines it with the transmission audio data 341 sent from the audio data generator 42 in the multiplexer 41, and sends it to the transmission line 4).
Send to 3.

The dequantization circuit 40 dequantizes the quantized image data S39 sent from the quantization circuit 37 based on the header data HD5, and then supplies the dequantized data S42 to the inverse transform encoding circuit 43. Inverse transform encoded data S
43 and then supplied to the decoder circuit 44, and the encoded difference data S44 representing the image information thus sent out as the transmission image data S40 is stored in the pre-prediction frame memory 2.
7 to be supplied.

At this time, the pre-prediction frame memory 27 uses the encoded difference data 344 to perform a correction operation on the pre-prediction frame data stored up to that point and stores it as new pre-prediction frame data.

Thus, according to the encoder 21A having the configuration shown in FIG. 1, pixel data is pipeline-processed in macroblock units in the pixel data processing system SYM1 based on the header information supplied from the header data processing system SYM2. , the header data processing system S is synchronized with this.
By receiving and passing the header data in YM2, pixel data can be adaptively processed as necessary by adding or deleting header data as necessary at each processing stage of the header data processing system SYM2.

As shown in FIG. 2, the decoder 21B transfers the transmission data transmitted from the encoder 21A via the transmission line 43 to the transmission buffer memory 52 via the demultiplexer 51.
At the same time, the audio data receiving device 53 receives the transmitted audio data S51.

The image data received in the transmission buffer memory 52 is separated into received image data S52 and header data HDII in a variable length inverse transform circuit 54, and inversely quantized into inverse quantized data S53 in an inverse quantization circuit 55, and then converted into an inverse transform code. The data is subjected to discrete inverse transformation processing in the encoding circuit 56 and is inversely transformed into inversely transformed encoded data S54.

This inversely transformed encoded data S54 is given to the decoder circuit 57 together with the header data HD12 formed in the inverse quantizer 55, and is stored in the frame memory 58 as encoded difference data S55.

Thus, the encoded difference data S5 is stored in the frame memory 58.
The image data transmitted based on 5 is decoded,
The decoded image data S56 is converted into an analog signal in the digital/analog conversion circuit 59, and then sent out as an output video signal VDouy via the output circuit section 60.

(G2) Quantization step size determination processing The quantization control unit 36 executes the quantization step size determination processing routine RTO shown in FIG. 6 for each macroblock M.
Quantization step size QN that adapts to the image data format of B (this is called a macroblock type)
By selecting T and supplying it to the quantization circuit 37 as a quantization step size control signal 538, the quantization circuit 37 is controlled so as not to cause disturbances in image quality that may occur depending on the macroblock type.

In this embodiment, as shown in FIG. 7, the quantization circuit 37 sets the quantization step size QNT to an upper limit value QNT=
31 to the lower limit value QNT=1, and the quantization control unit 36 sets the remaining data amount Buffer of the transmission buffer memory 32 to a value corresponding to the variable control range of the quantization step size QNT, that is, the quantization control unit 36 The quantization step size QNTO value is set to the macroblock type Macr so that it becomes an appropriate value that falls within the size controllable range QCR.

Adaptive control is performed according to Block Type.

(G2-1) Processing when the remaining amount of data is too large, that is, when the quantization control unit 36 enters the quantization step size determination processing routine RTO of FIG.
It is determined whether or not is larger than the sum of the margin l'largeae and the quantization size controllable range QCR.

If a positive result is obtained here, this means that the remaining data amount Buffer in the transmission buffer memory 32 exceeds the upper limit value, and in this case, the quantum controllable unit 36 moves to step SP2 and sets the quantization step size. After supplying the quantization step size control signal S38 that sets QNT to the maximum value, that is, QNT = 31, to the quantization circuit 37, the process moves to step SP3 and the currently set quantization step size QNT is set to the previous frame quantization step. Save as size PQNT.

In this way, the quantization control unit 36 ends the quantization step size determination processing routine RTO in step SP4, whereby the quantization circuit 37 executes quantization of the transformed encoded data S35 with the coarsest quantization step size.

As a result, the data amount of the quantized image data S39 generated from the quantization circuit 37 is controlled to the smallest value, thereby increasing the remaining data amount Buffe of the transmission buffer memory 32.
r is decreasing.

This operation is repeatedly executed while a positive result is obtained in step SPI, and as a result, the remaining amount of data in the transmission buffer memory 32 eventually reaches the sum QCR + Mar of the margin Margins and the quantization size controllable range QCR.
It becomes a value smaller than ine.

(G2-2) Processing in intra-frame coding mode In this state, the quantization control unit 36 moves to step SP5 because a negative result is obtained in step SPI, and selects the macroblock type Macro B.
Block no. whose lock type is an intraframe coded block and which is not a forced refresh block
t - Determine whether the block is a refresh block.

Here the macro block type Macro Block
As shown in FIG. 8, the type is represented by the second bit, the first bit, and the zeroth bit of the flag data FLAGS included in the header data HD4 passed from the threshold control unit 35 to the quantization control unit 36. , when these bits are "010", the macroblock type is intraframe coding type Intra, and roo
When oJ, it is interframe coding type Inter, and ro
o Motion compensation type MC-not using filter net when IJ
If "filtered" is "101", is the motion compensation type using a filter? Become IC-fi 1 tered.

Therefore, when an affirmative result is obtained in step SP5, this means that the second, first, and zeroth bits of the flag data FLAGS are "000" and the forced refresh flag refresh of the fourth bit is logic "0". It represents the status.

By the way, such a state means that the current frame changes so drastically from the previous frame that the macroblock type requires intra-filter encoding, and the condition is such that forced refresh mode is not currently specified. It means below.

Under such conditions, if the quantization circuit 37 performs quantization with a fine quantization step size, the amount of quantized image data 339 generated from the quantization circuit 37 becomes a large value, and eventually the buffer memory It can be said that the risk of overflow occurring in 32 is approaching.

At this time, the quantization control unit 36 moves to step SP6 and sets the quantization step size QNT to the upper limit value QNT=31.
, thereby executing processing to suppress the amount of quantized data 339 generated from the quantization circuit 37, thereby preventing the transmission buffer memory 32 from overflowing.

On the other hand, when a negative result is obtained in step SP5, this means that the type of macroblock to be processed is not intra-frame coding type Intra, or even if it is intra-frame coding type Intra, it is the result of forced refresh. In this case, the quantization control unit 36 jumps to this without processing step SP6.

(G2-3) Processing in forced refresh mode Next, in step SP7, the quantization control unit 36 determines that the type of macroblock to be processed is forced refresh type.
Determine whether or not it is a fresh block.

If a positive result is obtained here, this means that forced refresh is specified, and in this case, the quantization control unit 36 moves to step SP8 and sets the quantization step size QNT of the previous frame. Set the previous frame quantization step size PQNT used during quantization processing, and when it is specified that forced refresh processing should be performed, quantization is performed with the same quantization step size as the previous frame. Make it.

In this way, when performing the forced refresh process, it is possible to prevent the image quality from changing so that the forced refresh process does not become an eyesore in practice.

Incidentally, forced refresh is executed at a predetermined period and regardless of the image content, so if the value of the quantization step size changes compared to the previous frame even though there is no change in the image content, the corresponding Changes are often unsightly.

On the other hand, if the value of the quantization step size is not changed when forced refresh is specified, it is possible to prevent an unsightly change in the image from occurring during the refresh.

Note that, instead of selecting the same value as the value of the quantization step size, a slightly smaller value may be selected to obtain the same effect as in the above case.

Incidentally, when forced refresh is specified in a state where there is no change in the image, increasing the quantization step size will degrade the quality of the restored image, whereas increasing the quantization step size slightly If you make it smaller,
By slightly improving the image quality of the restored image, it is possible to make it virtually invisible to the human eye as a change in the image.

On the other hand, if a negative result is obtained in step SP7, this means that forced refresh is not currently specified, and in this case, the quantization control unit 36 does not perform the process in step SP8. Jump.

(G2-4) Processing when the power of differential data is large Next, in step SP9, the quantization control unit 36 determines that the macroblock type is interframe coding Inter and the macroblock power MBP is greater than a predetermined threshold value Threshold. Decide whether or not.

Here, the macroblock power MBP is defined by: Thus, if a positive result is obtained in step SP9, this means that the image data of the macroblock MB, that is, the macroblock power MBP of the difference data is large, so the macroblock power MBP is coarse to some extent. This means that even if the image is quantized using the quantization step size and transmitted, the image quality of the restored image will not be significantly degraded.

Therefore, when a macroblock that satisfies these conditions is subjected to discrete cosine transformation in the transform encoding circuit 29, the quantization control unit 36 confirms this in step SP9 and moves to step 5PIO to set the quantization step size QNT to the maximum value. It is set to a rough value, that is, an upper limit value of 31.

On the other hand, when transform encoded data 335 of a macroblock whose macroblock power MBP is not so large is sent, the quantization control unit 36 performs step 5.
Jump this to avoid processing PIO.

By the way, the macroblock power MBP expressed by equation (1) is obtained by calculating the weight of each macroblock based on the discrete cosine transform coefficient C0-tt (i) obtained as a result of the discrete cosine transform process in the transform encoding circuit 29. The weight of the discrete cosine transform coefficient represents the strength of the transmission signal obtained by performing the discrete cosine transform, and therefore, a large macroblock power MBP indicates that the transmission signal as a signal transmission means is Since the signal strength is large, this means that even if it is transmitted with some compression, the transmitted information can be correctly reproduced on the receiving side without being affected by external noise.

Therefore, in such a case, the quantization control unit 36 changes the quantization step size QNT to a large value to reduce the quantization data S39 generated in the quantization circuit 37.
By compressing the amount of data, the load on the transmission line 43 is reduced.

Incidentally, the discrete cosine transform circuit that constitutes the transform encoding circuit 29 is expressed by the following formula, F (u, v) cos ((2x+1) ・U・−] 6 ((2y+1) (2) The discrete cosine inverse transform circuit that performs the discrete cosine transform according to the following equation and forms the inverse transform encoding circuit 56 is expressed by the following equation, f(x.

y) ■ cos((2x+1) U・□〕 6 cos((2)'+1) ・V・□〕6 ...... (3) Execute the discrete cosine inverse transformation by. Here, xSy is a macro The coordinates of the pixel in the block (assumed to be the coordinates (0, 0) of the upper left corner), U, and ■ represent the coordinates of the coefficient during discrete cosine transformation.

Also, when U, V=O, become, In other cases, C(u)C(v)=1 ・・・・・・(5) become that way.

In practice, the transformations in equations (2) and (3) are performed by first converting the image data matrix into the image data matrix in the transform encoding circuit 29, where X is the image data matrix in the macroblock and C is the transformation matrix for discrete cosine After horizontally transforming
x) Obtain c-'.

The thus obtained transformed image data matrix C(X)C-1 has coefficients C-tt (1), C, -, as shown in FIG.
tt (2), C-tt (3)...C0-
tt (64) can be expressed as a transformation coefficient matrix consisting of an 8×8 matrix, and each coefficient caste of the transformation coefficient matrix
(t) (i=1 to 64) are read out from the transformation matrix while scanning in the order of i=1.2.3...64 as time passes.

In this way, one macroblock worth of image data is converted into transformation coefficients C0-ttci) (i=1 to 64) constituting a transformation matrix, which are supplied to the quantization circuit 37 as transmission data arranged in time series. It turns out.

The transform coefficient data sequence C,,tt (1), C,,tt (2), thus supplied to the quantization circuit 37...
・Com f f (64) represents the information to be transmitted as well as the strength of the signal to be transmitted. Therefore, as expressed by equation (1), the conversion coefficient Data string Caarr (1) (j=
The square of the conversion coefficient data from i=1 to n included in 1.2...64) is used to control the strength of the signal to be transmitted so that the influences in the horizontal and vertical directions are equal. This is the cumulatively added value, and after all, equation (1) defines this as the macroblock power MBP.

In practice, when a transform coefficient matrix as shown in FIG. 9 is obtained by discrete cosine transform of image data,
Power is concentrated in the transform coefficient ctsmtt (i) in the upper left corner, that is, a low-order transform coefficient, whereas the transform coefficient in the lower right corner, that is, a high-order transform coefficient, tends not to produce significant information. , Thus, compression of transmitted data can be realized by discrete cosine transformation.

Therefore, when it is confirmed in step SP9 of FIG. 6 that the macroblock type gate acro BLock Type is interframe coding type Inter, (1)
If it can be confirmed that the macroblock power MBP obtained based on the formula is larger than the predetermined threshold value Threshold, this means that the value of the difference data in the macroblock MB is sufficiently large, and therefore coarse quantization can be performed. This means that we have confirmed that. Therefore, if the quantization step size QNT is selected as the upper limit value in step 5PIO according to such a determination, the difference data can be transmitted using a relatively small amount of data.

(G2-5) Processing in interframe coding mode The quantization control unit 36 determines the macroblock type Macro 81ock Ty in step SPH in FIG.
pe is interframe coding type Inter, and macroblock power MBP is a predetermined threshold value Thre.
When it is confirmed that it is smaller than shold, step 5P
12, the quantization step size QNT is changed to the previous frame quantization step size P used in the previous frame.
Set to 1/2 value of QNT, then step 5P13
In step 5P14, it is determined whether or not the set quantization step size QNTO value is smaller than the lower limit value 1. If it is smaller, the quantization step size QNT is reset to the lower limit value 1 in step 5P14, and if it is not smaller than 1, it is reset. A process is performed in which the value as it is is set as the quantization step size QNT without being set.

Here, the macroblock power MBP represents the strength of the difference data signal of the image data of the macroblock as described above with respect to equation (1), so step 5 PII
If a positive result is obtained in , it means that the difference is small, and therefore the change in the content of the image is small compared to the image of the previous frame.

If such image data is obtained, this indicates that the image to be currently transmitted is in a state where the changes have only occurred to the extent that the image of the previous frame has been partially retouched without significantly changing it. ing.

Therefore, if the quantization control unit 36 finely halves the quantization step size PQNT based on the quantization processing result of the previous frame in step 5P12 and sets it as the quantization step size QNT of the current frame, By making the quantization step size finer for the current frame in which there is less movement compared to the previous frame, the quantization step size can be set to an optimal quantization step size.

This process of reducing the quantization step size is repeated after images with little movement (as long as the quantization control unit 36 repeatedly executes steps 5PII and 5P12, this process is necessary if images with little movement continue to be transmitted). This means that the quantization step size can be converged to a value that is compatible with .

Therefore, by preventing the quantization step size QNT from becoming smaller than the lower limit value 1 in steps 5P13 and 5PI4, the quantization control unit 36 ultimately reduces the quantization step size QNT when transmitting an image with little movement. This means that the quantization process can be performed stably while converging to the lower limit value.

On the other hand, when a negative result is obtained in step 5PII, the quantization control unit 36 determines that the change in the image to be currently transmitted is large, and steps 5P12.
Jump to this without processing 5P13.5P14.

(G2-6) Operation of the quantization control unit 36 In FIG. 6, first, the remaining amount data B of the transmission buffer memory 32 is
When buffer exceeds the upper limit (QCF +Margin), the quantization control unit 36 transfers it to step SP1.
quantization circuit 3 in step SP2.
The quantization step size QNT of 7 is set to an upper limit value of 31, thereby controlling the remaining data amount of the transmission buffer memory 32 to be maintained at the upper limit value or less by reducing the amount of data Buffer.

In this state, secondly, the macroblock type Mac
ro When block data whose Block Type is intra-frame coding type and which is not a forced refresh block is given to the quantization circuit 37, the quantization control unit 3
6 confirms this in step SP5 and proceeds to step S.
At P6, the quantization step size Q of the quantization circuit 37
By setting NT to the upper limit value 31, the transmission buffer memory 32 is controlled so as not to overflow.

In such an operation mode, the quantization control unit 36 sets the quantization step size set in step SP6 as the previous frame quantization step size PQNT in step SP3 because negative results are obtained in steps SP7 and SF3.5PII. After setting, the processing procedure ends.

Thirdly, when the quantization circuit 37 is given data having a forced refresh block type macroblock type, the quantization control unit 36 performs step SP L-3P5 in the quantization step size determination processing routine RTO.
- Determine this through the loop of SF3, and step SP
8, the quantization step size QN of the quantization circuit 37
By setting the previous frame quantization step size PQNT as T, and thereby preventing the image quality of the image to be transmitted from changing from the previous frame image when forced refresh mode is entered, it is possible to prevent unsightly changes in image quality during forced refresh. prevent this from occurring.

At this time, the quantization control unit 36 performs step SP9.5.
When a negative result is obtained in each PII, the quantization step size QNT set in step SP8 is set as the previous frame quantization step size PQNT in step SP3, and the process ends.

Fourth, the quantization circuit 37 has macroblock power MB
When image data of a macroblock with a large P is supplied, the quantization control unit 36 performs step SP1-3P in the quantization step size determination processing routine RTO.
1if this by looping 5-3P7-3P9! The quantization step size QNT of the quantization circuit 37 is set to an upper limit value of 31 in step 5 PIO, thereby suppressing the amount of data generated in the quantization circuit 37 to a small value, and as a result, it is much more efficient. Image data can be transmitted.

At this time, after the processing is completed, the quantization control unit 36 sets the quantization step size QNT set in step 5PIO as the previous frame quantization step size PQNT in step SP3 due to a negative result obtained in step 5PII. After the correction, the processing routine ends.

Fifth, when the quantization circuit 37 is supplied with inter-frame coded macroblock data having a small macroblock power MBP, the quantization control unit 36 processes it in step SP of the quantization step size determination processing routine RTO.
1-5P5-3P7-3P9-3P 11 is confirmed, and in step 5P12, the quantization step size is set by setting the value of 1/2 of the previous frame quantization step size PQNT as the quantization step size [INT]. Converge to the lower limit value 1.

In this way, it is possible to set an optimal quantization step size that is compatible with macroblock power MBP.

(G3) Other embodiments (1) Although the case where the quantization step size QNT is set to the upper limit value 31 in steps SP6 and 5PIO of FIG. 6 has been described, the quantization step size QN to be set is
T is not limited to the upper limit value, and other values may be selected (in short, a coarse quantization value that is large enough to perform coarse quantization may be selected).

(2) When determining the magnitude of macroblock power MBP in steps SP9 and 5PII of FIG.
Although the case has been described in which the same threshold value Threshold is selected, the same effect as in the above case can be obtained even if different values are selected instead.

(3) In step 5P12 of FIG. 6, the quantization step size QNT is changed to the previous frame quantization step size PQ.
We have described the case where the value is set to 1/2 when calculating from NT, but the ratio is not limited to 1/2 and may be changed to other values as necessary. The quantization step size may be selected to be smaller than the quantization step size by a predetermined ratio.

(4) Although we have described the case where the quantization step size QNT is converged to the lower limit value 1 in steps 5P13 and 5P14 in FIG. You may choose.

H Effects of the Invention As described above, according to the present invention, when the forced refresh mode is specified, the quantization step size is set to the same value as the previous frame quantization step size, thereby eliminating the unsightly effect during forced refresh. It is possible to prevent changes in image quality from occurring.

[Brief explanation of drawings]

1 and 2 are block diagrams showing an encoder and a decoder constituting an image information transmission system to which the video signal encoding method according to the present invention is applied, FIG. 3 is a route map showing the structure of frame image data, and FIG. The figure is a block diagram showing the Herada data processing system in Figure 1, Figure 5 is a route map showing the configuration of the flag data in Figure 4, and Figure 6 is the quantization step size of the quantization control unit 36 in Figure 1. A flowchart showing the determination processing routine, FIG. 7 is a curve diagram showing changes in the remaining amount data of the transmission buffer memory 32 in FIG. 1, FIG. 8 is a chart showing types of macroblock types, and FIG. 9 is a conversion coefficient matrix. FIG. 10 is a route diagram for explaining intra-frame/inter-frame encoding processing, FIG. 11 is a block diagram showing a conventional image data generation device, and FIG. 12 is a curve diagram showing its quantization step. It is. 21... Image information transmission system, 21A...
... Encoder, 21B ... Decoder, 25
... Motion compensation circuit, 26 ... Motion compensation control unit, 27 ... Pre-prediction frame memory, 28 ... Image data encoding circuit, 29 ...・
... Conversion encoding circuit, 30 ... ... Interframe/
Intraframe encoding control unit, 31... Filter control unit, 32... Transmission buffer memory, 34... Transmission block setting circuit, 35...
...Threshold control unit, 36...
Quantization control unit, 37...Quantization circuit, 3
8...Variable length encoding circuit.

Claims (1)

[Claims] A video signal encoding method in which a video signal is alternately encoded by intra-frame encoding or inter-frame encoding and then quantized to convert it into quantized image data, comprising: using a forced refresh mode; A video signal encoding method characterized in that when intraframe encoding processing is specified, quantization is performed with a quantization step size that is the same value as a previous frame quantization step size.