JP3154254B2 - Image data encoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A Industrial application field B Outline of the invention C Conventional technology (FIGS. 8 to 10) D Problems to be solved by the invention E Means to solve the problems (FIGS. 1 and 6) F function (FIGS. 1 and 6) G Embodiment (G1) Overall Configuration of Image Information Transmission System (FIGS. 1 to 5) (G2) Frame Drop Processing by Embodiment (FIGS. 1, 4 and 5) (G3) FIGS. 6, 6 and 7) (G3) Other Embodiments H Effects of the Invention A Industrial Field of the Invention The present invention relates to an image data encoding device, for example, converting a video signal into highly efficient encoded data. This is suitable for application in the case of transmitting data by transmission.

B. Outline of the Invention In the present invention, in the image data encoding apparatus, when performing the frame dropping process according to the remaining data amount in the transmission buffer memory, the frame dropping process is terminated with respect to the remaining data value at which the frame dropping process is started. By setting the remaining data value to be set to a small level, the movement of the transmitted image can be visually further smoothed.

C Conventional Techniques Conventionally, in videophone systems and conference telephone systems, relatively strict restrictions have been placed on transmission capacity by efficiently encoding video signals consisting of moving images into intra-frame encoded data and inter-frame encoded data. A video signal transmission system for transmitting a moving image video signal through a certain transmission path has been proposed (Japanese Patent Application Laid-Open No. 63-1183).

That is, for example, as shown in FIG.
_{= T 1, t 2, t} 3 each image PC1 constituting the video at ......, P
When trying to transmit C2, PC3 ..., the image signal to be transmitted is compressed using the point that the video signal has a feature that the autocorrelation is large as time elapses, thereby improving the transmission efficiency. The intra-frame encoding process performs a compression process on the images PC1, PC2, PC3,..., For example, by comparing pixel data with a predetermined reference value to obtain a difference. , PC2, PC3,... Are transmitted using compressed autocorrelation between pixel data in the same frame.

In addition, the inter-frame encoding process obtains image data PC12, PC23,..., Which are differences of pixel data between adjacent images PC1, PC2, PC2, PC3,. This for the initial image PC1 at the time t = t ₁ transmitting with intraframe coded processed image data.

Thus, the images PC1, PC2, PC3,... Can be highly efficiently coded into digital data having a significantly smaller data amount than when all the image data is transmitted, and transmitted to the transmission path.

Such an encoding process of the video signal is executed in the image data generating device 1 having the configuration shown in FIG.

The image data generator 1 processes the input video signal VD in the pre-processing circuit 2 to perform one-field dropping processing and one-field line thinning processing, and then converts the luminance signal and the chroma signal into 16 pixels (in the horizontal direction). The data is converted into transmission unit block data (referred to as macroblock) data S11 composed of data of × 16 pixels (in the vertical direction) and supplied to the image data encoding circuit 3.

The image data encoding circuit 3 receives the predicted current frame data S12 formed in the prediction encoding circuit 4 and calculates the difference from the macroblock data S11 to generate inter-frame encoded data (this is inter-frame encoded data). (Referred to as an encoding mode) or the difference between the macroblock data S11 and the reference value data to form intra-frame encoded data, which is supplied to the transform encoding circuit 5 as difference data S13.

The transform coding circuit 5 is composed of a discrete cosine transform circuit. The transform coding data S14 obtained by performing high-efficiency coding by orthogonally transforming the difference data S13 is supplied to the quantizing circuit 6 so as to obtain quantized image data. Send S15.

Thus, the quantized image data obtained from the quantization circuit 6
S15 is again subjected to high-efficiency encoding processing in the re-transform encoding circuit 7 including the variable-length encoding circuit, and then supplied to the transmission buffer memory 8 as transmission image data S16.

In addition, the quantized image data S15 is subjected to inverse quantization and inverse transform coding in the predictive coding circuit 4 to be decoded into differential data, and then to correct the unpredicted frame data using the differential data. Thus, new pre-prediction frame data is stored, and prediction is performed by motion-compensating the pre-prediction frame data stored in the prediction encoding circuit 4 with motion detection data formed based on the macroblock data S11. The current frame data can be formed and supplied to the image data encoding circuit 3, whereby the difference between the macroblock data S11 of the frame to be currently transmitted (that is, the current frame) and the predicted current frame data S12 is calculated as difference data. It is made to get as S13.

9 in the configuration of Figure, when transmitting the moving image as described above for Figure 8, when the first image data of the image PC1 at the time t ₁ of FIG. 8 (A) is given as a macro Bro poke data S11, the image data The encoding circuit 3 enters the intra-frame encoding mode and supplies it to the transform encoding circuit 5 as differential data S13 subjected to intra-frame encoding processing, thereby passing through the quantization circuit 6 and the re-transform encoding circuit 7. Then, the transmission image data S16 is supplied to the transmission buffer memory 8.

At the same time, the quantized image data S15 obtained at the output terminal of the quantizing circuit 6 is subjected to predictive encoding processing in the predictive encoding circuit 4, whereby the unpredicted frame representing the transmitted image data S16 transmitted to the transmission buffer memory 8 is transmitted. data is held before the frame memory, when the macro Bro poke data S11 representing an image PC2 Subsequently at time t ₂ is supplied to the image data coding circuit 3, the predicted current frame data S12
And supplied to the image data encoding circuit 3.

Thus the image data coding circuit 3 at time t = t ₂
Supplies the differential data S13 subjected to the inter-frame encoding processing to the transform encoding circuit 5, whereby differential data representing a change in the image between the frames is supplied to the transmission buffer memory 8 as transmission image data S16, and When the quantized image data S15 is supplied to the prediction encoding circuit 4, the prediction encoding circuit 4 forms and stores the pre-prediction frame data.

By repeating the same operation thereafter, while the image data encoding circuit 3 executes the inter-frame encoding process, only the difference data representing the change of the image between the previous frame and the current frame is transmitted to the transmission buffer memory 8. Will be sequentially transmitted.

The transmission buffer memory 8 stores the transmission image data S16 sent out in this manner, and sequentially stores the stored transmission image data S16 at a predetermined data transmission speed determined by the transmission capacity of the transmission line 9 as transmission data D _TRANS. And transmit it to the transmission line 9.

At the same time, the transmission buffer memory 8 detects the amount of remaining data, feeds back the remaining data S17 that changes according to the amount of remaining data to the quantization circuit 6, and sets the quantization step size according to the remaining amount data S17. By controlling, by adjusting the amount of data generated as the transmission image data S16, it is possible to maintain an appropriate remaining amount of data (a data amount that does not cause overflow or underflow) in the transmission buffer memory 8. ing.

By the way, when the remaining amount of data in the transmission buffer memory 8 increases to the allowable upper limit, the step size of the quantization step STPS (FIG. 10) of the quantization circuit 6 is increased by the remaining amount data S17. The amount of transmission image data S16 is reduced by causing the quantization circuit 6 to perform coarse quantization.

Conversely, when the remaining amount of data in the transmission buffer memory 8 has decreased to the allowable lower limit, the remaining amount data S17 controls the quantization step STPS of the quantization circuit 6 so that the step size becomes smaller. Thus, the amount of data generation of the transmission image data S16 is increased by causing the quantization circuit 6 to execute fine quantization.

D Problems to be Solved by the Invention In the image data generating apparatus 1 having such a configuration, when the moving image to be transmitted is an image with a sharp movement, or when the content of the image greatly changes, for example, scene change or the like. In this case, the transmission buffer memory overflows due to an increase in the amount of encoded transmission data.

As one method for solving this problem, a method has been considered in which, when the amount of generated transmission data increases, the next frame is not subjected to the encoding process and the frame is dropped.

However, in the case of transmitting a rapidly moving image for a relatively long period of time, since the amount of transmission data continues to increase during this period, dropouts are repeated frequently, and the smoothness of the reproduced moving image is smooth. However, there is a problem of visual loss, and it is still insufficient for transmitting moving images.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and it is an object of the present invention to propose a video signal encoding apparatus which drops frames while making the motion of a moving image visually as smooth as possible.

Means for Solving Problem E In order to solve the problem, in the present invention, in an image data encoding device that encodes input image data,
Quantizing means for quantizing the input image data, encoding means for encoding the quantized image data, and decoding of the encoded image data via a transmission medium, based on the supplied quantization step. Buffer means for storing the coded image data for transmission to the encoding device, and quantization means for maintaining the remaining data amount of the buffer means within a predetermined range based on the remaining data amount of the buffer means. Quantization step control means for controlling the quantization step of the input image data based on the quantization step controlled by the quantization step control means, and the quantized image data is transmitted to the encoding means. When the coded image data is stored in the buffer means and the remaining amount of data in the buffer means exceeds a predetermined upper limit value, the buffer operation is performed. The encoding means is controlled so as to stop the supply of the encoded image data to the buffer means, and when the remaining data amount of the buffer means decreases to a predetermined target value smaller than the upper limit, the encoding to the buffer means is performed. By controlling the encoding means so as to cancel the stop of the supply of the image data, the image data quantized based on the quantization step corresponding to the remaining data amount of the buffer means is encoded by the encoding means. And control means for starting to supply the coded image data to the buffer means.

F function When the remaining data value Buffer of the transmission buffer circuit 32 exceeds the upper limit value (QNT = 31), after specifying the execution line of the frame dropping process, the remaining data value Buffer becomes larger than the upper limit value (QNT = 31). By specifying the end of the frame drop processing when the value falls below the small target value MG (QNT = 1), the frame drop processing is performed even when the remaining data value Buffer suddenly increases after the frame drop processing is completed. It is possible to avoid resuming immediately, and when the amount of data generation decreases after the frame dropping process is completed, the data remaining amount Buffer is immediately set to the target value MG (QNT =
1) can be converged.

Thus, the movement of the output image can be visually smoothed, and the deterioration of the image quality can be avoided.

G Example Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

(G1) Overall Configuration of Image Information Transmission System In FIGS. 1 and 2, the image information transmission system 21 is composed of an encoder 21A and a decoder 21B, and the encoder 21A converts an input video signal VD _IN into an input circuit unit 22. After the pre-processing, the analog / digital conversion circuit 23 sends the transmission unit block data composed of pixel data of 16 × 16 pixels, that is, the input image data S21 composed of the pixel data of the macroblock MB, to the pixel data processing system SYM1, At each processing stage of the pixel data processing system SYM1, processing information data corresponding to the data to be processed is sequentially transmitted via the header data processing system SYM2 at a timing when the pixel data is processed in units of macroblocks MB. Thus, the pixel data and the header data are respectively transferred to the pixel data processing system SYM1 and the header data. Processing is performed in the data processing system SYM2 according to the pipeline method.

In the case of this embodiment, the macroblock data sequentially transmitted as the input image data S21 is extracted from the frame image data FRM by a method as shown in FIG.

First, one frame image data FRM is divided into two (in the horizontal direction) × 6 (in the vertical direction) block groups GOB as shown in FIG.
OB is 11 (horizontally) x 3 as shown in Fig. 3 (B).
(Vertically) macroblocks MB, each macroblock MB having 16 blocks as shown in FIG. 3 (C).
× 16 pixels of luminance signal data Y _{00 to} Y ₁₁ (8 × 8
And luminance signal data Y).
₀₀ to Y comprising the color signal data C _b and C _r consisting of the corresponding color signal data to all the pixel data of _11.

Thus, the input image data S21 transmitted for each macroblock MB is given to the motion compensation circuit 25,
5 is a motion detection control signal given from a motion compensation control unit 26 provided for the header data processing system SYM2.
In response to S22, the pre-prediction frame data S23 of the pre-prediction frame memory 27 is compared with the input image data S21 to detect the motion vector data (MVD (x) and MVD (y), and to the motion compensation control unit 26 1 header data HD1 (Fig. 4)
And the motion compensation circuit body 25A
, The motion vector data MVD (x) and MVD (y) are subjected to motion compensation for the pre-prediction frame data S23 to form the predicted current frame data S24, which is composed of the input image data S21 currently being processed. The image data is supplied to the image data encoding circuit 28 together with the frame data S25.

Here, as shown in FIG. 4, the motion compensation control unit 26 includes, for each macroblock currently being processed as the first header data HD1, the transmission frame number data TR Counter indicating the transmission order of the frame image data FRM, By adding the block group number data GOB address representing the block group GOB (FIG. 3 (A)) and the macro block number data MB address representing the macro block MB among them, the pixel data processing system SYM1 is sequentially processed. The macro block MB transmitted to each processing stage is displayed, and the macro block to be processed is displayed.
Flag data FLAGS indicating MB processing or processing format,
Motion vector data MVD (x) of the macro block MB
And MVD (y) and difference data Σ | AB
|

The flag data FLAGS has a maximum of 1 as shown in FIG.
A flag for a word (16 bits) can be set, and a motion compensation control flag MC on / off indicating whether or not the processing target macroblock MB should be processed in the motion compensation mode is set in the 0th bit. You.

The first bit of the flag data FLAGS contains an interframe / intraframe indicating whether the processing target macroblock MB should be processed in the interframe coding mode or the intraframe coding mode. Flag Inter /
Intra is set.

In the second bit of the flag data FLAGS, a filter flag Filter on / off indicating whether or not to use the loop filter 25B of the motion compensation circuit 25 is set.

The third bit of the flag data FLAGS also blow included in the process target macroblock poke data Y ₀₀ -C _r
A transmission flag Coded / Not-coded indicating whether or not (FIG. 3 (C)) should be transmitted can be set.

In the fourth bit of the flag data FLAGS, a drop frame flag indicating whether or not the target macroblock MB is dropped can be set.

Further, in the fifth bit of the flag data FLAGS, a forced refresh flag Refresh on / off indicating whether or not to perform a forced refresh of the macroblock MB to be processed can be set.

Further, a macro block power evaluation flag MBP appreciate can be set in the sixth bit of the flag data FLAGS.

The difference data Σ | A−B | is the difference between the macroblock data A to be currently processed in the current frame data S25 and the macroblock data B compensated by the motion vector for detection in the frame data S23 before prediction. , Which can be used to evaluate the detected motion vector.

The image data encoding circuit 28 outputs the current frame data S2 given from the motion compensation circuit 25 in the intra-frame encoding mode.
5 is supplied as it is to the transform coding circuit 29 as difference data S26, and in contrast, in the inter-frame coding mode, the pixel data of the current frame data S25 and the predicted current frame data S
The difference data S 26, which is a difference from the 24 pixel data, is supplied to the transform encoding circuit 29.

The image data encoding circuit 28 is included in the header data processing system SYM2.
An inter-frame / intra-frame encoding control unit 30 is provided so as to correspond to the image data. Based on the header data HD1 supplied from the motion compensation control unit 26 and the arithmetic data S31 supplied from the image data encoding circuit 28, the An inter / intra flag Inter / Intra (FIG. 5) for designating the encoding mode of the encoding circuit 28 and a filter flag Filter on / off (FIG. 5) for controlling the operation of the loop filter 25B of the motion compensation circuit 25. 5) is calculated and sent to the filter control unit 31 as second header data HD2.

As shown in FIG. 4, the second header data HD2 is composed of the transmission frame number data TR Co constituting the header data HD1.
power data necessary for the filter control unit 31 to generate the inter-frame / intra-frame coding mode switching signal S33 and the filter on / off signal S34, while taking over the unter ~ difference data {| A-B |
(A) ² (L) and Σ (A) ² (H), Σ (AB) ²
(L) and Σ (AB) ² (H), Σ (A-FB)
² (L) and Σ (A-FB) ² (H), Σ (A) are added in the inter-frame / intra-frame coding control unit 30.

Here, the power data Σ (A) ² (L) and Σ (A)
² (H) indicates the lower bit and the upper bit of the square sum of the macroblock pixel data A of the current frame data S25,
Power data Σ (AB) ² (L) and Σ (AB) ²
(H) shows the lower bits of the sum of squares of the difference AB between the macroblock pixel data A of the current frame data S25 and the macroblock pixel data B of the predicted current frame data S24 formed without passing through the loop filter 25B; Represents the high-order bits and represents power data Σ (A-FB) ² (L) and Σ (AF)
B) ² (H) is the macroblock pixel data A of the current frame data S25 and the macroblock pixel data FB of the predicted current frame data S24 formed via the loop filter 25B.
The power data 及 び (A) represents the sum of the macroblock pixel data A of the current frame data S25, and the size of the data to be processed is evaluated. Therefore, the data amount is expressed as a power value (the sum of squares is obtained as a value irrelevant to the sign).

The filter control unit 31 receives the second header data passed from the inter-frame / intra-frame coding control unit 30.
On the basis of HD2 and the remaining amount data S32 supplied from the transmission buffer memory 32, an inter-frame / intra-frame encoding mode switching signal S33 is sent to the image data encoding circuit 28, and the loop filter 25B is sent to the loop filter 25B. A filter on / off signal S34 is sent out, and a filter plug Filter on / o representing the content of the filter on / off signal S34 is provided.
ff is added to the second header data HD2 and passed to the threshold control unit 35 as the third header data HD3.

Here, the filter control unit 31 first activates the image data encoding circuit 28 when the amount of transmission data in the case of performing inter-frame encoding processing is larger than the amount of transmission data in the case of performing intra-frame encoding processing. Control to intra-frame encoding mode.

Secondly, the filter control unit 31 is configured such that in the state where the processing is performed in the inter-frame coding mode, the predicted current frame data S24 that has not undergone the processing is better than the predicted current frame data S24 that has been processed in the loop filter 25B. If the difference value is small, the filter on / off signal S34
The loop filter 25B is controlled so as not to perform the filtering operation.

Third, when the filter control unit 31 enters the forced refresh mode, the image data encoding circuit 28 is switched by the inter-frame / intra-frame encoding mode switching signal S33.
To the intra-frame encoding mode.

Fourth, when the transmission buffer memory 32 has a possibility of overflowing based on the remaining amount data S32 supplied from the transmission buffer memory 32, the filter control unit 31 should detect this and perform frame drop processing. Third header data comprising a flag for instructing
HD3 is sent to the threshold control unit 35.

Thus, the image data encoding circuit 28
The difference data S26 encoded in a mode that minimizes the difference between S25 and the predicted current frame data S24 is supplied to the transform encoding circuit 29.

As shown in FIG. 4, the third header data HD3 is obtained from the transmission frame number data TR Counter from the header data HD2.
Together take over the ~ motion vector data MVD (x) and MVD (y), the filter flag Fil of 6 bits fraction in the filter control Yunitsuto 31 corresponding to Bro poke data Y ₀₀ -C _r
ter on / off is added.

Transform coding circuit 29 is made of a discrete cosine transform circuit, block the coefficient value after the discrete cosine transform of the six _{Y 00, Y 01, Y 10} , Y 11, C b, and a zigzag-scan for each C _r It is transmitted to the transmission block setting circuit 34 as transformed encoded data S35.

Transmission block setting circuit 34 six Bro poke is coming sent as converted coded data S35 data Y ₀₀ -C _r (3
(C)), from the first coefficient data to n
The sum of the squares is calculated, and the result of the calculation is passed to the threshold control unit 35 as power detection data S36.

At this time Sureshiyorudo control Yunitsuto 35 compares the power detection data S36 to a predetermined Sureshiyorudo each blow poke data Y ₀₀ -C _r, do not allow transmission of the blow stick data when power detection data S36 is smaller than the Sureshiyorudo, which The transmission permission / prohibition data CBPN of 6 bits indicating that the transmission is permitted when it is large is added to the third header data HD3 passed from the filter control unit 31, and the quantization control is performed as the fourth header data HD4. together passed to Yunitsuto 36, thereby delivering the blow poke data Y ₀₀ -C _r corresponding from the transmission block setting circuit 34 as transmission Bro poke patterned data S37 to the quantizer 37.

Here, the fourth header data HD4 is the transmission frame number data TR Coun of the header data HD3 as shown in FIG.
ter ~ Inherit the filter flag Filter on / off as it is, and block the threshold control unit 35.
Y ₀₀ -C _r the transmission availability flag CBPN of 6 bits fraction was generated corresponding is added.

Quantization control unit 36 is threshold control unit 35
The quantization step size control signal S38 is given to the quantization circuit 37 by determining the quantization step size based on the fourth header data HD4 passed from the controller and the remaining amount data S32 sent from the transmission buffer memory 32. This causes the quantization circuit 37 to perform quantization processing with a quantization step size adapted to the data included in the macroblock MB. As a result, the quantized image data obtained at the output terminal of the quantization circuit 37 is obtained.
S39 is supplied to the variable length encoding circuit 38.

At the same time, as shown in FIG. 4, the quantization control unit 36 converts the fifth header data HD5 into the header data HD4.
Bro poke data Y ₀₀ -C _r (FIG. 3 (C)) to the corresponding flag data FLAGS and the motion vector data MVD (x) and MVD (y) in this separated were arranged in series data on the basis of the Is formed and passed to the variable length coding circuit 38 and the inverse quantization circuit 40.

Here, the header data HD5 is, as shown in FIG.
Transmission frame number data TR Coun of the header data HD4
ter~ macroblock number as with taking over the data MB address, a quantization size data QNT in the quantization control Yunitsuto 36, Bro poke data Y ₀₀ -C flag data FLAGS for _r, the motion vector data MVD (x) and MV
D (y) is added.

The variable-length encoding circuit 38 subjects the header data HD5 and the quantized image data S39 to variable-length encoding and performs transmission image data S40.
And supplies it to the transmission buffer memory 32.

Variable-length coding circuit 38 during the variable-length coding the blow poke data Y ₀₀ -C _r, the corresponding flag data "frame dropping" on the basis of the FLAGS, or when the "not sent" is specified, the block The data is discarded without being transmitted as the transmission image data S40.

The transmission buffer memory 32 stores the transmission image data S40, reads out the transmission image data S40 at a predetermined transmission speed, combines the transmission image data S40 with the transmission audio data S41 transmitted from the audio data generator 42 in the multiplexer 41, and transmits the resultant data to the transmission line 43.

The inverse quantization circuit 40 inversely quantizes the quantized image data S39 sent from the quantization circuit 37 based on the header data HD5, and then supplies the inversely quantized data S42 to the inverse transform encoding circuit 43 to perform inverse quantization. After being converted into the converted coded data S43, it is supplied to the decoder circuit 44, and thus the coded difference data S44 representing the image information transmitted as the transmission image data S40 is supplied to the pre-prediction frame memory 27.

At this time, the pre-prediction frame memory 27 uses the coded difference data S44 to correct the pre-prediction frame data stored up to that time, and stores it as new pre-prediction frame data.

Thus, according to the encoder 21A having the configuration shown in FIG. 1, pixel data is pipelined in macroblock units in the pixel data processing system SYM1 based on the header information supplied from the header data processing system SYM2. By passing the header data in the header data processing system SYM2 so as to synchronize with this, the pixel data is added or deleted as necessary by adding or deleting the header data as necessary in each processing stage of the header data processing system SYM2. Adaptive processing is possible.

As shown in FIG. 2, the decoder 21B receives the transmission data transmitted from the encoder 21A via the transmission line 43 into the transmission buffer memory 52 via the demultiplexer 51, and also transmits the transmission audio data S51 to the audio data receiving device 53. To receive.

The image data received by the transmission buffer memory 52 is separated into received image data S52 and header data HD11 by a variable length inverse transform circuit 54, and is inversely quantized into inverse quantized data S53 by an inverse quantization circuit 55, and then an inverse transform coding circuit. Discrete inverse transform processing at 56 and inverse transform encoded data
It is converted back to S54.

The inverse transform encoded data S54 is supplied to the decoder circuit 57 together with the header data HD12 formed in the inverse quantization circuit 55, and is encoded as encoded differential data S55 by the frame memory 5.
Stored in 8.

Thus, the encoded difference data S55 is stored in the frame memory 58.
The decoded image data S56 is converted into an analog signal in a digital / analog conversion circuit 59, and then output from the output circuit section 60.
Is transmitted as an output video signal VD _OUT via the.

(G2) Frame drop processing according to the embodiment In the image information transmission system 21 shown in FIG. 1, the transmission buffer memory 32 performs quantization by feeding back the remaining data S32 indicating the remaining data Buffer to the quantization control unit 36. The quantization step size QNT in the quantization processing of the circuit 37 is changed to control so as not to overflow or underflow.

That is, in this embodiment, as shown in FIG. 6, the quantization circuit 37 can change the steps from the upper limit value QNT = 31 to the lower limit value QNT = 1 as a table of the quantization step size QNT. The control unit 36 sets the quantization step size QNT when the remaining data Buffer of the transmission buffer memory 32 approaches the sum of the margin Margine and the quantization size controllable range QCR (that is, the allowable upper limit of the remaining data). Roughening (that is, changing in the direction of QNT = 31).

Therefore, the quantization circuit 37 performs the quantization of the transform coded data S35 with a coarse quantization step size, so that the data amount of the quantized image data S39 is controlled to a small value.
As a result, the remaining data amount Buffer of the transmission buffer memory 32 decreases.

On the other hand, when the remaining amount of data in the transmission buffer memory 32 becomes small, the quantization control unit 36 changes the quantization step size QNT in the quantization circuit 37 to a fine value (that is, the direction of QNT = 1) accordingly. By
Always set the remaining amount of data in the transmission buffer memory 32 to the target value.
It is made to converge to the level of MG (QNT = 1).

The filter control unit 31 has a transmission buffer memory 32.
By inputting the remaining amount data S32 that has been fed back by the
While monitoring the Buffer, it is determined whether or not to execute the frame drop in units of fields.

That is, the filter control unit 31 increases the data generation amount of the transform coded data S35, and the transmission buffer memory 32
At time t1 (FIG. 6) when the data remaining amount Buffer of the data exceeds the upper limit (margin Margine + quantized size controllable range QCR) that cannot be controlled by the quantization circuit 37, the transmission buffer memory 32 approaches an overflow state. The frame drop flag included in the flag data FLAGS of the header data HD2 of each macro block MB corresponding to the image data of one field of the subsequent third frame FRM2
The Drop frame flag (FIG. 5) is designated as "1", and is sequentially transmitted to the header data HD3, HD4, and HD5 to be transmitted to the variable length encoding circuit 38 and the inverse quantization circuit 40.

The variable length encoding circuit 38 receives the header data HD5
Drop flag included in FLAGS flag data
When the e flag is designated as “1”, the quantized image data S39 input corresponding to the header data HD5 is not subjected to the variable length code enabling processing, so that the transmission image data S4
0 is not sent.

In this way, the filter control unit 35 sets the drop frame flag to "1" for all the macroblocks MB of the second frame FRM2, thereby setting the variable length code for all the macroblocks MB of the frame FRM2. By controlling the transmission image data S40 not to be sent out by the conversion circuit 38, the frame FRM2 is dropped.

Accordingly, in the transmission buffer memory 32 in which the data remaining amount buffer exceeds the upper limit value, the data for one frame is not input, so that the data remaining amount buffer is reduced for outputting the data to the transmission line 43.

On the other hand, when the drop frame flag of the input header data HD5 is set to "1", the inverse quantization circuit 40 inversely converts the input quantized image data S39 corresponding to the header data HD5. By not performing the quantization process, the inversely quantized data S42 is not transmitted.

Accordingly, since all the macroblocks MB for one frame of the frame FRM2 for which frame drop is specified in the filter control unit 31 are not output as the inverse quantization data S42, the pre-prediction stored in the pre-prediction frame memory 27 is newly performed. Also in the frame data, the data of the frame FRM2 is dropped.

Thus, the frame data of the pre-predicted frame data is also subjected to the frame removal processing in correspondence with the frame removal processing of the image data output via the transmission buffer memory 32.

Here, the filter control unit 31 is a transmission buffer memory.
When the frame drop designation is started based on the 32 remaining data buffers, the designation of the frame drop processing is continued in frame units until the data remaining buffer falls below the target remaining value MG.

Therefore, the frame dropping process is continued even when the remaining data amount Buffer of the transmission buffer memory 32 falls below the upper limit value at time t2 (FIG. 6), and when the buffer amount falls below the target value MG at time t3 of the fourth frame FRM4. Then, the filter control unit 31 detects this, and at this time, the frame FR in which the frame drop process is being executed.
After the frame drop designation of all the macro blocks MB of M4 is completed, by specifying the drop frame flag of the header data corresponding to the subsequent frame FRM5 to "0", the quantization image data S39 of the quantized image data S39 in the frame FRM5 is set. Restart the variable length encoding process.

Accordingly, when the transmission image data S40 of the frame FRM5 is input to the transmission buffer memory 32 again, the data remaining amount Buffer of the transmission buffer memory 32 changes again according to the input data amount and the output data amount.

Thus, the filter control unit 31 stores the remaining data Buff.
As long as er does not exceed the upper limit again, the drop frame flag of the header data corresponding to all the macro blocks MB constituting the frame is set to "0" for each frame unit.
, The transmission image data S40 is input to the transmission buffer memory 32, and the data remaining buffer
er changes.

At this time, even when the data generation amount of the input transmission image data S40 is rapidly increasing as in the state before executing the frame dropping process, the data remaining buffer in the transmission buffer memory 32 is equal to the target value MG. Since the number has been reduced, the frame dropping process is not immediately restarted.

Therefore, it is possible to avoid a state in which a frame to be transmitted and a frame which is dropped and not transmitted are repeated, for example, every one frame.
In the video obtained by reproducing the image data output from, the smoothness of the motion can be prevented from being visually impaired.

Also, the remaining data buffer is set to the target value MG
(QNT = 1), for example, when the data generation amount of the transmission image data S40 decreases in the subsequent frame FRM6, the data remaining amount Buffer does not increase to the upper limit value, and accordingly, Data remaining buffer
Can be made to converge to the target value MG (QNT = 1) in a shorter time.

Therefore, when a fast-moving image (that is, an image with a large amount of transmitted image data) suddenly changes to a slow-moving image (ie, an image with a small amount of transmitted image data), a fine quantization step (QNT = By performing the control in 1), fine image expression can be immediately performed when the movement of the image becomes slow.

However, even if a fast-moving image is represented by a coarse image, it does not visually recognize that the image has deteriorated, and in a slow-moving image, it is possible to recognize sensitively even finely visible parts, so that the image moves slowly. Since the quantization step size can be made smaller immediately after the image is reproduced, deterioration of the image quality can be visually avoided.

FIG. 7 shows the accumulated value TRM of the transmission image data amount (ie, variable length coded data) of each frame input to the transmission buffer memory 32, and FD11 to FD26 denote the FRM of each frame.
11 to FRM26 represent the amount of transmitted image data for one frame.

For example, if the transmission image data amount FD16 of one frame in the frame FRM16 is input and the data remaining amount Buffer exceeds the upper limit value (QNT = 31), the frame dropping process is started at the same time when all the data of the frame FRM16 is input. As a result, the data remaining amount Buffer relatively decreases.

As a result, before the transmission image data FD17 of the frame FRM17 is input, the remaining data Buffer of the transmission buffer memory 32 falls below the target value MG (QNT = 1), so that the input of the transmission image data of the frame FRM17 is restarted. .

At this time, for example, the following frames FRM17, FRM18 and FRM19
If the transmission image data amount FD17, FD18 and FD19 of the frame FRM20 are small values and the remaining amount of data Buffer of the transmission buffer memory 32 falls below the underflow level UNDER before inputting the transmission image data of the frame FRM20, the underflow level By inserting a stuffing bit between data before going below UNDER, the transmission buffer memory 32 is prevented from underflowing.

Thus, in the transmission buffer memory 32, the data remaining buffer is prevented from overflowing or underflowing by using the technique of the frame dropping processing or the stuffing bit insertion processing, and is controlled so as to converge as much as possible to the target value (QNT = 1). Is done.

According to the above configuration, the output data of the transmission buffer memory 32 is reproduced by performing the frame drop processing so that the remaining data buffer of the transmission buffer memory 32 converges to the target value MG (QNT = 1). In this case, it is possible to obtain an image with a smoother movement visually and to avoid deterioration in image quality.

(G3) Other Embodiments In the above-described embodiments, the case where the value of the target value MG (QNT = 1) is used as the detection level of the end of dropped frames has been described. The target value MG may be changed to another level within the quantization size controllable range QCR according to the tendency of the amount of transmission image data generated by a fast moving image or a slow moving image.

In the above embodiment, the filter control unit is used.
Although the case where the data remaining buffer of the transmission buffer memory 32 is detected at 31 and the frame drop designation is specified has been described, the present invention is not limited to this, and the detection and detection may be performed at another data processing unit provided in the preceding stage of the transmission buffer memory 32. The designated processing may be performed.

Further, in the above-described embodiment, the case where the frame drop processing is executed in the variable length coding circuit 38 has been described. However, the present invention is not limited to this, and for example, the frame drop designation of the header data is specified in the quantization circuit 37. In other words, it is only necessary to perform the frame drop processing in the preceding stage of the transmission buffer memory 32, for example, to execute the frame drop processing upon detection.

Furthermore, in the above-described embodiment, the case where the present invention is applied to the image information transmission system that transmits the video signal together with the audio signal has been described. However, the present invention is not limited to this, and the video signal is subjected to high-efficiency encoding processing. It can be widely applied to transmission and the like.

H Advantageous Effects of the Invention As described above, according to the present invention, when the remaining data value of the transmission buffer memory exceeds a predetermined upper limit, the predetermined data remaining value is smaller than the upper limit value. By executing the frame dropping process until the number of frames has decreased, it is possible to obtain a visually smoother moving image and to avoid deterioration in image quality.

[Brief description of the drawings]

1 and 2 are block diagrams showing an encoder and a decoder constituting an image information transmission system using a video signal encoding apparatus according to the present invention. FIG. 3 is a schematic diagram showing a configuration of frame image data. 4 is a block diagram showing the header data processing system shown in FIG. 1, FIG. 5 is a schematic diagram showing the configuration of the flag data shown in FIG. 4, and FIG. 6 shows a change in the remaining amount of data in the transmission buffer memory due to dropped frames. Characteristic curve diagram, seventh
FIG. 9 is a curve diagram showing the accumulated value of the transmission image data input to the transmission buffer memory. FIG. 8 is a schematic diagram for explaining the intra / inter-frame encoding processing. FIG. 9 is a diagram showing a conventional image data generator. FIG. 10 is a block diagram showing the quantization step. 21 ... Image information transmission system, 21A ... Encoder, 21B
... A decoder, 25 a motion compensation circuit, 26 a motion compensation control unit, 27 a frame memory before prediction, 28 a picture data encoding circuit, 29 a transform encoding circuit, 30 an interframe / Intra-frame encoding control unit, 31 ... Filter control unit, 32 ... Transmission buffer memory, 34 ... Transmission block setting circuit, 35 ... Threshold control unit, 36 ... Quantization control unit, 37 ... Quantization circuit, 38
... variable length coding circuit, 43 ... transmission line, S32 ... remaining amount data, S40 ... transmission image data.

Claims (1)

(57) [Claims] 1. An image data encoding apparatus for encoding input image data, comprising: a quantizing means for quantizing the input image data based on a supplied quantization step; Encoding means for encoding; buffer means for storing the encoded image data in order to transmit the encoded image data to a decoding device via a transmission medium; and data remainder of the buffer means. In order to maintain the amount within a predetermined range, quantization step control means for controlling the quantization step of the quantization means based on the remaining amount of data in the buffer means, and control by the quantization step control means. The input image data is quantized based on the quantized step, and the quantized image data is encoded by the encoding means. When the image data is stored in the buffer means, if the remaining amount of data in the buffer means exceeds a predetermined upper limit, the supply of encoded image data to the buffer means is stopped. The encoding means is controlled so that when the remaining amount of data in the buffer means decreases to a predetermined target value smaller than the upper limit, the supply of the encoded image data to the buffer means is stopped. By controlling the encoding means, the image data quantized based on the quantization step corresponding to the remaining data amount of the buffer means is encoded by the encoding means, and the encoded image is encoded. Control means for starting supply of data to said buffer means.