JP2000324500A - Device and method for encoding - Google Patents

Abstract

PROBLEM TO BE SOLVED: To generate a quantized image data quantity of an appropriate data quantity in accordance with image data to be quantized by performing variable length coding of a macro block type including a flag concerning at least motion compensation processing and an encoding mode together with image data which has undergone encoding processing. SOLUTION: This encoder 21A makes an input video signal VDIN input image data S21 composed of macro block image data by using an A/D conversion circuit 23 and processes it with a pixel data processing system SYM1 and a header data processing system SYM2 through a pipeline system. A variable length encoding circuit 38 performs variable length coding processing of header data HD5 and quantization image data S39 to form transmission image data S40 and performs processing discarding block data when 'discard' or 'transmission prohibited' is designated on the basis of corresponding flag data in the case the block data of a macro block is subjected to variable length coding.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an encoding apparatus and an encoding method, and more particularly, to an encoding apparatus and method suitable for use in a case where a video signal is highly efficiently encoded and converted into image data.

[0002]

2. Description of the Related Art Conventionally, in a video telephone system and a conference telephone system, the transmission capacity is relatively severely restricted by efficiently encoding a video signal composed of a moving image into intra-frame encoded data and inter-frame encoded data. A video signal transmission system for transmitting a moving image video signal through a certain transmission path has been proposed (Japanese Patent Laid-Open No. 63-1183).

That is, for example, as shown in FIG. 10 (A), at the time points t = t ₁ , t ₂ , t _3, ..., Each picture PC1, PC2, PC3,. In order to increase the transmission efficiency by compressing the image data to be transmitted using the point that the video signal has the characteristic that the autocorrelation increases with the lapse of time, the intra-frame encoding process is performed. Is an image PC
1, PC2, PC3,... Are subjected to a compression process of, for example, comparing pixel data with a predetermined reference value to obtain a difference.
Thus, for each of the images PC1, PC2, PC3,..., Image data of a compressed data amount is transmitted using autocorrelation between pixel data in the same frame.

As shown in FIG. 10 (B), an inter-frame encoding process is performed for sequentially adjacent images PC1 and PC1.
2, PC2 and image data PC12 consisting of differences of pixel data between PC3 ..., PC 23 obtains a ......, which the initial image PC1 at the time t = t ₁ transmitting with intraframe coded processed image data.

[0005] Thus, the images PC1, PC2, PC3 ...
Can be highly efficiently coded into digital data having a significantly smaller data amount than when all the image data is transmitted, and transmitted to the transmission path.

[0006] Such a video signal encoding process is executed in the image data generating apparatus 1 having the configuration shown in FIG.

The image data generator 1 receives an input video signal VD
Is processed in the pre-processing circuit 2 to perform one-field dropping processing and one-field line thinning processing. Then, the luminance signal and the chroma signal are divided into 16 pixels (in the horizontal direction) × 16 pixels (in the vertical direction). Transmission unit block of data (this is called a macroblock) data S11
And supplies it to the image data encoding circuit 3.

The image data encoding circuit 3 receives the predicted current frame data S12 formed in the prediction encoding circuit 4 and calculates a difference from the macroblock data S11 to generate inter-frame encoded data (this is referred to as a frame). Inter-frame coding mode), or by calculating the difference between the macroblock data S11 and the reference value data to form intra-frame coded data, which is referred to as difference data S1.
3 is supplied to the transform encoding circuit 5.

The transform coding circuit 5 is composed of a discrete cosine transform circuit. To give the quantized image data S1
5 is sent out.

The quantized image data S15 obtained from the quantizing circuit 6 is again subjected to high-efficiency encoding processing in a re-transform encoding circuit 7 including a variable-length encoding circuit, and then transmitted as transmission image data S16. Memory 8
Supplied to

In addition, the quantized image data S15 is subjected to inverse quantization and inverse transform coding in the predictive coding circuit 4 so as to be decoded into differential data, and then the unpredicted frame data is corrected by the differential data. By doing so, new pre-prediction frame data is stored, and motion prediction is performed by motion-compensating the pre-prediction frame data stored in the prediction encoding circuit 4 with motion detection data formed based on the macroblock data S11. The frame data can be formed and supplied to the image data encoding circuit 3, whereby the macroblock data S of the frame to be currently transmitted (that is, the current frame) is obtained.
11 is obtained as the difference data S13 between the current frame data S11 and the predicted current frame data S12.

In the case of transmitting the moving image described above with reference to FIG. 10 in the configuration of FIG. 11, first, FIG.
When the image data of the image PC1 is given as a macro block data S11 at time t _1, converted as the image data coding circuit 3 is difference data S13 which has been intra-frame coding process it becomes the intraframe coding mode The transmission image data S 16 is supplied to the encoding circuit 5, whereby the transmission image data S 16 is supplied to the transmission buffer memory 8 via the quantization circuit 6 and the reconversion encoding circuit 7.

At the same time, the quantized image data S15 obtained at the output terminal of the quantizing circuit 6 is subjected to the predictive encoding process in the predictive encoding circuit 4, so that the transmission image data S16 sent to the transmission buffer memory 8 is converted. predictive previous frame data represented is held before the frame memory, followed macroblock data S11 representing an image PC2 at time t ₂ to a time when supplied to the image data coding circuit 3, is the motion compensated prediction current frame data S12 It is supplied to the image data encoding circuit 3.

Thus, at time t = t ₂ , the image data encoding circuit 3 supplies the difference data S13 subjected to the inter-frame encoding processing to the transform encoding circuit 5, and thereby the difference data representing the change of the image between the frames. Is supplied to the transmission buffer memory 8 as transmission image data S16, and the quantized image data S15 is supplied to the prediction encoding circuit 4, whereby the prediction encoding circuit 4 forms and stores pre-prediction frame data. .

By repeating the same operation as described above, while the image data encoding circuit 3 executes the inter-frame encoding process, only the difference data representing the change of the image between the previous frame and the current frame is obtained. The data is sequentially transmitted to the transmission buffer memory 8.

The transmission buffer memory 8 stores the transmission image data S16 transmitted in this manner, and sequentially stores the stored transmission image data S16 at a predetermined data transmission speed determined by the transmission capacity of the transmission line 9. D
_It is extracted as _TRANS and transmitted to the transmission line 9.

At the same time, the transmission buffer memory 8 detects the amount of remaining data and feeds back the remaining amount data S17 that changes in accordance with the remaining amount of data to the quantization circuit 6 in accordance with the remaining amount data S17. By controlling the quantization step size and adjusting the amount of data generated as the transmission image data S16, data of an appropriate remaining amount (a data amount that does not cause overflow or underflow) in the transmission buffer memory 8 Has been made to be able to maintain.

When the remaining amount of data in the transmission buffer memory 8 has increased to the allowable upper limit, the quantization step STPS of the quantization circuit 6 (the twelfth step) is performed by the remaining amount data S17.
By increasing the step size in the figure, the quantization circuit 6 performs coarse quantization to reduce the data amount of the transmission image data S16.

Conversely, when the remaining amount of data in the transmission buffer memory 8 has decreased to the permissible lower limit, the remaining amount data S17 decreases the step size of the quantization step STPS of the quantization circuit 6 to a small value. In this way, the quantization circuit 6 performs fine quantization, thereby increasing the data generation amount of the transmission image data S16.

[0020]

As described above, according to the conventional image data generating apparatus 1, the data transmission speed of the transmission data D _TRANS is significantly adjusted while matching the transmission conditions limited based on the transmission capacity of the transmission line 9. As a means for transmitting image information, the generated image data is stored in the transmission buffer memory 8 so that the image data having a data amount corresponding to the transmission capacity of the transmission line 9 is always equal to the transmission capacity of the transmission line 9. When the signal value represented by the image data to be actually transmitted is large, if the signal value is quantized as it is, the data stored in the transmission buffer memory 8 is increased by the large signal value. Since the data amount may be excessive, it is desirable that the data can be compressed to a practically appropriate data amount.

The present invention has been made in consideration of the above points, and aims to generate quantized image data having an appropriate data amount according to image data to be quantized.

[0022]

According to the present invention, there is provided an encoding apparatus for encoding image data, comprising: means for performing a motion compensation process on the image data on a macroblock basis; Means for performing an encoding process on the motion-compensated image data in one of an encoding mode of an inter-frame encoding process or an intra-frame encoding process on a macroblock basis, and an image on which the encoding process is performed. Variable length coding means for performing variable length coding on data and performing variable length coding on a macroblock type including at least a flag relating to a motion compensation process and a flag relating to a coding mode is provided.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the drawings, an embodiment in which the present invention is applied to a videophone will be described in detail.

(G1) Overall Configuration of Image Information Transmission System In FIGS. 1 and 2, the image information transmission system 21 includes an encoder 21A and a decoder 21B, and the encoder 21A transmits an input video signal VD _IN to an input circuit unit 22. , The analog / digital conversion circuit 23 performs transmission unit block data consisting of pixel data of 16 × 16 pixels, ie, a macro block MB.
Is input to the pixel data processing system SYM1, and at each processing stage of the pixel data processing system SYM1, the pixel data is processed at the timing when the pixel data is processed in units of macroblocks MB. Corresponding processing information data is sequentially transmitted through the header data processing system SYM2. Thus, the pixel data and the header data are processed by the pipeline method in the pixel data processing system SYM1 and the header data processing system SYM2, respectively. go.

In the case of this embodiment, the input image data S21
The macro block data sequentially transmitted as is extracted from the frame image data FRM by a method as shown in FIG.

First, one frame image data FRM is divided into 2 (in the horizontal direction) × 6 (in the vertical direction) block groups GOB, as shown in FIG. As shown in FIG. 3B, 11 (in the horizontal direction) × 3 (in the vertical direction) macroblocks are included, and each macroblock MB is the third macroblock.
As shown in FIG. 3C, the luminance signal data Y for 16 × 16 pixels
_{00 to} Y ₁₁ (each consisting of 8 × 8 pixels of luminance signal data) and color signal data C _b and C _r composed of color signal data corresponding to all pixel data of luminance signal data Y _{00 to} Y _11. Become.

Thus, the input image data S21 transmitted for each macroblock MB is supplied to the motion compensation circuit 25, and the motion compensation circuit 25 is supplied from the motion compensation control unit 26 provided for the header data processing system SYM2. In response to the motion detection control signal S22, the pre-prediction frame data S23 of the pre-prediction frame memory 27 is compared with the input image data S21, and the motion vector data MVD (x)
And the MVD (y) are detected and the motion compensation control unit 26
As data of the header data HD1 (FIG. 4), and the motion compensation circuit body 25A performs motion compensation for the motion vector data MVD (x) and MVD (y) on the frame data S23 before prediction. The predicted current frame data S24 is formed and supplied to the image data encoding circuit 28 together with the current frame data S25 composed of the input image data S21 to be processed at present.

Here, the motion compensation control unit 26
As shown in the figure, the transmission frame number data TR C indicating the transmission order of the frame image data FRM is provided for each macroblock currently processed as the first header data HD1.
ounter and block group number data GOB addres representing the block group GOB (FIG. 3A).
By adding s and macro block number data MB address representing the macro block MB of the macro block MB, the macro block MB sequentially transmitted to each processing stage of the pixel data processing system SYM1 is displayed. Flag data FLAGS indicating the processing or processing format of the processing target macroblock MB, motion vector data MVD (x) and MVD (y) of the macroblock MB, and difference data Σ | AB | Is formed.

As shown in FIG. 5, the flag data FLAGS can have a flag corresponding to a maximum of one word (16 bits). The 0th bit contains the flag for the processing target macroblock MB in the motion compensation mode. A motion compensation control flag MC on / off indicating whether or not to perform processing is set.

The first bit of the flag data FLAGS contains an inter-frame indicating whether the processing target macroblock MB should be processed in the inter-frame coding mode or the intra-frame coding mode. / Interframe flag Inter / Intra is set.

In the second bit of the flag data FLAGS, a filter flag Filter on / off indicating whether or not to use the loop filter 25B of the motion compensation circuit 25 is set.

Further in the third bit of the flag data FLAGS, transmission flag indicating whether it should transmit the block data Y included in the process target macroblock ₀₀ -C _r (FIG. 3 (C)) Coded / Not-coded can be set.

In the fourth bit of the flag data FLAGS, a drop frame flag indicating whether or not the target macroblock MB is dropped can be set.

The fifth bit of the flag data FLAGS has a forced refresh flag Refresh on indicating whether or not the target macroblock MB is to be forcibly refreshed.
/ off can be set.

In the sixth bit of the flag data FLAGS, a macroblock power evaluation flag MBP appreciate can be set.

The difference data Σ | AB | is the difference between the macroblock data A to be currently processed in the current frame data S25 and the macroblock data B compensated by the motion vector for detection in the frame data S23 before prediction. It represents the minimum value of the differences, and can be used to evaluate the detected motion vector.

The image data encoding circuit 28 supplies the current frame data S25 supplied from the motion compensating circuit 25 as it is as the difference data S26 to the transform encoding circuit 29 as it is in the intra-frame encoding mode. In the conversion mode, difference data S26, which is a difference between the pixel data of the current frame data S25 and the pixel data of the predicted current frame data S24, is supplied to the transform coding circuit 29.

The header data processing system SYM2 is provided with an inter-frame / intra-frame encoding control unit 30 corresponding to the image data encoding circuit 28. The header data HD1 and the image data supplied from the motion compensation control unit 26 are provided. Operation data S3 supplied from the encoding circuit 28
1, an inter-frame / intra-frame flag Inte for designating the encoding mode of the image data encoding circuit 28.
r / Intra (FIG. 5) and a filter flag Filt for controlling the operation of the loop filter 25B of the motion compensation circuit 25
The data required to obtain er on / off (FIG. 5) is calculated and sent to the filter control unit 31 as the second header data HD2.

As shown in FIG. 4, the second header data HD2 takes over the transmission frame number data TR Counter to the difference data Σ | AB | constituting the header data HD1 as it is, and the filter control unit 31 Inter-frame / intra-frame encoding mode switching signal S33
And the power data を (A) ² (L) and Σ (A) ² (H) necessary to form the filter on / off signal S34.
Σ (AB) ² (L), Σ (AB) ² (H), Σ (A-
FB) ² (L) and Σ (A-FB) ² (H), Σ (A) are added in the inter-frame / intra-frame coding control unit 30.

Here, the power data Σ (A) ² (L) and Σ (A) ² (H) represent the lower and upper bits of the sum of squares of the macroblock pixel data A of the current frame data S25. The data Σ (AB) ² (L) and Σ (A-
B) ² (H) is the sum of squares of the difference AB between the macroblock pixel data A of the current frame data S25 and the macroblock pixel data B of the predicted current frame data S24 formed without passing through the loop filter 25B. The power data Σ (A-FB) ² (L) and Σ (A-FB) ² (H) represent lower bits and upper bits, and are formed via the macroblock pixel data A of the current frame data S25 and the loop filter 25B. The lower bit and the upper bit of the sum of squares of the difference A-FB from the predicted current frame data S24 and the macroblock pixel data FB, and the power data Σ (A) represents the macroblock pixel data A of the current frame data S25. Represents the sum and expresses the data amount as a power value in order to evaluate the size of the data to be processed (the sum of squares is independent of the sign Is obtained) as a.

[0041] The filter control unit 31 is configured to transmit the second
Based on the header data HD2 and the remaining amount data S32 supplied from the transmission buffer memory 32, an inter-frame / intra-frame encoding mode switching signal S33 is sent to the image data encoding circuit 28, and a loop filter A filter on / off signal S34 is sent to the second header data HD2, and a filter flag Filter on / off indicating the contents of the filter on / off signal S34 is added to the second header data HD2 to produce the third header data HD3. This is passed to the threshold control unit 35.

Here, the filter control unit 31 has the first
Next, when the amount of transmission data when the inter-frame encoding process is performed is larger than the amount of transmission data when the intra-frame encoding process is performed, the image data encoding circuit 28 is controlled to the intra-frame encoding mode.

Second, the filter control unit 31
In the state where the processing is performed in the inter-frame encoding mode, if the difference between the predicted current frame data S24 that has not been subjected to the processing and the predicted current frame data S24 that has been processed in the loop filter 25B is smaller, the filter is turned on. The loop filter 25B is controlled so that the filtering operation is not performed by the / off signal S34.

Third, the filter control unit 31
When the forced refresh mode is set, the image data encoding circuit 28 is switched to the intra-frame encoding mode by the inter-frame / intra-frame encoding mode switching signal S33.

Further, the filter control unit 31
When the transmission buffer memory 32 is in a state where there is a possibility of overflowing based on the remaining amount data S32 supplied from the transmission buffer memory 32, this is detected and a flag for instructing that frame drop processing should be performed is set. The resulting third header data HD3 is sent to the threshold control unit 35.

Thus, the image data encoding circuit 28 supplies the difference encoding data S26 encoded in a mode that minimizes the difference between the current frame data S25 and the predicted current frame data S24 to the conversion encoding circuit 29.

As shown in FIG. 4, the third header data HD3 is composed of the transmission frame number data TR Counter to the motion vector data MVD (x) and MVD (y) from the header data HD2.
Together take over, it is added to the block data Y ₀₀ -C 6 bits corresponding to _r filter flag Filter on / off in the filter control unit 31.

The transform coding circuit 29 becomes a discrete cosine transform circuit, a discrete cosine transform after discrete cosine transform coefficients six blocks _{Y 00, Y 01, Y 10} , Y 11, C b, each C _r It is sent to the transmission block setting circuit 34 as zigzag-transformed encoded data S35.

[0049] The transmission block setting circuit 34 converts the encoded data coming sent as S35 6 pieces of block data Y ₀₀ -C _r (FIG. 3 (C)), from the beginning of the coefficient data, respectively up to n 2 A sum of squares is calculated and the calculation result is passed to the threshold control unit 35 as power detection data S36.

The power detection data S this time threshold control unit 35 for each block data Y ₀₀ -C _r
36 is compared with a predetermined threshold. If the power detection data S36 is smaller than the threshold, transmission of the block data is not permitted.
A PN is formed, and this is added to the third header data HD3 passed from the filter control unit 31 and passed as fourth header data HD4 to the quantization control unit 36, and the corresponding block from the transmission block setting circuit 34 the data Y ₀₀ -C _r is sent as transmission block patterning data S37 to the quantizer 37.

As shown in FIG. 4, the fourth header data HD4 inherits the transmission frame number data TR Counter to the filter flag Filter on / off of the header data HD3 as they are, and also controls the threshold control unit 35.
Block Y ₀₀ -C _r generated corresponding to the 6 bits of the transmission availability flag CBPN is added in.

The quantization control unit 36 outputs the fourth header data HD4 passed from the threshold control unit 35.
The quantization step size control signal S38 is given to the quantization circuit 37 by executing the quantization step size determination processing routine RT0 shown in FIG. 6 based on the remaining data S32 sent from the transmission buffer memory 32 and the remaining data S32. ,
As a result, the quantization circuit 37 is subjected to quantization processing with a quantization step size adapted to the data included in the macroblock MB, and as a result, the quantized image data S39 obtained at the output terminal of the quantization circuit 37 is converted into a variable length coding circuit. 38.

At the same time, as shown in FIG. 4, the quantization control unit 36 sets the block data Y ₀₀ as the fifth header data HD5 based on the header data HD4.
-C _r (FIG. 3 (C)) to the corresponding flag data FLAGS and the motion vector data MVD (x) and MVD (y) it is separated to form the data are arranged in series to the variable-length code To the quantization circuit 38 and the inverse quantization circuit 40.

Here, as shown in FIG. 4, the header data HD5 includes the transmission frame number data TR Counter to the macro block number data MB add in the header data HD4.
ress is taken over and quantization control unit 3
Quantization size data QNT in 6, the flag data FLAGS for the block data Y ₀₀ -C _r, adds the motion vector data MVD (x) and MVD (y).

The variable-length encoding circuit 38 includes header data HD
5 and the quantized image data S39 are subjected to variable length encoding to form transmission image data S40, which is supplied to the transmission buffer memory 32.

The variable length encoding circuit 38 outputs the block data Y
The ₀₀ -C _r when variable length coding, the corresponding flag data FLAGS "frame dropping" based on, or when the "not sent" is specified, without sending the block data as a transmission image data S40 Do something to throw it away.

The transmission buffer memory 32 stores the transmission image data S40, reads out the transmission image data S40 at a predetermined transmission rate, and combines the transmission image data S40 with the transmission audio data S41 transmitted from the audio data generator 42 in the multiplexer 41 to transmit the transmission image data S40. To send to.

The inverse quantization circuit 40 converts the quantized image data S39 sent from the quantization circuit 37 into header data HD5.
After the inverse quantization, the inverse quantized data S42
Is supplied to the inverse transform encoding circuit 43 to be converted into the inverse transform encoded data S43 and then supplied to the decoder circuit 44. Thus, the encoded difference data S44 representing the image information transmitted as the transmission image data S40 is predicted. It is supplied to the previous frame memory 27.

At this time, the pre-prediction frame memory 27 modifies the pre-prediction frame data stored up to that time using the coded difference data S44 and stores it as new pre-prediction frame data.

Thus, the encoder 21A having the configuration shown in FIG.
According to the above, pixel data is pipeline-processed in macroblock units in the pixel data processing system SYM1 based on the header information supplied from the header data processing system SYM2, but the header data is synchronized with the pipeline data. By passing the header data in the processing system SYM2, the header data processing system SYM
The pixel data can be adaptively processed as needed by adding or deleting header data as needed in each of the processing stages 2.

As shown in FIG. 2, the decoder 21B receives the transmission data transmitted from the encoder 21A via the transmission path 43 into the transmission buffer memory 52 via the demultiplexer 51, and converts the transmission audio data S51 into audio data. The data is received by the data receiving device 53.

The image data received by the transmission buffer memory 52 is received by the variable-length
2 and header data HD11, inversely quantized to inversely quantized data S53 in an inverse quantization circuit 55, and then subjected to inverse discrete transform processing in an inverse transform encoding circuit 56 to inversely transform to inverse transformed encoded data S54. Is done.

The inverse transformed encoded data S54 is supplied to the decoder circuit 57 together with the header data HD12 formed in the inverse quantization circuit 55, and the encoded differential data S5
5 is stored in the frame memory 58.

Thus, the image data transmitted based on the encoded difference data S55 is decoded in the frame memory 58, and the decoded image data S56 is converted into an analog signal by the digital / analog conversion circuit 59. The output video signal VD _OUT is transmitted through the output circuit unit 60.

(G2) Quantization Step Size Determination Processing The quantization control unit 36 executes the quantization step size determination processing routine RT0 shown in FIG. The quantization step size QNT is selected so as to be adapted to the format of the image data (this is called a macroblock type) and the quantization step size control signal S3
By supplying 8 to the quantization circuit 37, the quantization circuit 37 is controlled so as not to cause image quality disturbance that may occur depending on the macroblock type.

In this embodiment, as shown in FIG. 7, the quantization circuit 37 sets the upper limit of the quantization step size QNT as the quantization step size QNT.
The stage from QNT = 31 to the lower limit value QNT = 1 can be varied, and the quantization control unit 36 determines that the remaining amount of data in the transmission buffer memory 32 is the quantization step size QN.
Adaptive control of the value of the quantization step size QNT according to the macro block type so that the value corresponding to the variable control range of T, that is, the appropriate value that falls within the range of the controllable quantization size QCR I do.

(G2-1) Processing when the remaining data amount is excessive, that is, when the quantization control unit 36 enters the quantization step size determination processing routine RT0 in FIG. 6, the remaining amount of the transmission buffer memory 32 is determined in step SP1. Data Bu
ffer is margin Margine and quantization size controllable range QCR
It is determined whether it is greater than the sum of.

If a positive result is obtained here, this means that the data remaining amount Buffer of the transmission buffer memory 32 has exceeded the upper limit value. At this time, the quantum control unit 36 proceeds to step SP2 and Step size QN
After supplying the quantization step size control signal S38 for setting T to the maximum value, that is, QNT = 31, to the quantization circuit 37, the process proceeds to step SP3 to change the currently set quantization step size QNT to the previous frame quantization step. Size PQ
Save as NT.

Thus, the quantization control unit 36 ends the quantization step size determination processing routine RT0 in step SP4, thereby executing the quantization of the transform coded data S35 with the coarsest quantization step size in the quantization circuit 37. I do.

As a result, the data amount of the quantized image data S39 generated from the quantization circuit 37 is controlled to the smallest value, so that the data remaining amount Buffer of the transmission buffer memory 32 decreases.

This operation is repeatedly performed while a positive result is obtained in step SP1, and as a result, the remaining data in the transmission buffer memory 32 eventually becomes smaller than the sum QCR + Margine of the margin Margin and the quantizing size controllable range QCR. .

(G2-2) Processing in Intra-Frame Coding Mode In such a state, the quantization control unit 36 proceeds to step SP5 because a negative result is obtained in step SP1, and the macro block type Macro Bloc
Block not refresh bloc where k Type is an intra-frame coded block and is not a forced refresh block
Determine whether it is k.

Here, the macro block type Macro Block
As shown in FIG. 8, Type is represented by the second bit, the first bit, and the zeroth bit of the flag data FLAGS included in the header data HD4 passed from the threshold control unit 35 to the quantization control unit 36. When these bits are “010”, the macroblock type is intra-frame coding type Intra, when these bits are “000”, it is inter-frame coding type Inter, and when “001”, the filter-free motion compensation type MC- Not filtered and "1
When it is "01", it becomes a motion compensation type MC-filtered using a filter.

When a positive result is obtained in step SP5, this indicates that the second,
The first and zeroth bits are "000", and the fourth bit of the forced refresh flag refresh is in a state of logic "0".

By the way, such a state means that the change of the current frame with respect to the previous frame is so severe that the macroblock type requires the intra-filter coding, and the forced refresh mode is not currently specified. Under such conditions.

Under these conditions, the quantization circuit 3
7, if the quantization is performed with a fine quantization step size, the quantized image data S3 generated from the quantization circuit 37
It can be said that the data amount of No. 9 becomes an extremely large value, and the possibility that the buffer memory 32 eventually overflows is approaching.

At this time, the quantization control unit 36 proceeds to step SP6 and sets the quantization step size QNT to the upper limit value QN.
By setting T = 31, a process for suppressing the data amount of the quantized data S39 generated from the quantization circuit 37 is executed, and as a result, the occurrence of a state in which the transmission buffer memory 32 overflows is avoided. .

On the other hand, when a negative result is obtained in step SP5, this means that the type of the macroblock to be processed is not the intra-frame encoding type Intra;
Or, it indicates that the intra-frame coding type Intra is also generated as a result of the forced refresh. At this time, the quantization control unit 36 jumps without performing the processing of step SP6.

(G2-3) Processing in Forced Refresh Mode Next, in step SP7, the quantization control unit 36 determines that the type of the macroblock to be processed is the forced refresh type.
Judge whether it is a refresh block or not.

If a positive result is obtained here, it indicates that it is specified that the forced refresh should be performed. At this time, the quantization control unit 36 determines in step S
Proceeding to P8, set the previous frame quantization step size PQNT used in the quantization processing of the previous frame as the quantization step size QNT. Quantization is performed with the same quantization step size as.

In this way, when executing the forced refresh processing, it is possible to prevent the image quality from being changed so that the forced refresh processing does not become practically annoying.

Because the forced refresh is performed at a predetermined cycle and independently of the image content, the quantization step size is smaller than that of the previous frame even though the image content is not changed. When it changes, the change often becomes obstructive.

On the other hand, if the value of the quantization step size is not changed when the forced refresh is designated, an unpleasant image change can be prevented from occurring during the refresh.

The same effect as in the above case can be obtained by selecting a slightly smaller value instead of selecting the same value as the value of the quantization step size.

When the forced refresh is designated in a state where there is no change in the image, if the quantization step size is increased, this deteriorates the image quality of the restored image. If the size is slightly reduced, the image quality of the restored image can be slightly improved, so that practically the eyes of the human can be prevented from feeling the change of the image.

On the other hand, if a negative result is obtained in step SP7, this means that the forced refresh is not currently specified, and the quantization control unit 36 does not perform the processing in step SP8 at this time. To jump this.

(G2-4) Processing when the power of the difference data is large Next, in step SP9, the quantization control unit 36 determines that the macroblock type is the inter-frame coding type Inter and the macroblock power MBP is equal to the predetermined threshold value. Determine whether it is greater than Threshold.

Here, the macroblock power MBP is

[0089]

(Equation 1)

And thus the step SP
9, a positive result is obtained, which means that the image data of the macroblock MB, that is, the macroblock power MBP of the difference data is large. This means that the image quality is not significantly degraded.

Therefore, the quantization control unit 36 determines that a macroblock satisfying such conditions is
When the discrete cosine transform is performed in
This is confirmed in step SP9 and step SP1
Moving to 0, the quantization step size QNT is set to the coarsest value, that is, the upper limit value 31.

On the other hand, the transformed coded data S of the macroblock in which the macroblock power MBP is not so large is
When 35 is transmitted, the quantization control unit 36 jumps this so as not to perform the processing in step SP10.

The macroblock power MBP expressed by the equation (1) is _calculated based on the discrete cosine transform coefficient C _oeff (i) obtained as a result of the discrete cosine transform process in the transform coding circuit 29. The weight of the discrete cosine transform coefficient represents the strength of the transmission signal obtained by performing the discrete cosine transform, and therefore, a large macroblock power MBP indicates that the transmission as a signal transmission means is large. Since the signal strength is high, even if the signal is slightly compressed and transmitted, the receiving side can correctly reproduce the transmission information without being affected by external noise.

In such a case, the quantization control unit 36 compresses the data amount of the quantized data S39 generated in the quantization circuit 37 by changing the quantization step size QNT to a large value, thereby forming the transmission path 43.
To reduce the burden on

The discrete cosine transform circuit constituting the transform coding circuit 29 is given by the following equation:

[0096]

(Equation 2)

The discrete cosine transform which forms the inverse transform coding circuit 56 while performing the discrete cosine transform by

[0098]

(Equation 3)

Performs the inverse discrete cosine transform. Here, x and y represent the coordinates of the pixel in the macroblock (the coordinates (0, 0) at the upper left corner), and u and v represent the coordinates of the coefficients at the time of discrete cosine transform.

When u and v = 0,

[0101]

(Equation 4)

In other cases,

[0103]

(Equation 5)

Is as follows.

The conversion of the equations (2) and (3) is actually performed by X
Is the image data matrix in the macroblock, and C is the transform matrix at the time of discrete cosine transform. In the transform coding circuit 29, the image data matrix X is first horizontally transformed to obtain the transformed image data matrix XC- ¹ . Then, a vertical conversion process is performed again to obtain a converted image data matrix C (X) C ^-1 .

The converted image data matrix C thus obtained
(X) C ^-1 is the coefficient C as shown in FIG.
_oeff (1), _Coeff (2), _Coeff (3) ... C
_oeff (64) can be represented as a transform coefficient matrix composed of an 8 × 8 matrix, and each coefficient C _oeff (i) of the transform coefficient matrix
(I = 1 to 64) are read out from the transformation matrix while scanning in the order of i = 1, 2, 3,...

[0107] Thus one macro transform coefficient image data of the block constitutes the transformation matrix _{C oe ff (i) (i} = 1~
64), and this is supplied to the quantization circuit 37 as transmission data arranged in time series.

Thus, the transform coefficient data sequence C _oeff (1), C _oeff (2)... C supplied to the quantization circuit 37
_oeff (64) represents not only the information to be transmitted, but also the strength of the signal to be transmitted, and therefore, as represented by equation (1), the transform coefficient data sequence C _oeff (I) i = (i = 1,2... 64)
The square of the transform coefficient data from 1 to n is a value obtained by cumulatively adding the strength of the signal to be transmitted so that the influences in the horizontal and vertical directions are equal. It is defined as power MBP.

In practice, when a transform coefficient matrix as shown in FIG. 9 is obtained by discrete cosine transform of image data, power is _{applied to} the transform coefficient C _oeff (i) in the upper left corner, that is, the lower-order transform coefficient. On the other hand, there is a tendency that significant information does not occur in the transform coefficient in the lower right corner, that is, in the higher-order transform coefficient. Thus, compression of transmission data can be realized by discrete cosine transform.

Therefore, when it is confirmed in step SP9 in FIG. 6 that the macroblock type is the inter-frame coding type Inter, the macroblock power MBP obtained based on the equation (1) is set to a predetermined threshold value. If it can be confirmed that the value is larger than the Threshold, it means that the value of the difference data in the macroblock MB is sufficiently large, so that coarse quantization may be performed. Therefore, if the quantization step size QNT is selected as the upper limit value in step SP10 according to such a determination, the difference data can be transmitted with a relatively small data amount.

(G2-5) Processing in Interframe Coding Mode In step SP11 of FIG. 6, the quantization control unit 36 determines that the macroblock type is the interframe coding type Inter and the macroblock power is
When it is confirmed that MBP is smaller than a predetermined threshold value Threshold, the process proceeds to step SP12, where the quantization step size QNT is set to a value of 1/2 of the previous frame quantization step size PQNT used in the previous frame. In SP13, it is determined whether or not the value of the set quantization step size QNT is smaller than the lower limit value 1. When the value is smaller, the quantization step size QNT is reset to the lower limit value 1 in step SP14 and is not smaller than 1. At times, processing is performed such that the value is set as the quantization step size QNT without resetting.

Here, the macroblock power MBP is (1)
Since the expression indicates the strength of the difference data signal of the image data of the macroblock as described above, when a positive result is obtained in step SP11, the difference is small, and therefore, the content of the image is the image of the previous frame. This indicates that the change is small as compared with.

When such image data is obtained, the image to be transmitted at present is in such a state that the image of the previous frame is only partially changed without largely changing the image of the previous frame. It represents that.

Then, in step SP12, the quantization control unit 36 reduces the quantization step size PQNT to 1/2 based on the quantization processing result of the previous frame and sets it as the quantization step size QNT of the current frame. If this is done, the quantization step size can be made finer by the reduced amount of the current frame in which the motion has decreased compared to the previous frame, so that an even more optimal quantization step size can be set.

Such a quantization step size reduction process is repeatedly executed in steps SP11 and SP12 by the quantization control unit 36 as long as an image with a small amount of motion continues thereafter. Can converge the quantization step size to a value suitable for this.

At this time, steps SP13 and S
By preventing the quantization step size QNT from being smaller than the lower limit value 1 in P14, the quantization control unit 36 converges the quantization step size QNT to the lower limit value when transmitting an image with little motion. Thus, the quantization process can be performed stably.

On the other hand, when a negative result is obtained in step SP11, the quantization control unit 36 determines that the change of the image to be currently transmitted is large, and does not perform the processing in steps SP12, SP13, and SP14. Jump this.

(G2-6) Operation of the Quantization Control Unit 36 In FIG. 6, first, when the remaining data Buffer of the transmission buffer memory 32 exceeds the upper limit (QCF + Margin),
The quantization control unit 36 detects this in step SP1, sets the quantization step size QNT of the quantization circuit 37 to the upper limit value 31 in step SP2, and thereby reduces the remaining data data Buffer in the transmission buffer memory 32. Thus, control is performed so as to maintain the state below the upper limit value.

In this state, secondly, when block data whose macro block type is an intra-frame coding type and is not a forced refresh block is given to the quantization circuit 37, the quantization control unit 36 Check at SP5 and step SP6
In the transmission buffer memory 32 by setting the quantization step size QNT of the quantization circuit 37 to the upper limit value 31.
Is controlled not to overflow.

In such an operation mode, the quantization control unit 36 obtains a negative result in each of steps SP7, SP9, and SP11, so
After setting the quantization step size set in P6 as the previous frame quantization step size PQNT in step SP3, the processing procedure ends.

Third, when data having a macroblock type of the forced refresh block type is given to the quantization circuit 37, the quantization control unit 36 performs the step SP in the quantization step size determination processing routine RT0.
This is determined by a loop of 1-SP5-SP7, and in step SP8, the quantization step size PNT of the previous frame is set as the quantization step size QNT of the quantization circuit 37.
Is set so that the image quality of the image to be transmitted when the forced refresh mode is entered is not changed from the image of the previous frame, thereby preventing an unsightly change in the image quality during the forced refresh.

At this time, the quantization control unit 36 sets the quantization step size QNT set in step SP8 as the previous frame quantization step size PQNT in step SP3 because a negative result is obtained in each of steps SP9 and SP11. The process ends.

Fourth, when image data of a macroblock having a large macroblock power MBP is supplied to the quantization circuit 37, the quantization control unit 36 executes the step SP1 in the quantization step size determination processing routine RT0.
This is confirmed by the loop of -SP5-SP7-SP9, and in step SP10, the quantization step size QNT of the quantization circuit 37 is set to the upper limit value 31.
The amount of data generated in the quantization circuit 37 can be suppressed to a small value, and as a result, image data can be transmitted more efficiently.

At this time, after such processing is completed, the quantization control unit 36 obtains a negative result in step SP11, and in step SP3, replaces the quantization step size QNT set in step SP10 with the previous frame quantization step size PQNT. Then, the processing routine ends.

Fifth, when macroblock data of a small macroblock power MBP of the inter-frame coding type is supplied to the quantization circuit 37, the quantization control unit 36 determines this as the step of the quantization step size determination processing routine RT0. The quantization step size is checked by a loop of SP1-SP5-SP7-SP9-SP11, and in step SP12, the quantization step size is set to a lower limit value by setting a half value of the previous frame quantization step size PQNT as the quantization step size QNT. Converge to 1.

Thus, the optimum quantization step size can be set by applying the macroblock power MBP.

(G3) Other Embodiments (1) Although the case where the quantization step size QNT is set to the upper limit value 31 in steps SP6 and SP10 in FIG. 6 has been described, the upper limit is set for the quantization step size QNT to be set. Not limited to the value, other values may be selected. The point is that a coarse quantization value large enough to execute coarse quantization may be selected.

(2) Steps SP9 and SP11 in FIG.
In the above, the case where the same threshold value Threshold is selected for judging the magnitude of the macroblock power MBP has been described, but instead, a different value may be selected to obtain the same effect as in the above case. Obtainable.

(3) In the case where the quantization step size QNT is obtained from the previous frame quantization step size PQNT in step SP12 of FIG. 6, a half of the value is set. Is not limited to 1/2, but may be changed to another value if necessary.In short, it is sufficient to select a quantization step size of a size reduced by a predetermined ratio with respect to the previous frame quantization step size. .

(4) Steps SP13 and SP1 in FIG.
4, the case where the quantization step size QNT is made to converge to the lower limit value 1 has been described. However, the value to be converged is not limited to the lower limit value, and another value may be selected as needed.

[0131]

As described above, according to the present invention, a macro including variable-length coding of coded image data and including at least a flag relating to a motion compensation process and a flag relating to a coding mode. By performing variable length coding on the block type, quantized image data having an appropriate data amount can always be generated.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an encoder constituting an image information transmission system to which a video signal encoding method according to the present invention is applied.

FIG. 2 is a block diagram illustrating a decoder included in an image information transmission system to which the video signal encoding method according to the present invention is applied.

FIG. 3 is a schematic diagram illustrating a configuration of frame image data.

FIG. 4 is a block diagram showing a header data processing system of FIG. 1;

FIG. 5 is a schematic diagram illustrating a configuration of flag data in FIG. 4;

FIG. 6 is a flowchart showing a quantization step size determination processing routine of the quantization control unit 36 in FIG. 1;

FIG. 7 is a curve diagram showing a change in remaining amount data of the transmission buffer memory 32 of FIG. 1;

FIG. 8 is a table showing types of macroblock types.

FIG. 9 is a table showing a transform coefficient matrix.

FIG. 10 is a schematic diagram used for describing intra-frame / inter-frame encoding processing.

FIG. 11 is a block diagram showing a conventional image data generating device.

FIG. 12 is a curve diagram showing the quantization step.

[Explanation of symbols]

21: image information transmission system, 21A: encoder, 21B: decoder, 25: motion compensation circuit, 26
... Motion compensation control unit, 27... Frame memory before prediction, 28... Image data encoding circuit, 29... Transform encoding circuit, 30... Inter-frame / intra-frame encoding control unit, 31. Unit, 32: transmission buffer memory, 34: transmission block setting circuit, 3
5: threshold control unit, 36: quantization control unit, 37: quantization circuit, 38: variable length coding circuit.

Claims (2)

[Claims] 1. An encoding apparatus for encoding image data, comprising: means for performing a motion compensation process on the image data in units of macroblocks; A unit for performing an encoding process in any one of an encoding mode of an inter-frame encoding process or an intra-frame encoding process, and performing variable-length encoding on the encoded image data; A coding apparatus comprising: a variable-length coding unit that performs variable-length coding on a macroblock type including a flag related to a motion compensation process and a flag related to the coding mode. 2. An encoding method for encoding image data, wherein the image data is subjected to motion compensation processing in macroblock units, and the motion-compensated image data is encoded in macroblock units. Performing encoding processing in one of encoding modes of inter-frame encoding processing and intra-frame encoding processing, and performing variable-length encoding on the encoded image data, and at least relating to the motion compensation processing. A coding method, characterized in that a macroblock type including a flag and a flag related to the coding mode is subjected to variable-length coding.