JPH03244218A - Block code decoder and method for evaluating reliability of received word - Google Patents

Block code decoder and method for evaluating reliability of received word

Info

Publication number
JPH03244218A
JPH03244218A JP4186390A JP4186390A JPH03244218A JP H03244218 A JPH03244218 A JP H03244218A JP 4186390 A JP4186390 A JP 4186390A JP 4186390 A JP4186390 A JP 4186390A JP H03244218 A JPH03244218 A JP H03244218A
Authority
JP
Japan
Prior art keywords
word
received word
decoder
block code
correlation value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4186390A
Other languages
Japanese (ja)
Inventor
Hideo Omura
英雄 大村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4186390A priority Critical patent/JPH03244218A/en
Publication of JPH03244218A publication Critical patent/JPH03244218A/en
Pending legal-status Critical Current

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  • Error Detection And Correction (AREA)

Abstract

PURPOSE:To improve accuracy for evaluating the reliability of a received word by providing a decoder, which can execute error correction, for a block code and a means to calculate the value of correlation between this received word and a transmitted word, and defining the above mentioned correlation value as a reference for evaluating the reliability of the received word. CONSTITUTION:The received word is inputted to a decoder 1, which can execute the error correction, for the block code and a delay circuit 2 to execute the same delay as the decoder 1. The output of the decoder 1 is the estimated transmission word and the output of the decoder 1 and the output of the delay circuit 2 are inputted to an exclusive OR circuit 3. The output of the exclusive OR circuit 3 is inputted to a down-counter 4. The count value of the down-counter 4 is the value of correlation with the transmission word estimated as the received word. This correlation value shows the number of bits coincident between the received word and the estimated transmission word. Therefore, the larger this correlation value becomes, the higher probability for the received word to be generated from the estimated transmission word is made. Thus, this correlation value can be used as the reference for evaluating the reliability of the received word.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は誤り訂正を行うことができるブロック符号復号
装置及びその受信語信頼性評価方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a block code decoding device capable of error correction and a received word reliability evaluation method thereof.

〔従来の技術〕[Conventional technology]

従来、ブロック符号復号装置は受信語に対して、誤りな
し、誤りはあったが訂正された、又は、訂正不能の誤り
が生じた、の3種類の評価しかできなかった。
Conventionally, block code decoding devices have been able to perform only three types of evaluations for received words: no error, an error that was present but corrected, or an uncorrectable error.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のブロック符号復号装置は、上述した様に、受信語
に対して3種類の評価しか行えないので、精度の高い信
頼性評価ができないという欠点がある。
As described above, the conventional block code decoding apparatus has the drawback that it cannot perform highly accurate reliability evaluation because it can perform only three types of evaluation on the received word.

本発明の目的は、受信語の信頼性評価を高い精度で行う
ことができるブロック符号復号装置及びその受信語信頼
性評価方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a block code decoding device and a method for evaluating the reliability of received words, which can evaluate the reliability of received words with high accuracy.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のブロック符号復号装置は、誤り訂正を行うこと
ができるブロック符号の復号器と、この復号器の入力で
ある受信語と出力である推定された送信語との間の相関
値を求める手段とを備えている。
The block code decoding device of the present invention includes a block code decoder that can perform error correction, and means for determining a correlation value between a received word that is an input of this decoder and an estimated transmitted word that is an output. It is equipped with

又、本発明のブロック符号復号装置は、前記受信語及び
前記推定された送信語を入力する排他的論理和回路と、
この排他的論理和回路に接続したダウンカウンタとによ
って前記相関値を求める手段を′!f4戒してもよい。
Further, the block code decoding device of the present invention includes an exclusive OR circuit inputting the received word and the estimated transmitted word;
Means for determining the correlation value by means of a down counter connected to this exclusive OR circuit. You may give f4 precepts.

本発明の受信語信頼性評価方法は、誤り訂正を行うこと
ができるブロック符号の復号器の入力である受信語と出
力である推定された送信語との間の相関値を求め、この
相関値を前記推定された送信語の信頼性の基準とする。
The received word reliability evaluation method of the present invention calculates a correlation value between a received word that is an input to a block code decoder that can perform error correction and an estimated transmitted word that is an output. is the reliability criterion of the estimated transmitted word.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図を参照すれば、受信語は誤り訂正のできるブロッ
ク符号の復号器1と復号器1と同じ遅延をさせる遅延回
路2に入力される。復号器1の出力は推定された送信語
であり、復号器1の出力と遅延回路2の出力は排他的論
理和回路3に入力される。排他的論理和回路3の出力は
ダウンカウンタ4に入力される。
Referring to FIG. 1, a received word is input to an error correctable block code decoder 1 and a delay circuit 2 which provides the same delay as the decoder 1. The output of the decoder 1 is the estimated transmission word, and the output of the decoder 1 and the output of the delay circuit 2 are input to an exclusive OR circuit 3. The output of the exclusive OR circuit 3 is input to a down counter 4.

ダウンカウンタ4の計数値が受信語と推定された送信語
との相関値であり、この相関値は受信語と推定された送
信語との間で一致したビット数であるから、この相関値
が大きいほど受信語はその推定された送信語から生じた
確率が高くなり、したがって、この相関値は受信語の信
頼性評価の基準として用いることができる。
The counted value of the down counter 4 is the correlation value between the received word and the estimated transmitted word, and this correlation value is the number of bits that match between the received word and the estimated transmitted word, so this correlation value is The larger the correlation value, the higher the probability that the received word originated from its estimated transmitted word, and therefore this correlation value can be used as a criterion for evaluating the reliability of the received word.

ブロック符号の符号長をnとし、訂正できる誤りの最大
値をbとすると、受信語と推定された送信語との間の相
関値をn〜n−bに設定することにより、受信語に対し
て以下の評価をすることができる。
If the code length of the block code is n and the maximum value of errors that can be corrected is b, then by setting the correlation value between the received word and the estimated transmitted word to n~n-b, The following evaluations can be made.

訂正不能の誤りが生じた場合のほか、誤りなしの場合は
相関値がnとなり、誤りはあったが訂正された場合は訂
正された誤り数が1.2.・・・、bのとき相関値がn
−1,n−2,・・・、n−bとなる。
In addition to the case where an uncorrectable error occurs, when there is no error, the correlation value is n, and when there was an error but it was corrected, the number of corrected errors is 1.2. ..., when b, the correlation value is n
-1, n-2, ..., n-b.

重要度の異なる数種類の情報について、受信語の正誤の
判定の境界値としての相関値をその重要度によって変え
ることによって、その重要度の異なる数種類の情報を1
つの符号器・復号器で対応できる。あるいは、推定され
た送信語の定量的な信頼性を必要とする場合などに相関
値を用いることができる。
For several types of information with different degrees of importance, by changing the correlation value as a boundary value for determining whether a received word is correct or incorrect, depending on the degree of importance, several types of information with different degrees of importance can be combined into one.
Can be handled with one encoder/decoder. Alternatively, the correlation value can be used when quantitative reliability of the estimated transmitted word is required.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、誤り訂正を行うことがで
きるブロック符号の復号器の入力である受信語と、出力
である推定された送信語との間の相関値を求め、この相
関値を受信語の信頼性評価の基準とすることにより、受
信語の信頼性評価を高い精度で行うことができる効果が
ある。
As explained above, the present invention calculates the correlation value between the received word, which is the input of a block code decoder that can perform error correction, and the estimated transmitted word, which is the output, and calculates the correlation value. By using this as a standard for evaluating the reliability of received words, it is possible to evaluate the reliability of received words with high accuracy.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のブロック符号復号装置の一実施例のブ
ロック図である。 1・・・復号器、2・・・遅延回路、3・・・排他的論
理和回路、4・・・ダウンカウンタ。
FIG. 1 is a block diagram of an embodiment of a block code decoding device of the present invention. 1... Decoder, 2... Delay circuit, 3... Exclusive OR circuit, 4... Down counter.

Claims (1)

【特許請求の範囲】 1、誤り訂正を行うことができるブロック符号の復号器
と、この復号器の入力である受信語と出力である推定さ
れた送信語との間の相関値を求める手段とを備えたこと
を特徴とするブロック符号復号装置。 2、前記受信語及び前記推定された送信語を入力する排
他的論理和回路と、この排他的論理和回路に接続したダ
ウンカウンタとによって前記相関値を求める手段を構成
したことを特徴とする請求項1記載のブロック符号復号
装置。 3、誤り訂正を行うことができるブロック符号の復号器
の入力である受信語と出力である推定された送信語との
間の相関値を求め、この相関値を前記推定された送信語
の信頼性の基準とすることを特徴とする受信語信頼性評
価方法。
[Claims] 1. A block code decoder that can perform error correction, and means for determining a correlation value between a received word that is an input of this decoder and an estimated transmitted word that is an output. A block code decoding device comprising: 2. A claim characterized in that the means for determining the correlation value is constituted by an exclusive OR circuit into which the received word and the estimated transmitted word are input, and a down counter connected to the exclusive OR circuit. The block code decoding device according to item 1. 3. Find the correlation value between the input received word and the output estimated transmitted word of a block code decoder that can perform error correction, and use this correlation value as the reliability of the estimated transmitted word. A received word reliability evaluation method characterized by using gender as a criterion.
JP4186390A 1990-02-21 1990-02-21 Block code decoder and method for evaluating reliability of received word Pending JPH03244218A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4186390A JPH03244218A (en) 1990-02-21 1990-02-21 Block code decoder and method for evaluating reliability of received word

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4186390A JPH03244218A (en) 1990-02-21 1990-02-21 Block code decoder and method for evaluating reliability of received word

Publications (1)

Publication Number Publication Date
JPH03244218A true JPH03244218A (en) 1991-10-31

Family

ID=12620094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4186390A Pending JPH03244218A (en) 1990-02-21 1990-02-21 Block code decoder and method for evaluating reliability of received word

Country Status (1)

Country Link
JP (1) JPH03244218A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6981196B2 (en) 2001-07-25 2005-12-27 Hewlett-Packard Development Company, L.P. Data storage method for use in a magnetoresistive solid-state storage device
US7107508B2 (en) 2001-07-25 2006-09-12 Hewlett-Packard Development Company, L.P. Manufacturing test for a fault tolerant magnetoresistive solid-state storage device
US7149949B2 (en) 2001-07-25 2006-12-12 Hewlett-Packard Development Company, L.P. Method for error correction decoding in a magnetoresistive solid-state storage device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6981196B2 (en) 2001-07-25 2005-12-27 Hewlett-Packard Development Company, L.P. Data storage method for use in a magnetoresistive solid-state storage device
US7107507B2 (en) 2001-07-25 2006-09-12 Hewlett-Packard Development Company, L.P. Magnetoresistive solid-state storage device and data storage methods for use therewith
US7107508B2 (en) 2001-07-25 2006-09-12 Hewlett-Packard Development Company, L.P. Manufacturing test for a fault tolerant magnetoresistive solid-state storage device
US7149949B2 (en) 2001-07-25 2006-12-12 Hewlett-Packard Development Company, L.P. Method for error correction decoding in a magnetoresistive solid-state storage device
US7149948B2 (en) 2001-07-25 2006-12-12 Hewlett-Packard Development Company, L.P. Manufacturing test for a fault tolerant magnetoresistive solid-state storage device

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