JPH03240112A - Overcurrent protecting circuit - Google Patents

Overcurrent protecting circuit

Info

Publication number
JPH03240112A
JPH03240112A JP2036827A JP3682790A JPH03240112A JP H03240112 A JPH03240112 A JP H03240112A JP 2036827 A JP2036827 A JP 2036827A JP 3682790 A JP3682790 A JP 3682790A JP H03240112 A JPH03240112 A JP H03240112A
Authority
JP
Japan
Prior art keywords
circuit
output
overcurrent
transistor
output circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2036827A
Other languages
Japanese (ja)
Inventor
Yasutsugu Shigeta
重田 泰嗣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2036827A priority Critical patent/JPH03240112A/en
Publication of JPH03240112A publication Critical patent/JPH03240112A/en
Pending legal-status Critical Current

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  • Control Of Voltage And Current In General (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent an output circuit from being destroyed by providing a 2nd breaking circuit which controls the input of an error amplifier, a 3rd breaking circuit which breaks the output circuit and a drive circuit, and an overcurrent detecting circuit. CONSTITUTION:A start circuit consists of transistors TR Q1 - Q4 and a resis tance R1. A 1st breaking circuit consists of the resistances R2 and R3, a 3rd breaking circuit consists of a TR Q5 and a resistance R4, and a 2nd breaking circuit consists of a TR Q6 and a resistance R5. Then an output circuit consists of the TR Q8 and Q9, a resistance R7, and a current source IS, and an overcurrent detecting circuit consists of the TR Q10 and Q11. The 2nd breaking circuit controls the input of an error amplifier GA so as to break the output circuit and the amplifier GA when an overcurrent flows to the output circuit. Then the 3rd breaking circuit breaks the output circuit and the start circuit. These 2nd and 3rd breaking circuits are simultaneously actuated. Thus it is possible to prevent the output circuit from being destroyed by the overcurrent.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、レギュレータ回路の出力回路に過電流が流れ
た時、出力回路が過電流によって破壊されるのを防止す
る過電流保護回路に関するものである。
Detailed Description of the Invention (a) Industrial Application Field The present invention relates to an overcurrent protection circuit that prevents the output circuit from being destroyed by overcurrent when an overcurrent flows through the output circuit of a regulator circuit. It is something.

(ロ)従来の技術 PNP型の出力トランジスタを使用することによって一
定の出力を得るレギュレータ回路の場合、PNP型の出
力トランジスタの駆動能力が小さい為、出力トランジス
タが過電流によって破壊されるのを防止する過電流保護
回路を一般に有していない。
(b) Conventional technology In the case of a regulator circuit that obtains a constant output by using a PNP type output transistor, since the drive capacity of the PNP type output transistor is small, the output transistor is prevented from being destroyed by overcurrent. They generally do not have an overcurrent protection circuit.

(ハ)発明が解決しようとする課題 しかしながら、従来の技術のレギュレータ回路において
、測定、メンテナンス等を行う為に出力トランジスタの
出力とアースとを短絡した場合、過電流が出力トランジ
スタを流れてしまい、出力トランジスタが過電流によっ
て破壊されてしまう恐れがあった。特に、IC化された
レギュレータ回路においては、ICそのものが破壊され
てしまう問題点があった。
(c) Problems to be Solved by the Invention However, in the conventional regulator circuit, when the output of the output transistor is short-circuited to earth for measurement, maintenance, etc., an overcurrent flows through the output transistor. There was a risk that the output transistor would be destroyed by overcurrent. In particular, in a regulator circuit implemented as an IC, there is a problem that the IC itself may be destroyed.

そこで、本発明は、僅かな素子を追加するのみで出力ト
ランジスタが過電流によって破壊されるのを防止できる
過電流保護回路を提供することを目的とする。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an overcurrent protection circuit that can prevent an output transistor from being destroyed by overcurrent by adding only a few elements.

(ニ)課題を解決するための手段 本発明は、前記問題点を解決する為になされたものであ
り、出力回路を動作させる起動回路と、前記出力回路の
出力に基づいて、前記出力回路の出力が所定値以上の時
に前記出力回路と前記起動回路とを遮断する第1の遮断
回路と、前記出力回路の出力変動を検出する検出回路と
、前記検出回路の出力と基準値との誤差を検出する誤差
増幅器と、前記誤差増幅器の誤差出力が負帰還され、前
記出力回路を動作させる駆動回路とを有し、前記出力回
路の出力を一定値に制御するレギュレータ回路において
、過電流が前記出力回路に流れた時、前記出力回路と前
記誤差増幅器とを遮断すべく前記誤差増幅器の入力を制
御する第2の遮断回路と、過電流が前記出力回路に流れ
た時、前記出力回路と前記起動回路とを遮断する第3の
遮断回路と、過電流が前記出力回路に流れたことを検出
して前記第2の遮断回路と前記第3の遮断回路とを同時
に動作させる過電流検出回路と、を備え、前記出力回路
が過電流によって破壊されるのを防止することを特徴と
する過電流保護回路。
(d) Means for Solving the Problems The present invention has been made to solve the above problems, and includes a starting circuit for operating an output circuit, and a starting circuit for operating the output circuit based on the output of the output circuit. a first cutoff circuit that cuts off the output circuit and the starting circuit when the output is greater than a predetermined value; a detection circuit that detects output fluctuations of the output circuit; and a detection circuit that detects an error between the output of the detection circuit and a reference value. In a regulator circuit that includes an error amplifier for detecting and a drive circuit to which the error output of the error amplifier is negatively fed back and operates the output circuit, the regulator circuit controls the output of the output circuit to a constant value. a second cutoff circuit that controls the input of the error amplifier to cut off the output circuit and the error amplifier when an overcurrent flows into the output circuit; a third cutoff circuit that cuts off the circuit, and an overcurrent detection circuit that detects that an overcurrent flows into the output circuit and simultaneously operates the second cutoff circuit and the third cutoff circuit; An overcurrent protection circuit comprising: an overcurrent protection circuit that prevents the output circuit from being destroyed by overcurrent.

(ホ)作用 本発明によれば、前記(ニ)項記載の過電流保護回路に
おいて、測定、メンテナンス等を行う為に出力回路を短
絡し、過電流が出力回路を流れた場合、出力回路と誤差
増幅器とが遮断される様に該?A差増幅器を制御する第
2の遮断回路と、出力回路と起動回路とを遮断する第3
の遮断回路とが同時に動作し、これより、出力回路が過
電流によって破壊されるのが防止される。
(e) Effect According to the present invention, in the overcurrent protection circuit described in item (d) above, when the output circuit is short-circuited for measurement, maintenance, etc., and an overcurrent flows through the output circuit, the output circuit Is it applicable so that the error amplifier is cut off? a second cutoff circuit that controls the A-difference amplifier; and a third cutoff circuit that cuts off the output circuit and the startup circuit.
The cutoff circuit operates simultaneously, thereby preventing the output circuit from being destroyed by overcurrent.

(へ)実施例 本発明の詳細を図面に従って具体的に説明する。(f) Example The details of the present invention will be specifically explained with reference to the drawings.

図面は、本発明の過電流保護回路を使用した低飽和型レ
ギュレータ回路を示す回路図である。
The drawing is a circuit diagram showing a low saturation regulator circuit using the overcurrent protection circuit of the present invention.

図面において、トランジスタQ 、Q 、Q 、Q 、
及び抵抗R4は起動回路を構成し、抵抗Rt Rrは第
1の遮断回路をNX戊し、トランジスタQ、及び抵抗R
イは第3の遮断回路を構成し、トランジスタQ6及び抵
抗R6は第2の遮断回路を構成し、トランジスタQ、は
駆動回路を構成し、PNP型のトランジスタQ、Q、、
抵抗R2,及び電流源Isは出力回路を構成し、抵抗R
,R,は検出回路をI!威し、更にトランジスタQ1.
Q、lは過電流検出回路を構成する。尚、基準電圧V 
IIEFを発生する基準電圧発生回路RVは、電源電圧
Vいが定格値に達した時に動作する様に設定され、抵抗
Rt Rxは、電源電圧〜′8、が定格値に達した時に
トランジスタQ、をオンする値に設定される。また、誤
差増幅器GAにおいて、反転(−)入力端子は基準電圧
発生回路RVの出力と接続され、非反転(+)入力端子
は抵抗R,R,の分圧点と接続され、出力端子はトラン
ジスタQ、のベースと接続される。
In the drawings, transistors Q , Q , Q , Q ,
and resistor R4 constitute a starting circuit, resistors Rt and Rr constitute a first cutoff circuit, transistor Q and resistor R
A constitutes a third cutoff circuit, transistor Q6 and resistor R6 constitute a second cutoff circuit, transistor Q constitutes a drive circuit, PNP type transistors Q, Q, .
Resistor R2 and current source Is constitute an output circuit, and resistor R2
,R, is the detection circuit I! In addition, the transistor Q1.
Q and l constitute an overcurrent detection circuit. Furthermore, the reference voltage V
The reference voltage generating circuit RV that generates IIEF is set to operate when the power supply voltage V reaches the rated value, and the resistor Rt Rx is set to operate when the power supply voltage ~'8 reaches the rated value. is set to a value that turns on. Furthermore, in the error amplifier GA, the inverting (-) input terminal is connected to the output of the reference voltage generation circuit RV, the non-inverting (+) input terminal is connected to the voltage dividing point of the resistors R, R, and the output terminal is connected to the output of the reference voltage generating circuit RV. It is connected to the base of Q.

まず、電源電圧VINがトランジスタQ1のベース・エ
ミッタ間電圧まで上昇すると、電流ミラー接続されたト
ランジスタQ、Q、及びトランジスタQ4がオンし、こ
れに伴って、トランジスタQ、Q、は、ベースが各々ト
ランジスタQ、Q、のコレクタ・エミツタ路を介してア
ース電位に引き込まれてオンする。更に、電源電圧V(
Hが定格値まで上昇すると、トランジスタQ、のコレク
タ電圧に比例して抵抗R! Rsの分圧値が上昇する為
、トランジスタQ、がオンし、トランジスタQ、は、ベ
ースがトランジスタQ、のコレクタ・エミツタ路を介し
てアース電位に引き込まれてオフする。即ち、出力回路
と起動回路とが遮断され、出力回路は、起動回路の影響
を受けることなく動作することになる。そして、抵抗R
,R,の分圧値がトランジスタQ、のコレクタ電圧に比
例して上昇する為、誤差増幅器GAは基準電圧VREF
と抵抗R,R,の分圧値との差に応じた誤差電圧を出力
し、該誤差電圧はトランジスタQ、のベースに負帰還さ
れる。
First, when the power supply voltage VIN rises to the base-emitter voltage of the transistor Q1, the current mirror-connected transistors Q, Q, and transistor Q4 are turned on. It is pulled to ground potential through the collector-emitter paths of transistors Q and Q, and is turned on. Furthermore, the power supply voltage V(
When H rises to its rated value, the resistance R! increases in proportion to the collector voltage of transistor Q! Since the divided voltage value of Rs increases, the transistor Q is turned on, and the base of the transistor Q is pulled to the ground potential through the collector-emitter path of the transistor Q, and the transistor Q is turned off. That is, the output circuit and the starting circuit are cut off, and the output circuit operates without being affected by the starting circuit. And resistance R
, R, increases in proportion to the collector voltage of transistor Q, so the error amplifier GA uses the reference voltage VREF.
An error voltage corresponding to the difference between the resistors R and the divided voltage values of the resistors R and R is output, and the error voltage is negatively fed back to the base of the transistor Q.

従って、トランジスタQ8がトランジスタQ、のエミ/
り出力にバイアスされ、トランジスタQ、のコレクタ電
圧(即ち出力電圧V。UT)は一定値に制御されること
になる。
Therefore, transistor Q8 is the emitter of transistor Q.
Therefore, the collector voltage of the transistor Q (ie, the output voltage V.UT) is controlled to a constant value.

次に、前記の様に動作するレギュレータ回路において、
測定、メンテナンス等を行うことを目的としてトランジ
スタQ、のコレクタとアースとを短絡した場合、過電流
がトランジスタQ、のコレクタ・エミ°ツタ路に流れて
しまうことになる。ここで、トランジスタQ、Q、。Q
 11は電流ミラー接続されている。そこで、トランジ
スタQ、のベース電流が前記過電流によって増大すると
、トランジスタQ 11のベース電流も増大する為、ト
ランジスタQ6はオンする。よって、誤差増幅5GAの
反転入力端子は、トランジスタQ6のコレクタ・エミツ
タ路を介してアースされ、両人力に応じた誤差電圧、即
ち、トランジスタQ、を飽和状態で動作させるための誤
差電圧が誤差増幅器GAから出力される。従って、トラ
ンジスタQ、Q、は、トランジスタQ、のベースがトラ
ンジスタQ7のコレクタ・エミツタ路を介して電源電位
に引き上げられてオフする。同時に、トランジスタQ、
のベース電流が前記過電流によって増大すると、トラン
ジスタQ 1Gのベースit流も増大する為、トランジ
スタQ、はオンする。よって、トランジスタQ、がトラ
ンジスタQ、のオフに伴ってオフしても、トランジスタ
Q、がオンする為、トランジスタQ4はオフのままであ
る。従って、起動回路と出力回路とは遮断された状態の
ままであり、トランジスタQ、Q、がオンすることはな
い。以上より、過電流がトランジスタQ、のコレクタ・
エミツタ路に流れても、トランジスタQ、が確実にオフ
する為、トランジスタQ、が過電流によって破壊される
のを防止できることになる。特に、第1図回路をIC化
した場合、ICそのものを保護できることになる。
Next, in the regulator circuit that operates as described above,
If the collector of transistor Q is short-circuited to earth for the purpose of measurement, maintenance, etc., an overcurrent will flow into the collector-emitter path of transistor Q. Here, transistors Q, Q,. Q
11 is connected as a current mirror. Therefore, when the base current of the transistor Q increases due to the overcurrent, the base current of the transistor Q11 also increases, so that the transistor Q6 is turned on. Therefore, the inverting input terminal of the error amplifier 5GA is grounded via the collector-emitter path of the transistor Q6, and the error voltage corresponding to both input voltages, that is, the error voltage for operating the transistor Q in a saturated state, is applied to the error amplifier. Output from GA. Therefore, transistors Q and Q are turned off as the base of transistor Q is pulled up to the power supply potential via the collector-emitter path of transistor Q7. At the same time, transistor Q,
When the base current of transistor Q1G increases due to the overcurrent, the base current of transistor Q1G also increases, so that transistor Q is turned on. Therefore, even if transistor Q is turned off as transistor Q is turned off, transistor Q4 remains off because transistor Q is turned on. Therefore, the starting circuit and the output circuit remain cut off, and transistors Q, Q, are not turned on. From the above, it can be seen that the overcurrent is at the collector of transistor Q.
Even if the current flows to the emitter path, the transistor Q is reliably turned off, so that the transistor Q can be prevented from being destroyed by overcurrent. In particular, when the circuit shown in FIG. 1 is integrated into an IC, the IC itself can be protected.

(ト)発明の効果 本発明によれば、僅かな素子を追加するのみで出力トラ
ンジスタが過電流によって破壊されるのを防止でき、レ
ギュレータ回路の信頼性が向上する。更に、本発明回路
を用いたレギュレータ回路はIC化に適する等の利点が
得られる。
(G) Effects of the Invention According to the present invention, it is possible to prevent the output transistor from being destroyed by overcurrent by adding only a few elements, and the reliability of the regulator circuit is improved. Furthermore, the regulator circuit using the circuit of the present invention has advantages such as being suitable for IC implementation.

【図面の簡単な説明】 図面は本発明の過電流保護回路を示す回路図である。 Q1〜Q 11・ ・トランジスタ、R1−R1・・・
抵抗、RV  ・基$、を圧発生回路、GA・ 誤差増
幅器、Is・・電流源。
BRIEF DESCRIPTION OF THE DRAWINGS The drawing is a circuit diagram showing an overcurrent protection circuit of the present invention. Q1-Q11・Transistor, R1-R1...
Resistor, RV, base $, pressure generating circuit, GA, error amplifier, Is... current source.

Claims (2)

【特許請求の範囲】[Claims] (1)出力回路を動作させる起動回路と、前記出力回路
の出力に基づいて、前記出力回路の出力が所定値以上の
時に前記出力回路と前記起動回路とを遮断する第1の遮
断回路と、前記出力回路の出力変動を検出する検出回路
と、前記検出回路の出力と基準値との誤差を検出する誤
差増幅器と、前記誤差増幅器の誤差出力が負帰還され、
前記出力回路を動作させる駆動回路とを有し、前記出力
回路の出力を一定値に制御するレギュレータ回路におい
て、 過電流が前記出力回路に流れた時、前記出力回路と前記
誤差増幅器とを遮断すべく前記誤差増幅器の入力を制御
する第2の遮断回路と、 過電流が前記出力回路に流れた時、前記出力回路と前記
起動回路とを遮断する第3の遮断回路過電流が前記出力
回路に流れたことを検出して前記第2の遮断回路と前記
第3の遮断回路とを同時に動作させる過電流検出回路と
、を備え、前記出力回路が過電流によって破壊されるの
を防止することを特徴とする過電流保護回路。
(1) a starting circuit that operates an output circuit; a first cutoff circuit that cuts off the output circuit and the starting circuit when the output of the output circuit is equal to or higher than a predetermined value based on the output of the output circuit; a detection circuit that detects output fluctuations of the output circuit; an error amplifier that detects an error between the output of the detection circuit and a reference value; and an error output of the error amplifier that is negatively fed back;
A regulator circuit that has a drive circuit that operates the output circuit and controls the output of the output circuit to a constant value, wherein when an overcurrent flows to the output circuit, the regulator circuit shuts off the output circuit and the error amplifier. a second cutoff circuit that controls the input of the error amplifier to ensure that the input of the error amplifier is controlled, and a third cutoff circuit that cuts off the output circuit and the starting circuit when an overcurrent flows to the output circuit; an overcurrent detection circuit that simultaneously operates the second cutoff circuit and the third cutoff circuit by detecting that the current has flowed, and the output circuit is prevented from being destroyed by the overcurrent. Features an overcurrent protection circuit.
(2)第2の遮断回路は、過電流が出力回路に流れた時
の前記出力回路の破壊を防止する為に、誤差増幅器に入
力される基準値を制御することを特徴とする請求項(1
)記載の過電流保護回路。
(2) The second cutoff circuit controls the reference value input to the error amplifier in order to prevent destruction of the output circuit when an overcurrent flows into the output circuit. 1
) Overcurrent protection circuit described.
JP2036827A 1990-02-16 1990-02-16 Overcurrent protecting circuit Pending JPH03240112A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2036827A JPH03240112A (en) 1990-02-16 1990-02-16 Overcurrent protecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2036827A JPH03240112A (en) 1990-02-16 1990-02-16 Overcurrent protecting circuit

Publications (1)

Publication Number Publication Date
JPH03240112A true JPH03240112A (en) 1991-10-25

Family

ID=12480579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2036827A Pending JPH03240112A (en) 1990-02-16 1990-02-16 Overcurrent protecting circuit

Country Status (1)

Country Link
JP (1) JPH03240112A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05267951A (en) * 1992-03-17 1993-10-15 Nec Corp Constant-voltage generating circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05267951A (en) * 1992-03-17 1993-10-15 Nec Corp Constant-voltage generating circuit

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