JPH0323668A - Manufacture of ic incorporating photodiode - Google Patents

Abstract

PURPOSE:To obtain a highly sensitive photo diode without sacrificing the speed of a transistor by allowing a high/low-resistance N epitaxial layer on a substrate and then forming the photo diode and the transistor on them. CONSTITUTION:An N-embedded layer 2 and a P-embedded layer 3 are formed on a PSi substrate 1. Then, a high-resistance N epitaxial layer 4 is allowed to grow on the substrate 1, a P-embedded layer 5a for separating a transistor island and a P-embedded layer which constitutes a photo diode being PN-joined with the layer 4 are formed on the layer 4, an N-embedded layer 6 for reducing collector resistance of the transistor is formed, and then an N-embedded layer 7a which becomes a collector wall of transistor and an N-embedded layer 7b for taking out light current of photo diode are formed. A low-resistance N epitaxial layer 8 is formed on the layer 4 where the diffusion process of embedded layer is completed and N-diffusion layers 9a and 9b are formed on the layer 8, thus forming P-diffusion layers 10a and 10b. Then, a P base diffusion layer 11 is formed on a transistor island and an N-epitaxial diffusion layer 12 is formed on the layer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing an IC incorporating a photodiode, which is generally used for optical transmission.

[Prior Art] FIG. 2 shows an example of the structure of a photodiode and a transistor of a conventional IC of this type.

In the figure, 1 is a P silicon substrate, 22a is an N buried layer for lowering the collector resistance of the transistor, 22b is an N buried layer for lowering the series resistance of the photodiode formed at the same time as the N buried layer 22a, 23 24 is a low resistance N epitaxial layer, 24 is a P isolation diffusion layer, 25a is an N collector all diffusion layer, 25bi; The diffusion layer 26b is a P diffusion waste that forms a PN junction of the photodiode with the N epitaxial layer 23 formed simultaneously with the P base diffusion layer 26m, and 27 is an N emitter diffusion layer.

In conventional ICs of this type, priority is given to the operating speed of the transistor, and the specific resistance ρ =
A structure has been adopted in which a low resistance N epitaxial layer 23 of 1 to 5 Ω-m and a thickness t6 of about 5 to 10 μm e is grown, and a transistor and a photodiode are formed in this epitaxial layer 23.

[Problem to be solved by the invention]

In general, in this type of IC, a photodiode with excellent sensitivity can be obtained by increasing the resistivity of the epitaxial layer and making it thick enough to accommodate the expansion of the depletion layer, but the speed of the transistor is sacrificed. become.

In the conventional method, priority is given to the speed of the transistor,
Adopts a thin epitaxial layer structure with relatively low resistivity.
, the sensitivity of the photodiode has been sacrificed.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a manufacturing method that allows a photodiode with excellent sensitivity to be obtained without sacrificing the speed of the transistor.

[Means to solve the problem]

In the manufacturing method of the present invention, a high resistance N epitaxial layer is grown on a P silicon substrate, a low resistance N epitaxial layer is grown on the high resistance N epitaxial layer, and a buried layer is used. In this method, a transistor is formed in a high resistance N epitaxial layer and a transistor is formed in the low resistance N epitaxial layer.

〔Example〕

FIG. 1 shows an example of the structure of a photodiode and a transistor of an IC according to the manufacturing method of the present invention.

In the figure, 1 is a P silicon substrate, 2 is a P silicon substrate 1
3 is the first N buried layer formed on the P silicon substrate, 4 is a high resistance N epitaxial layer grown on the P silicon substrate, 5m and 5b are high resistance layers, respectively. The second and third P buried layers 6 are formed in the N epitaxial layer 4, and the second and third P buried layers 6 are formed in the high i anti-N epitaxial layer 4.
N buried layer% 7 a g 7 b are high resistance N
third and 40N buried layers formed in the epitaxial layer 4;
8 is a low resistance N epitaxial layer grown on the high resistance N epitaxial layer 4, 9m and 9b are N diffusion layers, respectively.
10a and 10b are P diffusion layers, 11 is a P base diffusion layer, and 12 is N emitter diffusion waste.

The photodiode is constituted by a PN junction formed by the third P buried layer 5b and the high resistance N epitaxial layer 4, and the photocurrent is taken out by the fourth N buried layer 7b and the N diffusion layer 9b. The series resistance of this photodiode is lowered by the first N buried layer 2.

The transistor island is separated from the high resistance N epitaxial layer 4 by the 10th P buried layer 3 and the 20th P buried layer 5a, and in the low resistance N epitaxial layer 8, the second P buried layer 5a and the P diffusion layer 10a are separated. separated by

The collector resistance of the transistor is lowered by the 20N buried layer 6.

Impurities such as As and Sb are used to diffuse the 1l second N buried layers 2 and 6, and P, first, second, and third impurities are used to diffuse the third and 40th N buried layers 7a and 7b. B is used for diffusion into the P buried layers 3, 5a, and 5b.

In this structure, the low-resistance N epitaxial layer 8 is placed under conditions that suit the performance of the transistor (thickness: 5 μm, specific resistance: 1Ω-3), and the high-resistance N epitaxial layer 4 is placed under conditions that match the sensitivity characteristics of the photodiode (thickness: 15 μm). , specific resistance l5Ω-)
By doing so, a photodiode with excellent sensitivity can be obtained without sacrificing the speed of the transistor.

The PN junction of the photodiode is deeper than that of the conventional structure.
However, since the light emitting diodes used usually emit infrared light, there is no problem in practical use.

Hereinafter, the manufacturing method of the present invention will be explained based on the first color.

A 10N-th buried dove 2 is formed on a P silicon substrate 1, and a 1-th P buried layer 3 is formed.

Next, a high-resistance N epitaxial layer 4 is grown on the P silicon substrate 1, and a second P buried layer 5a and a high-resistance N epitaxial layer 4 and PN are grown on the high-resistance N epitaxial layer 4 to separate transistor islands. A third P buried layer is formed to bond to form a photodiode, and a 20N buried layer 6 is formed to lower the collector resistance of the transistor.
Furthermore, a third N buried layer 7a serving as the collector of the transistor and a fourth N buried layer 7b for taking out the photocurrent of the photodiode are formed.

A low-resistance N-epitaxial layer 8 is grown on the high-resistance N-epitaxial layer 4 after the above-described buried layer diffusion step, and N-diffused layers 9a and 9b are formed in the low-resistance N-epitaxial layer 8. , 10b.

Then, a P base diffusion layer 1l is placed on the transistor island.
, and an N emitter diffusion layer 12 is formed on the P base diffusion layer 11.
form.

〔Effect of the invention〕

As described above, according to the present invention, an IC with excellent photodiode sensitivity can be obtained without sacrificing the speed characteristics of the transistor.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing an example of the structure of a photodiode and a transistor of an IC according to the manufacturing method of the present invention, and FIG. 2 is an explanatory diagram showing an example of the structure of a photodiode and a transistor of a conventional IC of this type. 1... P silicon substrate, 2... 10th N buried layer, 3
-$lf) PMJ. buried layer, 4... high resistance N epitaxial layer, 5a... second P buried layer, 5b... 30th
P buried layer, 6... 20th N buried layer, 7 m = -3rd
N buried layer, 7b...40th N buried layer, 8...Low resistance N epitaxial layer, 9a # 9b'' N diffusion layer, 10a, tob...P diffusion layer, 11... - P base diffusion layer, l2...N emitter diffusion layer Note that the same reference numerals in the drawings indicate the same -1 or equivalent ones.

Claims (1)

[Claims] A high resistance N epitaxial layer is grown on a P silicon substrate, a low resistance N epitaxial layer is grown on the high resistance N epitaxial layer, a photodiode is formed in the high resistance N epitaxial layer, and a photodiode is formed on the high resistance N epitaxial layer. A method for manufacturing an IC incorporating a photodiode forming a transistor in a low-resistance N epitaxial layer, the first step is to reduce the series resistance of the photodiode formed by growing a high-resistance N epitaxial layer on a P silicon substrate. a step of forming an N buried layer on the P silicon substrate, and separating a transistor region of a low resistance N epitaxial layer grown on the high resistance N epitaxial layer from a high resistance N epitaxial layer grown on the substrate a step of forming a first P-buried layer; a step of growing a high-resistance N-epitaxial layer on the P-silicon substrate on which the first N-buried layer and the P-buried layer are formed; A second P buried layer for separating transistor islands of a low resistance N epitaxial layer grown on the high resistance N epitaxial layer is bonded to the high resistance N epitaxial layer to form a PN junction of a photodiode. a step of forming a third P buried layer, and a second N buried layer in the high resistance N epitaxial layer to lower the collector resistance of the transistor formed in the low resistance N epitaxial layer grown on the high resistance N epitaxial layer. a step of forming a buried layer, a third N buried layer for forming a collector wall of the transistor in the high resistance N epitaxial layer, the high resistance N epitaxial layer and the third P buried layer; a step of forming a fourth N buried layer for taking out the photocurrent of the photodiode, and forming the second and third P buried layers and the second, third and fourth N buried layers; a step of growing a low-resistance N epitaxial layer on the high-resistance N epitaxial layer; forming an N diffusion layer connected to the second N buried layer of No. 4 to take out the photocurrent of the photodiode; a step of forming a P diffusion layer that separates the transistor island of the transistor island and a P diffusion layer that connects to the third P buried layer; a base diffusion layer in the transistor island of the low resistance N epitaxial layer and an emitter in the base diffusion layer; IC with a built-in photodiode and a step of forming a diffusion layer
manufacturing method.