JPH032351B2 - - Google Patents

Abstract

PURPOSE:To make highly reliable ohmic contact easily feasible by a method wherein a metal hardly reactive to both Au and Ni as well as to Si is laid between Au and Ni. CONSTITUTION:Both a p type base region 3 and an n type emitter region 4 are diffused in a wafer. After the diffusion process, an SiO2 film 12 of the base and emitter regions 3, 4 is selectively removed to form surface elements and then processed by Al evaporation to form a base electrode 5 and an emitter electrode 6. Then the backside of this wafer is ground conforming to specified thickness. Firstly Au containing e.g. Sb is evaporated on the backside. Secondly Ta 9 is evaporated further to evaporate an Ni 10 and an Ag 11 successively. Thirdly this wafer is heattreated using an enert gas or H2 gas at the temperature around 300-500 deg.C. At this time, Au containing Sb is alloyed with Si to form an Au-Si alloy 8. Finally the wafer may be divided into individual chips.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a semiconductor device, and particularly to an electrode structure.

(Prior art) Conventionally, electrodes were formed mainly by Ni plating, Al evaporation, Au evaporation, or Ni, Ni-Ag evaporation, etc. on the diffusion layer, heat treatment was performed to form ohmic contact, and the chip was soldered. By performing attaching and bonding, it is connected to external leads and becomes a commercially available semiconductor element.

The required properties of this electrode system include low resistance of the metal itself, ohmic contact with silicon, and stability of the resulting metal-silicon system during various heat treatments (sintering, assembly). It is stable in reliability tests such as operation tests and environmental tests, and has a good bonding state with bonding wires such as Al and Au wires or solders such as AuSi, AgSn, and SbSn. be.

Generally, ohmic contact is not a problem when the surface concentration of the semiconductor is high (10 ¹⁹ /cm ³ or higher). Therefore, ohmic contact between the metal deposited in the highly concentrated diffusion layer and the silicon substrate can be formed with almost no problem, and there is a large degree of freedom in selecting the type of metal to be deposited.

However, as the diffusion process is omitted and the diameter of wafers becomes larger, in order to improve the wafer yield in the diffusion process, the diffusion process is performed on a thick wafer, and then the wafer is polished thin at the end. If it were possible to make ohmic contact on the back side, the process would be simplified and the yield would be significantly improved. but,
It is difficult to establish ohmic contact with conventional metals when the impurity concentration of the substrate is low, and it becomes necessary to somehow increase the impurity concentration at the metal-silicon interface. One method for this purpose is to incorporate impurities such as Sb into Au by taking advantage of the fact that Au forms a eutectic with silicon at low temperatures, and then introduce the impurity to the silicon interface by heat treatment. There are things to do. In addition, in order to improve the compatibility with the soft solder during assembly, by depositing Ag or Ni as a solder stopper, or by depositing a single layer of Ni alone, ohmic contact can be established with the low concentration impurity substrate. It becomes a stable vapor deposition system that is compatible with solder during the assembly process. In other words, Si・An(Sb)−Ni−
It is a vapor deposition system called Ag. Although this vapor deposition system is sufficiently durable for practical use, the problems with this system are that Au reacts with Si and Si easily reaches the Au-Ni interface, and Ni silicides with Si at low temperatures. The alloying reaction of NixSiy also progresses to form
In addition, the layered film exhibits a very complicated appearance depending on the heat treatment conditions during formation, such as the diffusion of Au into Ni. Also, from the point of view of the distribution of impurities in Au into Si, it is easy to change depending on the heat treatment conditions, so it is very troublesome to control it to the same state.

(Object of the Invention) An object of the present invention is to solve the above-mentioned problems and provide a semiconductor device having an electrode structure in which highly reliable ohmic contact can be easily obtained.

(Structure of the Invention) In other words, according to the present invention, Au, between Au and Ni,
By interposing a metal that does not easily react with either Ni or relatively easily with Si, a metal electrode system that is always stable even if the heat treatment conditions change somewhat is provided. Specifically, between Au and Ni
By interposing Ta (tantalum), the Si-Au (Sb) system for ohmic contact is separated from the Ni or Ni/Ag system used for connection with the solder. Also, Ta has a temperature where silicide is formed.
Since it is as high as 650℃, it can exist stably with heat treatment at about 500℃.

(Example) Next, the present invention will be explained in more detail based on an example.

FIG. 1 is a cross-sectional view of a transistor. It is assumed that diffusion is performed using a large diameter silicon wafer, for example, 4 inches. In order to stabilize the yield of wafers, consider using wafers as thick as 350 to 400 μm, for example. An N ^- type region 2 is formed on the N ⁺ silicon substrate 1 by vapor phase growth.
In this wafer, a P type base region 3 is diffused and N
The mold emitter region 4 is diffused. After spreading,
After selectively removing the SiO ₂ film 12 on the emitter and base regions 3 and 4 to form surface electrodes,
Al vapor deposition is performed to form an emitter electrode 6 and a base electrode 5. Thereafter, the back side of this wafer is polished to a desired thickness of, for example, about 200 microns. Next, on this surface, for example, Au containing 0.1 to 1 ωt% of Sb is deposited to a thickness of about 500 to 2000 Å. Next Ta9
After depositing, for example, about 500 to 2,000 Å, Ni 10 and Ag 11 are continuously deposited thereon to a thickness of about 2,000 to 1 μm. Next, this wafer is heat-treated at a temperature of about 300 to 500° C. for about several minutes to one hour using an inert gas or H ₂ gas. At this time, Au containing Sb
is alloyed with Si to form Au-Si alloy 8. It is then divided into individual chips. In this method
The AU(Sb) alloy may be applied not only by vapor deposition, but also by sputtering, or by co-sputtering using separate targets for Au and Sb. Also, impurities include not only Sb but also P,
Materials such as As and Al can also be selected depending on the type of substrate. In this explanation, a layer mainly composed of Au is applied directly to Si, but from the viewpoint of line stability (no peeling) during mass production, it is difficult to form a layer that has good adhesion to the natural oxide film.
It is also sufficiently effective to apply thin films of Ti, Cr, and V. Further, this vapor deposition system 7 can be applied to a highly concentrated silicon surface without any problem. Further, the impurity concentration in the film thickness of each metal (Au) shown in the example is just an example, and there is no problem even if it deviates from the range.

The present invention can of course be applied not only to transistors but also to diode thyristors.
High concentration diffusion only for conventional ohmic contacts is no longer required.

[Brief explanation of the drawing]

FIG. 1 is a longitudinal cross-sectional view of a transistor. DESCRIPTION OF SYMBOLS 1...Silicon substrate, 2...Epitaxial layer, 3...P type base region, 4...N type emitter region, 5...Base electrode, 6...Emitter electrode, 7...Collector electrode, 8... Au-Si(Sb)
Alloy region, 9... Ta layer, 10... Ni layer, 11...
...Ag layer.

Claims (1)

[Claims] 1. a semiconductor substrate, a first electrode layer mainly containing Au provided on the back surface of the semiconductor substrate, and a second electrode layer containing Ta provided on the first electrode layer;
A semiconductor device characterized by having an electrode having a third electrode layer containing Ni provided on the second electrode layer.