JPH03233973A - Composite thyristor - Google Patents

Composite thyristor

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Publication number
JPH03233973A
JPH03233973A JP2822590A JP2822590A JPH03233973A JP H03233973 A JPH03233973 A JP H03233973A JP 2822590 A JP2822590 A JP 2822590A JP 2822590 A JP2822590 A JP 2822590A JP H03233973 A JPH03233973 A JP H03233973A
Authority
JP
Japan
Prior art keywords
layer
thyristor
breakdown strength
circuited
short
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2822590A
Other languages
Japanese (ja)
Other versions
JPH0614546B2 (en
Inventor
Koichi Ota
太田 鋼一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP2822590A priority Critical patent/JPH0614546B2/en
Publication of JPH03233973A publication Critical patent/JPH03233973A/en
Publication of JPH0614546B2 publication Critical patent/JPH0614546B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To increase a surge breakdown strength by forming two sets of PNPNP layer structure provided with a lower breakdown strength region than other part at the part of a junction for determining a forward breakdown strength. CONSTITUTION:An N11 layer, a P11 layer and an N21 layer are provided on one side surface of a substrate with a P-type semiconductor as the common substrate, and an N13 layer, a P13 and an N23, a P23 layer are provided on the other side surface. a 5-layer structure S1S2 provided with a low breakdown strength region L is formed of a P<+> type layer on an exposed part of junctions J12, J21 and junctions J13, J23 to the surface. The P11 layer is short-circuited to the N11 via a first metal electrode T1, the P21 layer is short-circuited to the N21 layer via a second metal electrode T2, and the P13 layer, the N13 layer of the other surface are commonly short-circuited to the P23 layer, the N23 layer via a third metal electrode T3. Thus, a low breakdown strength can be obtained without reducing the thickness of the P-type layer, characteristics are uniform, and an initial arc igniting position becomes constant. Accordingly, an irregularity in a surge protective breakdown strength can be reduced, and a surge current breakdown strength can be increased.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は低電圧回路のサージ防護に好適する複合サイリ
スタに関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a composite thyristor suitable for surge protection of low voltage circuits.

(従来技術と解決すべき問題点) 第1図に示す断面図のようにP、N、PN2 P2の5
層からなり、PlとN3層を金属電極T1により短絡し
、N2と22層を金属電極T2により短絡した構成をも
つ両方向短絡エミッタ型2端子サイリスタは、通信回路
その他の回路に接続された電子機器回路のサージ防護素
子と広く用いられるようになりつつある。
(Prior art and problems to be solved) As shown in the cross-sectional view in Fig. 1, 5 of P, N, PN2 P2
A two-way shorted emitter type two-terminal thyristor, which has a configuration in which the Pl and N3 layers are short-circuited by a metal electrode T1 and the N2 and 22 layers are short-circuited by a metal electrode T2, is used in electronic equipment connected to communication circuits and other circuits. It is becoming widely used as a surge protection device in circuits.

しかし上記の如きPNPNP型サイリスタを用いて、横
サージと縦サージの両サージに対して防護作用を発揮さ
せるためには、第2図に示すように被防護機器回路Mが
接続された線路り、、L2間に、中点が接地Eされた直
列の縦サージ用サイリスタ2..22を接続し、また横
サージ用としてサイリスタZ3を接続しなければならな
い。従って回路構成が複雑となる。
However, in order to use the above-mentioned PNPNP type thyristor to exert a protective effect against both horizontal and vertical surges, the line to which the protected device circuit M is connected, as shown in FIG. , L2, a series vertical surge thyristor 2. whose midpoint is grounded E. .. 22 must be connected, and thyristor Z3 must be connected for lateral surge. Therefore, the circuit configuration becomes complicated.

また最近の電子機器回路の集積化はサイリスタの低耐圧
(VB。)化を要求し、また電子機器回路のデジタル化
はサイリスタの低静電容量化を強く要求している。しか
し第1図に示した構造では、その耐圧は例えば共通基板
であるPの厚み(比抵抗)によって定まるため、要求さ
れる耐圧としたとき厚さが薄くなりすぎて製造が困難で
あり、特性の不均一を生じ易い。
Furthermore, the recent integration of electronic device circuits has required lower breakdown voltage (VB.) of thyristors, and the digitalization of electronic device circuits has strongly required lower capacitance of thyristors. However, in the structure shown in Figure 1, the withstand voltage is determined by the thickness (resistivity) of P, which is the common substrate. tends to cause non-uniformity.

また通常の構造では静電容量は、第1図の接合J2の面
積と共通基板であるP層の比抵抗によって定まり、比抵
抗が小になると静電容量は大となる。従って上記のよう
に低耐圧化のため、P層の厚みを小としたときには静電
容量は大となる。従って耐圧、静電容量か共に小さいサ
イリスタを作り得ず、デジタル化された集積回路の防護
を行いつるサイリスタの実現は難しい。
Further, in a normal structure, the capacitance is determined by the area of the junction J2 in FIG. 1 and the resistivity of the P layer, which is a common substrate, and as the resistivity decreases, the capacitance increases. Therefore, as mentioned above, when the thickness of the P layer is reduced in order to lower the breakdown voltage, the capacitance increases. Therefore, it is impossible to create a thyristor with low breakdown voltage and capacitance, and it is difficult to realize a thyristor that can protect digitalized integrated circuits.

またサイリスタのサージ耐量はターンオン移行領域にお
ける電力損失と、初期点弧が領域全面に広がるスピード
によって定まるが、初期点弧位置は第1図の接合JIJ
2や、横方向抵抗等の製作時などに生ずる微妙な不均一
によって変動する。
In addition, the surge resistance of a thyristor is determined by the power loss in the turn-on transition region and the speed at which the initial firing spreads over the entire region, but the initial firing position is determined by the junction JIJ shown in Figure 1.
2 or due to subtle non-uniformities that occur during manufacturing, such as lateral resistance.

従って均一なサージ電流耐量をもつものの製作が難しい
。従って前記第2図のように3個のサイリスタ2,22
2.の特性の不均一を生じて動作不良のおそれを招き易
い。
Therefore, it is difficult to manufacture a device with uniform surge current resistance. Therefore, as shown in FIG. 2, the three thyristors 2, 22
2. This tends to cause non-uniformity of characteristics, leading to a risk of malfunction.

(発明の目的) 本発明は先に本発明者が提案したサイリスタ構造を応用
し、縦、横両サージに対して1個のサイリスタにより防
護を行うことかできるのみてなく、デジタル化された集
積回路の防護を行いうる低耐圧、低静電容量、しかもサ
ージ耐量の大きい均一な特性をもつ複合サイリスタの実
現を図ったものである。
(Objective of the Invention) The present invention applies the thyristor structure previously proposed by the present inventor, and is capable of providing protection against both vertical and horizontal surges with a single thyristor. The aim is to realize a composite thyristor with uniform characteristics such as low breakdown voltage, low capacitance, and high surge resistance that can protect circuits.

(問題点を解決するための本発明の手段)本発明者は先
に前記第1図のサイリスタの各種の問題点を解決しつる
サイリスタを提案した。このサイリスタは第3図(a)
に示す断面図のように接合J2J、が表面に露呈した部
分の一部、或いは第3図(b)に示す断面図のようにP
t Ps層の直下に接合J2J2の他の部分に比べて耐
圧の低い領域りを例えばP+層によって設けて、以下の
動作が行われようにしたものである。なお第3図におい
て■は絶縁膜である。
(Means of the Invention for Solving the Problems) The present inventor has previously proposed a thyristor that solves various problems of the thyristor shown in FIG. This thyristor is shown in Figure 3(a).
As shown in the cross-sectional view shown in Figure 3(b), a part of the joint J2J is exposed on the surface, or as shown in the cross-sectional view shown in Figure 3(b), P
Immediately below the tPs layer, a region having a lower breakdown voltage than other parts of the junction J2J2 is provided, for example, by a P+ layer, so that the following operations are performed. Note that in FIG. 3, ■ is an insulating film.

即ち第4図(alに示す動作説明用の単方向サイリスタ
において、順方向であるT、からT2の方向に電流を流
すと、接合J2に逆方向電圧が加わり、これによって先
ず低耐圧領域りが第5図の電圧VBでブレークダウンし
、この部分に電流が集中して流れる。この電流が増加す
ると21層の直下のN2層の横方向抵抗Rに生ずる電圧
により接合J1の左方が順バイアスされ、低耐圧領域に
おいてバイアス値が最大となる。そしてこれが接合J、
の拡散電位を越えると21層から正孔の注入が行われて
、第5図のブレークオーバー電流I、で電栃T。
That is, in the unidirectional thyristor shown in FIG. 4 (al), when a current is passed in the forward direction from T to T2, a reverse voltage is applied to junction J2, which first causes the low breakdown voltage region to rise. Breakdown occurs at voltage VB in Figure 5, and current flows concentrated in this part.As this current increases, the left side of junction J1 becomes forward biased due to the voltage generated in the lateral resistance R of the N2 layer directly below the 21st layer. The bias value is maximum in the low breakdown voltage region.This is the junction J,
When the diffusion potential exceeds , holes are injected from the 21st layer, and the breakover current I in FIG.

72間がターンオン状態に移行するようにしたものであ
る。
72 is configured to shift to the turn-on state.

また上記と逆方向の電圧が印加された場合には、第4図
(b)に示す単方向サイリスタにおいて同様の動作が行
われるようにしたものである。
Furthermore, when a voltage in the opposite direction to that described above is applied, the same operation is performed in the unidirectional thyristor shown in FIG. 4(b).

この構造によれば耐圧は低耐圧領域りの耐圧によって定
まるので、その設計により所要の耐圧のサイリスタを得
ることができ、また静電容量値従って接合J2の接合容
量値は、大部分を占める低耐圧領域り以外の部分で定ま
ることから、通常の構造のものに比較して低静電容量と
なり、低耐圧低静電容量のサイリスタの実現が可能とな
る。
According to this structure, the withstand voltage is determined by the withstand voltage in the low withstand voltage region, so it is possible to obtain a thyristor with the required withstand voltage by its design, and the capacitance value, and therefore the junction capacitance value of junction J2, is Since the capacitance is determined outside the breakdown voltage region, the capacitance is lower than that of a conventional structure, making it possible to realize a thyristor with a low breakdown voltage and low capacitance.

本発明はこの短絡エミッタ型サイリスタ構造を応用して
、1個のサイリスタによりサージ防護を行いつる低耐圧
低静電容量、しかもサージ電流耐量の大きいサイリスタ
を提供しようとするものである。次に本発明を実施例に
より詳細に説明する。
The present invention applies this short-circuit emitter type thyristor structure to provide a thyristor that provides surge protection with a single thyristor, has low breakdown voltage, low capacitance, and has a large surge current capacity. Next, the present invention will be explained in detail with reference to examples.

第6図は本発明の実施例を示す断面図であって、P型半
導体を共通基板としてその一面にNl1層と213層お
よびN21層とP 21層を設け、また他面にはNI2
層とPus層およびN23層とP 2z層を設ける。
FIG. 6 is a sectional view showing an embodiment of the present invention, in which a P-type semiconductor is used as a common substrate, Nl1 and 213 layers, N21 and P21 layers are provided on one side, and NI2 and P21 layers are provided on the other side.
A layer, a Pus layer, an N23 layer, and a P2z layer are provided.

また接合JI2とtLIおよび接合J +xとJ 2z
の表面への露呈部分にはP+層により低耐圧の領域りを
設けた5層構造S、S2を形成する。そしてpH層とr
’tL+層を第1金属電極T、により短絡し、P21層
とN2□層を第2金属電極T2により短絡すると共に、
他面のPl、3層とN12層、およびP22層とN22
層を、第3金属電極T3により共通に短絡して一つの電
極として、第7図に示す等価回路をもつ複合サイリスタ
として以下に述べる動作を行うようにしたものである。
Also junctions JI2 and tLI and junctions J +x and J 2z
A five-layer structure S, S2 is formed in which a low breakdown voltage region is provided by a P+ layer on the exposed portion of the surface. and the pH layer and r
'tL+ layer is short-circuited by the first metal electrode T, the P21 layer and the N2□ layer are short-circuited by the second metal electrode T2,
Pl on the other side, 3 layers and N12 layer, and P22 layer and N22
The layers are commonly short-circuited by a third metal electrode T3 to form one electrode, and the composite thyristor having the equivalent circuit shown in FIG. 7 operates as described below.

なお第7図において、第6図と同一符号部分は同等部分
を示し、図中の抵抗R’z RF P23は電流の流路
に沿った各層の横方向抵抗を示す。またツェナダイオー
ドZ D l 22 D 23は低耐圧領域りの耐圧を
示す。
In FIG. 7, parts with the same symbols as those in FIG. 6 indicate equivalent parts, and the resistance R'z RF P23 in the figure indicates the lateral resistance of each layer along the current flow path. Furthermore, the Zener diode Z D l 22 D 23 exhibits a breakdown voltage in a low breakdown voltage region.

このサイリスタにおいては、電極T、からT2の方向に
電圧が印加された場合には、PIINIIP N2+は
本質的には短絡ベース型サイリスタであるが、低耐圧領
域がない場合には各層の相対位置関係から接合J 12
がブレークダウンしたとき、N、、P N、、層に電流
が流れてて3層ダイオードの特性となりオン状態に移行
しない。
In this thyristor, when a voltage is applied in the direction from electrode T to T2, PIINIIP N2+ is essentially a short-circuit base type thyristor, but if there is no low breakdown voltage region, the relative positional relationship of each layer Junction J 12
When the diode breaks down, current flows through the N,,P,N,,layers and it becomes the characteristic of a three-layer diode and does not turn on.

しかし低耐圧領域が存在すると、ツェナダイオードZD
I2がブレークダウンして、電流か(T。
However, if a low breakdown voltage region exists, the Zener diode ZD
I2 breaks down and the current (T.

→Nll→R11→→Z D I 2→P−R,→P−
N2→T2)に流れる。そしてこの電流か増加すると、
P層の横方向抵抗Rpによる電圧降下によってCP−N
、→N23→R23→→ZD2.→P〕にも電圧がかか
った状態になる。
→Nll→R11→→Z D I 2→P-R, →P-
N2→T2). And when this current increases,
Due to the voltage drop due to the lateral resistance Rp of the P layer, CP-N
,→N23→R23→→ZD2. →P] is also in a state where voltage is applied.

この状態は第7図に示す等価回路において、サイリスタ
の電極T、と72間にサイリスタ〔PN、、P N、、
)および(P23 N25P N21:1が直列に接続
され、それぞれ(N++Pゲート〕とCN2sPゲート
〕に点弧電流が流出入していることに相当するので、電
極T1→T2→T3の経路て電極T172間がオン状態
に移行することになる。この動作状態は電圧印加の方向
を逆にした場合にも成立する。従って電極T、72間、
T2T3間、TIT2間が実質的に等しい耐圧の両方向
サイリスタ作用を行うことになる。
In this state, in the equivalent circuit shown in FIG. 7, the thyristor [PN, , P N, .
) and (P23 N25P N21:1 are connected in series, which corresponds to the ignition current flowing in and out of (N++P gate) and CN2sP gate), so the path of electrodes T1→T2→T3 leads to electrode T172. The area between the electrodes T and 72 shifts to the on state. This operating state also holds true when the direction of voltage application is reversed. Therefore, between the electrodes T and 72,
A bidirectional thyristor action with substantially equal breakdown voltage is performed between T2T3 and TIT2.

従って例えば第8図のように電極T、T2を線路り、L
2間に接続し、電極T3を接地Eに落として通信回線に
おける機器Mの防護に使用すれば、前記第2図に示すサ
イリスタ2,222.の計3個の役割を1個で果たすこ
とができる。
Therefore, for example, if the electrodes T and T2 are connected as shown in FIG.
If the thyristor 2, 222.2 shown in FIG. 2 is connected between the thyristors 2, 222. One piece can fulfill a total of three roles.

またこの複合サイリスタを形成する5層サイリスタはそ
れぞれ低耐圧領域りを備えている。従って前記第3図、
第4図で説明したようにP層の厚みを小とすることなく
低耐圧化が可能となり、特性が均一であって低静電容量
の複合サイリスタを得ることがでる。これに加えて初期
点弧位置も一定となるので、サージ防護耐量のばらつき
が少なくしかもサージ電流耐量が大となる。従って本発
明によれば従来のものに比べて更に使用が簡単であって
動作が確実、しかも製作が容易な低耐圧であってデジタ
ル化された電子機器回路のサージ防護に好適する複合サ
イリスタを提供てきる。
Further, each of the five layer thyristors forming this composite thyristor has a low breakdown voltage region. Therefore, the above-mentioned FIG. 3,
As explained in FIG. 4, it is possible to lower the withstand voltage without reducing the thickness of the P layer, and it is possible to obtain a composite thyristor with uniform characteristics and low capacitance. In addition, since the initial ignition position is also constant, variations in surge protection capability are reduced and surge current capability is increased. Therefore, the present invention provides a composite thyristor that is easier to use than conventional ones, operates more reliably, has a low withstand voltage that is easy to manufacture, and is suitable for surge protection of digitalized electronic equipment circuits. I'll come.

以上本発明をPNPNP型について説明したが、伝導型
を逆にしたものを作りうろことは云うまでもない。また
サイリスタの信頼性の向上のため、第3図のようにチャ
ネルストッパとなるPL層を設けるなとの従来公知の手
段を適用できる。
Although the present invention has been described above with respect to the PNPNP type, it goes without saying that it would also be possible to create a device with the conductivity type reversed. Further, in order to improve the reliability of the thyristor, conventionally known means such as not providing a PL layer serving as a channel stopper as shown in FIG. 3 can be applied.

(発明の効果) 以上から明らかなように本発明によれば、使用か簡単で
あって動作の確実なデジタル化集積回路からなる電子機
器回路のサージ防護素子を提供できる。
(Effects of the Invention) As is clear from the above, according to the present invention, it is possible to provide a surge protection element for an electronic device circuit comprising a digitized integrated circuit that is easy to use and operates reliably.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は従来素子の説明図、第3図。 第4図は本発明によって提案された複合サイリスタの説
明図、第5図、第6図、第7図、第8図は本発明の詳細
な説明図である。
1 and 2 are explanatory diagrams of a conventional element, and FIG. 3 is an explanatory diagram of a conventional element. FIG. 4 is an explanatory diagram of a composite thyristor proposed by the present invention, and FIGS. 5, 6, 7, and 8 are detailed explanatory diagrams of the present invention.

Claims (1)

【特許請求の範囲】[Claims] P(N)型半導体を共通基板として、順方向耐圧をきめ
る接合部の一部にそれぞれ他の部分に比して耐圧の低い
領域を設けた2組のPNPNP(NPNPN)5層構造
を形成すると共に、一面の表面にそれぞれ露呈させた2
組のP(N)エミッタとN(P)ベースをそれぞれ独立
に短絡して第1、第2の電極として、他面の表面にそれ
ぞれ露呈させた2組のP(N)エミッタとN(P)ベー
スを共通に短絡して第3の電極としたことを特徴とする
複合サイリスタ。
Using a P(N) type semiconductor as a common substrate, two sets of PNPNP (NPNPN) five-layer structures are formed in which a region with a lower breakdown voltage than other parts is provided in a part of the junction part that determines the forward breakdown voltage. 2, each exposed on one surface.
Two pairs of P(N) emitters and N(P) bases are short-circuited independently to serve as first and second electrodes, and two pairs of P(N) emitters and N(P) bases are exposed on the other surface. ) A composite thyristor characterized in that its base is short-circuited in common to serve as a third electrode.
JP2822590A 1990-02-09 1990-02-09 Compound thyristor Expired - Fee Related JPH0614546B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2822590A JPH0614546B2 (en) 1990-02-09 1990-02-09 Compound thyristor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2822590A JPH0614546B2 (en) 1990-02-09 1990-02-09 Compound thyristor

Publications (2)

Publication Number Publication Date
JPH03233973A true JPH03233973A (en) 1991-10-17
JPH0614546B2 JPH0614546B2 (en) 1994-02-23

Family

ID=12242671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2822590A Expired - Fee Related JPH0614546B2 (en) 1990-02-09 1990-02-09 Compound thyristor

Country Status (1)

Country Link
JP (1) JPH0614546B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5352905A (en) * 1991-11-27 1994-10-04 Shindengen Electric Manufacturing Co., Ltd. Semiconductor surge suppressor
US5500377A (en) * 1994-09-06 1996-03-19 Motorola, Inc. Method of making surge suppressor switching device
JP2012054356A (en) * 2010-08-31 2012-03-15 Shindengen Electric Mfg Co Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5352905A (en) * 1991-11-27 1994-10-04 Shindengen Electric Manufacturing Co., Ltd. Semiconductor surge suppressor
US5500377A (en) * 1994-09-06 1996-03-19 Motorola, Inc. Method of making surge suppressor switching device
JP2012054356A (en) * 2010-08-31 2012-03-15 Shindengen Electric Mfg Co Ltd Semiconductor device

Also Published As

Publication number Publication date
JPH0614546B2 (en) 1994-02-23

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