JPH03231325A - Detecting method for continuous positions of prescribed code bit - Google Patents

Abstract

PURPOSE:To detect the position of a prescribed code bit on data at high speed by obtaining the data length with addition of the (x) length and the (y) length of the data that receives the accesses for each word. CONSTITUTION:The compressed image data are latched by a latch 11 for each word and outputted to an (x) length detection circuit 12 and a (y) length detection circuit 13 respectively. The (y) length is first detected and sent to a register 15 via a selector 14. Then the subsequent data equivalent to a single word are latched by the latch 11 and the (x) length is detected. The (x) length is added to the (y) length stored in the register 15 via an adder 16, and the (y) length is updated in the register 15 based on the addition value. When a 16-bit deciding circuit 17 decides that the (x) length is smaller than 15 bits, the addition value is sent to a deciding circuit 18 from the register 15. The circuit 18 decides the presence or absence of the head of the data corresponding to a single main scan line. Thus it is possible to detect a position where >=17 pieces of 'O' bits are continuous on the compressed image data.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to data processing in which bits of a predetermined code exist in data consisting of a large number of words and continue over a length of bits constituting one word. The present invention relates to a method for detecting consecutive positions of predetermined code bits for detecting positions.

(Prior Art) Digital data representing images etc. generally has a huge amount of information, and when storing this digital data in a data recording device or transmitting/receiving it, it is necessary to Data compression is generally performed in which redundancy is suppressed by utilizing the strong correlation between pixel values of pixels and the amount of data is compressed. The data after this data compression is converted into a set of digital data representing the pixel values of many pixels lined up on one main scanning line when reading an image to obtain digital data, for example. In order to indicate the beginning of each set, a continuous 01 bit or "1" bit of one word or more, for example, 1'7 bits or more, may be inserted at the beginning of each set.

FIG. 4 is a block diagram showing an example of the flow of a series of data compression/expansion processes.

For example, digital data S1 representing an image obtained by an image reading device (not shown) is input to a data compressor 1. In the data compressor 1, data compression is performed for each set of digital data representing the pixel values of a large number of pixels lined up on each main scanning line when reading an image.
Then, 17 consecutive "0° bits" are inserted at the beginning of each set, and compressed image data S2 is generated. This compressed image data S2 is made by filing a large number of images in the form of compressed digital data. The compressed image data S2 stored in the image filing device 2 is sent to and stored in the image filing device 2. The compressed image data S2 stored in the image filing device 2 is read out as necessary and input to the zero length detection circuit 3 and the data expander 4. The detection circuit 3 detects 17 or more consecutive '0# bits existing in the compressed image data S2, determines the beginning of each set corresponding to each main scanning line, and decompresses the position of each beginning. The data decompressor 4 converts the compressed image data based on the compressed image data S2 inputted from the image filing device 2 and the information representing the start position of each set inputted from the zero length detection circuit 3. Decompress S2 and restore the original digital data S
1 and the decompressed image data S3 (in the case of irreversible compression, it will not completely return to its original state) is obtained, and is sent to, for example, a CRT display device (not shown), and is processed based on the image data S-3. A visible image is displayed.

The above is an example of data compression/expansion, or regardless of data compression/expansion, for example, when transmitting/receiving digital data, a predetermined length of continuous "0" is placed at the beginning of a group of digital data to indicate the beginning. ``In some cases, bits etc. are inserted.

When performing the data compression/expansion processing or transmitting/receiving digital data, it is necessary to detect whether "0° bits, etc. are continuous for a predetermined length or longer, for example, by the zero length detection circuit or the like.

FIG. 5 is a circuit diagram showing an example of a conventional zero length detection circuit for detecting whether or not "0" bits continue for a predetermined length or longer.

Shift register 5 has parallel manual output/serial output 1
It is a 6-bit shift register that stores a large number of words (in this example, 1
It is assumed that the word is ~16 bits. ) is sequentially input to the shift register 5 in units of one word. Every time one word is input to the shift register 5, 16 pulses of the clock signal CL are input, whereby the data in the shift register 5 is serially sent to the shift register 6. The shift register 6 is a serial manual/parallel output shift register with a bit length depending on how many consecutive "O° bits" are detected, and all bits of the shift register 6 become "0°". When this occurs, a pulse signal as shown in the figure is output from the gate circuit 7 connected to the parallel output terminal of the shift register 6.
This detects that "0" bits are continuous for a predetermined length or longer.

(Problem to be Solved by the Invention) The conventional zero length detection circuit described above converts a parallel input signal into a serial signal in units of one word, so it takes time to detect the zero length. In some cases, the time taken to detect the length becomes an impediment to speeding up a series of subsequent processes, including, for example, data decompression processing.

In view of the above circumstances, the present invention provides a predetermined code (“0” or “1°” that exists in data consisting of a large number of words).
) It is an object of the present invention to provide a method for detecting the consecutive positions of predetermined code bits by which a circuit can be constructed that can rapidly detect the positions of consecutive bits in data.

(Means for Solving the Problems) The first method of detecting consecutive positions of predetermined code bits of the present invention is such that the bit length of the predetermined code bits present in data consisting of a large number of words is equal to or longer than the bit length constituting one word. In the predetermined code bit consecutive position detection method for detecting consecutive positions in data that are consecutive over a period of time, the predetermined code bit bits are successive from the least significant bit to the most significant bit of a first word among the plurality of words. Find the bit length of the second word following the lower order side of the first word, find the second bit length in which the bits of the predetermined code are continuous from the most significant bit to the least significant bit, and The bit length of the predetermined code is added to the first bit length to obtain the added bit length, and this added bit length is compared with the bit length that makes up one word. It is characterized by detecting positions on continuous data over a period of time.

Further, the second method of detecting the continuous position of predetermined code bits of the present invention includes data in which the bit of the predetermined code is 1 and which is continuous for a predetermined length exceeding the bit length constituting the word, which exists in data consisting of a large number of words. In the predetermined code bit consecutive position detection method for detecting the upper position of the predetermined code bit, a first bit length in which bits of the predetermined code are consecutive from the least significant bit to the most significant bit of the first word among the plurality of words is determined. seek,
A second bit length in which the bits of the predetermined code are continuous from the most significant bit to the least significant bit of a second word following the lower order side of the first word is determined, and the second bit length is calculated from the second word. The second bit length is added to the first bit length to obtain the additional bit length, and it is determined whether the second bit length is the same as the bit length constituting one word or is a smaller number than the bit length, and the second bit length is determined. If the bit length is smaller than the bit length constituting one word, the added bit length is compared with the predetermined length to detect the position in the data where the bit of the predetermined code continues for the predetermined length. , If the second bit length is the same as the bit length constituting one word, replace the third word following the lower order side of the second word with the second word and create a new second word. Find a new second bit length in which the bits of the predetermined code are continuous from the most significant bit to the least significant bit of the new second word, and set the new second bit length to the addition bit length. to obtain a new addition bit length, and if necessary, repeat the procedure of obtaining the new addition bit length from the determination, and then compare the finally obtained addition bit length with the predetermined length. The present invention is characterized in that the position on the data where the bits of a predetermined code are continuous for the predetermined length is detected.

Here, the above-mentioned "word" is not limited to a specific bit length, for example, 4 bits.

A processing unit of a series of digital data such as 8 bits, 16 bits, 32 bits, etc.

Moreover, the above-mentioned "as necessary" is determined by the relationship between the bit length constituting one word and the predetermined length to be detected. For example, if the bit length constituting one word is 16 and the predetermined length to be detected is If the predetermined length is 17, there is no need to "repeat the procedure for determining the new addition bit length from the determination" for the fourth word following the lower order side of the third word, and the fourth word forms one word. If the bit length to be detected is 8 and the predetermined length to be detected is 17, perform the above-mentioned procedure for determining the new addition bit length from the determination for the fourth word following the lower order of the third word. If the bit length constituting one word is 8 and the predetermined length to be detected is 25, the fourth word following the lower order side of the third word and the fourth word This means that it is necessary to "repeat the procedure for determining the new addition bit length from the determination" for the fifth word following the lower order side of the fourth word. It should be noted that there may be cases where it is not necessary to repeat the above-mentioned procedure for determining the new addition bit length from the determination, and the present invention does not include cases where the procedure is repeated more than necessary. Of course, it is something that

(Operation) The first and second predetermined code bit consecutive position detection methods of the present invention access data in units of one word according to each of the steps described above, and obtain the first and second bit lengths, These are added to find the addition bit length, and all can be treated as parallel data, and the number of steps is small and the bits of a predetermined code continue for a predetermined length at a high speed. can be detected.

(Example) Examples of the present invention will be described below.

FIG. 1 is a block diagram showing an example of a zero length detection circuit using an example of the predetermined code bit consecutive position detection method of the present invention. FIG. FIG. 3, a diagram showing an example, is a flowchart showing the circuit operation of the zero length detection circuit shown in FIG.

In this embodiment; as described above. 0 at the beginning of compressed image data, that is, digital data of each group corresponding to each main scanning line.
"The bits are consecutive for a predetermined length (17 bits here), and the beginning of each digital data is to be found. Also, as shown in FIG. It is assumed that the data consists of 16 bits from the lower bit (LSBO) to the most significant bit (MSB15).Here, for the sake of simplicity, the data consists of 16 bits from the most significant bit (MS8.15) of each word. The bit length (second bit length) in which "0" bits continue toward the least significant bit (LSBO) is X length, and the length from the least significant bit (LSBO) to the most significant bit (MS B 1) of each word is
The bit length (first bit length) in which "0" bits continue toward 5) is called the y length.

The compressed image data is input word by word to the latch circuit 11 and latched (step A). Here, one word of data latched by the latch circuit 11 in step A will be referred to as a first word. The first word latched by the latch circuit 11 is input to the X-length detection circuit 12 and the y-flame detection circuit 13. First, the y-length is detected in the y-flame detection circuit 13 (step B). detected y
The length is input to the register 15 via the selector 14 (step C). Note that the selector 14 connects the y-flame detection circuit 13 and the register 15 at the timing when inputting the y length to the register 15, and connects the adder circuit 16 and the register 15 at the timing when inputting the addition result in the adder circuit 16, which will be described later, to the register 15. The circuit is switched so that the two are connected.

Next, one word of data following the lower order side of the first word (this is referred to as a second word) is sent to the latch circuit 11.
is input and latched (steer knob D). The second word latched by the latch circuit 11 is input to the X flame detection circuit 12 and the y flame detection circuit 13 in the same way as the first word, but this time the X flame detection circuit 12 inputs the is detected (step E), and the detected X length is input to the adder circuit 16. The y-length of the first word stored in the register 15 is also input to the adder circuit 16, and the y-length of the first word and the X-length of the second word are added, and this added value is y of the first word input into register 15 and previously stored in register 15
stored in the register 15 instead of the length (step F)
. In addition, the X length determined by the X flame detection circuit 12 is also manually input to the 16-bit determination circuit 17, which determines whether this X length is the bit length (16 bits) constituting one word or is less than or equal to 15 bits. A determination is made (step G). The 16-bit determination circuit 17 controls the X-flame detection circuit 12 . y
Flame detection circuit 13. Selector 14. It also controls a determination circuit 18, which will be described later.

15-bit judgment circuit 17 When it is judged that the X length of the lever is 15 bits or less, the added value stored in the register 15 is input to the judgment circuit 18, and it is checked whether this added value is 17 bits or more. In other words, it is determined whether this is the beginning of the digital data corresponding to one main scanning line (step H).

Note that if a '0'' bit with a bit length (16 bits) constituting one word is inserted at the beginning of each digital data, the X length in step G above is the bit length (16 bits) constituting one word. There is no need to judge whether this is the beginning of the digital data corresponding to one main scanning line (if the above added value is 16 bits or more) ) is determined.

If it is determined that this is the beginning of the digital data corresponding to one main scanning line, this series of processing ends. still,
The beginning of the digital data corresponding to the next main scanning line may be subsequently determined.

If the determination circuit 18 determines that the added value stored in the register 15 is 16 bits or less, that is, it is not the beginning of the digital data corresponding to one main scanning line, the second value latched in the latch circuit 11 is The y-length of the new first data is determined using the data as new first data (step B), and similar processing is performed thereafter.

In addition, the 16-bit determination circuit 17 determines that the X length of the second word is 1.
If it is determined that the bit is 6 bits, the latch circuit 11
Since there is a possibility that the third word following the lower-order side of the second word latched in is also a “0” bit, the third word is treated as a new second word and the new word is The processing of steps DG described above is repeated for the second word. Since we are looking for the position in the data where 17 consecutive "0" bits are present, it is not necessary to determine whether the X length of the new second word in step G is 16. , this determination is made in this embodiment. The same holds true for the words following the new second word when the X length of the new second word is further 16.

As described above, in the above embodiment, by detecting the position where 17 or more consecutive "0" bits are present on the compressed image data, the beginning of the digital data corresponding to one main scanning line can be moved at high speed. Desired.

In the above embodiment, the position where there are 17 or more consecutive "0" bits is found, but in the present invention, the position where there are consecutive bits with the sign "1" can also be found, and the number of consecutive bits can also be determined. The length to be determined can also be arbitrarily determined as long as it is longer than the bit length constituting one word.

(Effects of the Invention) As explained above in detail, the method for detecting consecutive positions of predetermined code bits of the present invention allows the X length and y length of data to be sequentially accessed in units of one word to be detected at the predetermined timing described above. The basic method is to obtain the added data length by adding them together, and all data can be treated as parallel data, and the position in the data where pits of a predetermined code continue for a predetermined length can be detected at high speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a zero length detection circuit using an example of the predetermined code bit consecutive position detection method of the present invention. FIG. FIG. 3 is a flowchart showing the circuit operation of the zero length detection circuit shown in FIG. 1; FIG. 4 is a block diagram showing an example of the flow of a series of data compression/expansion processes; FIG. 5 is a circuit diagram showing an example of a conventional zero length detection circuit for detecting whether 0° bits are continuous for a predetermined length or longer. 11... Latch circuit 12... X flame detection circuit 1
3...y length detection circuit 14...selector 15...
・Register 16...Addition circuit 17...16
Bit judgment circuit 18... judgment circuit

Claims (2)

[Claims] (1) Exists in data consisting of many words,
In a predetermined code bit consecutive position detection method for detecting a position in data where bits of a predetermined code are continuous over a length of bits constituting one word or more, the least significant bit to the most significant bit of a first word among the plurality of words A first bit length in which the bits of the predetermined code are consecutive is determined, and the bit length of the predetermined code is determined from the most significant bit to the least significant bit of the second word following the lower order side of the first word. By determining a continuous second bit length, adding the second bit length to the first bit length to determine an additional bit length, and comparing this additional bit length with the bit length constituting one word. 1. A method for detecting continuous positions of predetermined code bits, characterized by detecting positions in data where bits of the predetermined code are continuous over a length of bits constituting one word or more. (2) Exists in data consisting of many words,
In a predetermined code bit consecutive position detection method for detecting a position in data in which the predetermined code bits exceed a bit length constituting one word, the predetermined code bit consecutive position detection method includes Find a first bit length in which the bits of the predetermined code are continuous toward the upper bits, and calculate the length of the predetermined code from the most significant bit to the least significant bit of the second word following the lower order side of the first word. Determine a second bit length in which consecutive bits are continuous, add the second bit length to the first bit length to determine the added bit length, and determine that the second bit length is the bit length constituting one word. Determine whether the second bit length is the same or smaller than the bit length, and if the second bit length is a smaller number than the bit length constituting one word, set the addition bit length to the predetermined length. By comparing the bits of a predetermined code, the position in the data where the bits are continuous for the predetermined length is detected, and if the second bit length is the same as the bit length constituting one word, the lower order of the second word is detected. A new second word in which the bits of the predetermined sign are continuous from the most significant bit to the least significant bit of the new second word by replacing the third word following the second word with the second word. A step of calculating a second bit length, adding the new second bit length to the addition bit length to obtain a new addition bit length, and calculating the new addition bit length from the determination as necessary. Predetermined code bit consecutive position detection characterized in that the position in the data where the bits of the predetermined code are continuous for the predetermined length is detected by repeatedly comparing the finally obtained addition bit length with the predetermined length. Method.