JPH03228483A - Image processing system - Google Patents

Abstract

PURPOSE:To obtain an output image with high definition of frame information from either image information of field recording or frame recording by reading out the attribute of the image information stored in a storage medium with the image information, and storing it in accordance with the attribute. CONSTITUTION:A reproducing means 31 which reads out plural pieces of image information stored in the storage medium and their attributes, and a storage means 3 capable of storing the plural pieces of image information in the storage medium are provided. Also, a storage control means 33 which performs an interpolation arithmetic operation on the image information and generates a one-side field and stores it in the storage means 3 as the frame information when the attribute of the image information reproduced with the reproducing means 31 shows the one of field recording, and adversely, stores the image information as it is sequentially in the storage means 3 when the attribute of the image information shows the one of frame recording, and an image forming means 32 which image-forms the image information stored in the storage means 3 as a visual image are provided, In such a way, it is possible to obtain the output image with high definition even when the image information in the storage medium is the one of either field recording or frame recording.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing system that forms an image from input information.

[Prior Art] Recently, various video devices such as still video cameras, handy video cameras, and VTRs have appeared that store image information in a storage medium such as a magnetic material and then reproduce it as an electrical signal.

Furthermore, video printers and the like have been provided as devices that form image information from these video devices as visible images.

[Problems to be Solved by the Invention] However, in conventional video printers, etc., images are formed solely using field information. There were drawbacks such as a drop in the quality of the output image.

An object of the present invention is to provide an image processing system that can obtain a high-quality output image regardless of whether the image information on the storage medium is field recording or frame recording.

[Means for Solving the Problems] The present invention provides a reproduction means for reading out a plurality of pieces of image information stored in a storage medium and attributes of the image information, a storage means capable of storing a plurality of pieces of information on the storage medium, and a reproduction means for reading out a plurality of pieces of image information stored in a storage medium and the attributes of the image information. When the attribute of the image information reproduced by the means is field recording, an interpolation operation is performed from the image information to generate a single field and stored in the storage means as frame information, and conversely, when the attribute of the image information is frame recording. In some cases, the apparatus is characterized by having a storage control means for sequentially storing the image information in the storage means as is, and an image forming means for forming the image information stored in the storage means as a visible image.

[Operation] The present invention reads image information stored in a storage medium as well as attributes of the image information, and when the attribute of the image information is field recording, performs interpolation calculation from the image information to generate a single field. However, it is stored as frame information together with the original image information, and if the attribute of the image information is frame recording, it is stored sequentially as is, so it is possible to store image information in either field recording or frame recording. It is also possible to obtain high-quality output images using frame information.

[Example] Hereinafter, an example according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a system configuration diagram showing a schematic internal configuration of a color image forming system according to an embodiment of the present invention.

The system of this embodiment includes a digital color image reading device (hereinafter referred to as a color reader) that reads digital color images, and a digital color image printing device (hereinafter referred to as a color printer) that prints out digital color images.
2, an image storage device 3, an Sv playback device 31, a monitor television 32, and a host computer 33.

The color reader l of this embodiment includes a color separation means, which will be described later,
This device uses a photoelectric conversion element composed of a COD or the like to read color image information of a read document for each color and converts it into an electrical digital image signal.

The color printer 2 is an electrophotographic laser beam color printer that limits color images by color according to the digital image signal to be output, and transfers and stores the images multiple times in the form of digital dots onto storage paper. .

The image storage device 3 is a device that quantizes the digital image read from the color reader 1 and the analog video signal from the SV recorder/player 31, converts it into a digital image, and then stores the digital image.

The SV@player 31 is a device that plays back image information taken with an Sv camera and stored on a floppy disk (hereinafter referred to as Sv floppy), and outputs it as an analog video signal. In addition to the above, the Sv recording/playback@31 can also be stored in the Sv floppy by inputting an analog video signal. Furthermore, the SV floppy can also store audio and digital information.

The monitor television 32 is a device that displays the images stored in the image storage device 3 and the contents of the analog video signal output from the Sv recording/playback device 31.

The host computer 33 has a function of transmitting image information to the image storage device 3 and receiving and receiving image information of the color reader 1 and Sv recording/playback information stored in the image storage device 3. It also controls the color reader l, color printer, etc.

The details of each part will be explained below.

Description of color reader l First, the configuration of the color reader I will be explained.

In the color reader 1 shown in FIG. 1, 999 is an original, 4 is a platen glass on which the original is placed, and 5 is an I\\logen exposure lamp 10 that focuses the reflected light image from the original that has been exposed and scanned. The rod array lens 5, which is a rod array lens for inputting images to the full color sensor 6, the same-magnification full color sensor 6, the sensor output signal amplification circuit 7, and the halogen exposure lamp 1O are integrated into the original scanning double knee 2.
11, and exposes and scans the original 999 in the direction of the arrow (AI). Image information to be read from the original document 999 is sequentially read line by line by exposing and scanning the original scanning unit 11. The read color-separated image signal is amplified to a predetermined voltage by the sensor output signal amplification circuit 7, and then input to the video processing unit 12 via the signal line 501, where the signal is processed. Note that the signal line 501 has a coaxial cable configuration to ensure faithful signal transmission. A signal 502 is a signal line that supplies drive pulses for the same-magnification full-color sensor 6, and all necessary drive pulses are generated within the video processing unit 12. Reference numeral 8.9 denotes a white plate and a black plate for correcting the white level and black level of the image signal, and by irradiating them with the halogen exposure lamp 10, signal levels of predetermined densities can be obtained, and the video signal Used for white level correction and black level correction.

13 is the color of this embodiment having a microcomputer.
This is a control unit that controls the entire reader 1, and performs display on the scanning panel 20, control of key input, control of the video processing unit 12, etc. via the bus 508. It also connects the signal line 509 with the position sensors Sl and S2. .510 to detect the position of the original scanning device 22) 11.

Furthermore, the signal line 503 controls the stepping motor drive circuit 15 that pulse-drives the stepping motor 14 for driving the scanning body 11, and the exposure lamp driver 21 controls the halogen exposure lamp 10 to turn on/off via the signal line 504. It performs all controls of the color league section 1, such as light amount control, control of the digitizer 16 and internal keys, and display section via the signal line 505.

The color image signal read by the exposure scanning unit 11 described above during exposure scanning of the original is sent to the sensor output amplification circuit 7.
, are input to the video processing unit 12 via a signal line 501.

Next, details of the document scanning unit 11 and video processing unit 12 described above will be explained using FIG.

The color image signal input to the video processing unit 12 is separated into three colors, G (green), B (blue), and R (red) by the sample hold circuit S/H 43. Each color image signal is separated by 0. After performing analog processing in the analog color signal processing circuit 44, the A/D
It is converted into a digital color image signal.

In this embodiment, the color reading sensor 6 in the document scanning unit 11 is arranged in a staggered manner divided into five areas. This color reading sensor 6 and FIFO memory 46
, the 2nd and 4th channels being pre-scanned and the remaining l
, 3.5 channels are corrected for reading position deviations.

The signal from the FIFO memory 46 that has been corrected for device misalignment is input to the no-correction/white correction circuit, and the signal corresponding to the reflected light from the white plate 8 and the black plate 9 is used to read the color reading sensor. 6, unevenness in the amount of light from the halogen exposure lamp IO, variations in sensor sensitivity, etc. are corrected.

Color image data proportional to the input light amount of the color reading sensor 6 is input to a video interface 101 and connected to the image storage device 3.

This video interface 101 has the functions shown in FIGS. 3 to 6. That is, (1) a function of outputting the signal 559 from the no-correction/white correction circuit to the image storage device 3 (FIG. 3), (2) a function of inputting image information from the image storage device 3 to the logarithmic conversion circuit 86. (Figure 4).

(3) A function to output the image information from the printer interface 56 to the image storage device 3 (FIG. 5); (4) a function to send the signal 559 from the no-correction/white correction circuit to the logarithmic conversion circuit 86 (the sixth It has four functions: The selection of these four functions is switched by the CPU control line 508 as shown in FIGS. 3-6.

Description of the image storage unit 3> Next, the reading (capture) control in the color reader 1 and the image storage unit 3 of the read image information in this embodiment will be described.
The storage control will be explained.

Settings for reading by the color reader I are performed by the digitizer described below. FIG. 7 is a front view showing the appearance of the digitizer 16.

In FIG. 7, 427 is an entry key for transferring image data from the color reader 1 to the image storage device 3. The coordinate detection plate 420 is used to specify an arbitrary area on the document to be read, or to set the reading magnification and the like. Point hem 421 specifies its coordinates.

To transfer the image data of an arbitrary area on the document to the image storage device 3, after pressing the entry key 427, the point pen 421 is used to indicate the reading position.

This reading area information is sent to video processing unit 12 via communication line 505 in FIG. In the video processing unit 12, this signal is sent to the CPU control line 508.
The image is then sent from the video interface 101 to the image storage device 3.

Further, if the reading position is not specified with the point pen 421 after pressing the entry key 427, the color reader l detects the size of the original 999 by bliscan, and uses this information as image reading area information. It is sent to the image storage device 3 via the video interface 101.

Next, a process of sending information on a designated area of the original document 999 to the image storage device 3 will be explained.

FIG. 8 shows an example of the address of the area information (points A and B) indicated by the point pen 421 of the digitizer 16.

In addition to this area information, the video interface 101 also uses a VCLK signal, an ITOP 551, an area signal generation circuit 5
The EN signal 104, which is a signal from 1 (note that the book indicates a negative logic signal), is sent to the image storage device 3 together with the image data.
Output to.

FIG. 9 is a timing chart showing these output signal lines.

As shown in FIG. 9, by pressing the start button on the operation unit 20, the stepping motor 14 is driven, the document scanning unit 11 starts scanning, and when the leading edge of the document is reached, the ITOP signal 551 becomes "l". , the document scanning unit) 11 reaches the area specified by the digitizer 16, and while scanning this area, the signal 104 becomes "l".
Therefore, it is sufficient to take in the read color image information (DATA1 05.106.107) while EN and signal 104 are "1".

As shown in FIG. 9 above, image data transfer from the color reader I is performed by controlling the video interface 101 as shown in FIG. EN,
R data 105, G data 106, and B data 107 are sent to the image storage section M3 in real time in synchronization with the No. 8 control signal 104 and the VCLK signal.

Next, FIG. 10(A) shows how the image storage device specifically stores data using these image data and control signals.
This will be explained with reference to (B).

The connector 4550 is connected to the video interface 101 of the color reader 1 via a cable, and the R data 1
05, G data 106, and B data 107 are connected to the selector 4250 via signal lines 9430R19430G and 9430B, respectively. VCLK, EN, signals 104 sent from the video interface 101,
ITOP 551 is input directly to system controller 4210 through signal line 9450.

Further, prior to reading the document, area information specified by the digitizer 16 is input to the league controller 4270 through the communication line 9460, and is read from there to the CPU 4360 via the CPU bus 9610.

The R data 105, G data 106, and B data 107 input to the selector 4250 via the signal lines 943OR19430G and 9430B are selected by the selector 4250, and then the signal lines y9420R19420G,
Output to 9420B, PIF01%! J405OR1
It is input to 4050G and 4050B.

FIG. 11 is a circuit diagram showing the detailed configuration of this selector 425o.

As shown in the figure, when storing image information from the color reader 1 to the image storage device 3, a control signal 5ELECT-A (9451A) I "1" is sent from the system controller 4210.
, 5ELECT-B (9451C)e “1”, 5ELE
Set CT-C (945IC) to "0", use the tristate buffer 774251E, V, R, G, Bf), and connect other tristate buffers 4255E, V, R.
, G, B and 4256E, V, RlG, B are high impedance.

Similarly, among the control signals 945017), VCLK.

EN, signal, 5ELECT signal (9451A, B, C
) selected by Now, when image information from the color reader I is stored in the image storage device 3, as shown in FIG.
, V is alive, passing through each signal line 9456.9457 of CLKIN, ENIN, to the system controller 4.
21O.

Also, the control signal VSYNCIN.

(9455), H3YNCIN, and (9452) are input directly to the system controller 421O from the connector 4550. Furthermore, the selector 4250 also has a function of averaging the image information from the color reader l. Signals 9430R and 9430G input from color reader l
, 9430B are signal lines 9421R, 9421G,
9421B, FIFO memory 4252R1425
2G, input to 4252B.

The output from the FIFO memories 4252R, 4252G, 4252B is image information 9421R19421G, 942
1B, it is a signal with l main scanning delay, and the signal line 9
422R19422G, 9422B, adder 42
53R.

It is input to 4253G and 4253B. Also, the adder 42
53R, 4253G, 4253B has a selector 425
1R14251G, signal 9421R1 from 4251B
9421G and 9421B are input. Adder 42
53R14253G and 4253B take the average of 2 pixels in the main scanning direction and 2 pixels in the sub-scanning direction, that is, 4 pixels, and output it to signal lines 9423R19423G and 9423B.

Selectors 4254R14254G, 4254B select image signals 9421R19421G, 9 from color reader l.
421B or averaged 9423R19423G
, 9423B, and signal 9420R19420
G, 9420B, FIFO memo jJ405OR14
It is input to 050G and 4050B.

The system controller 421O selector 4254R
Image data 9420R from 14254G and 4254B
Of 19420G and 9420B, only the effective image area is stored in FIFO memory 4050R14050G and 4050g
Transfer to. Also at this time, the system controller 421
O also performs trimming processing and scaling processing at the same time.

Furthermore, FIFO memory 4050R14050G, 40
50B absorbs the difference in clock between the color reader 1 and the image storage device 3.

Below, these processes of this example will cost $12r! This will be explained in detail with reference to the circuit diagram of II and the timing chart of FIG.

That is, from the selectors 4253R14253G and 4253B to the FIFO memory 4050R.

Prior to data transfer to 4050G and 4050B, the effective area m in the main scanning direction of the area specified by digitizer 16 is determined by comparator 4232.4 by CPU bus 9610.
Write to 233.

The comparator 4232 is set with a start address in the main scanning direction of the area designated by the digitizer 16, and the comparator 4233 is set with a stop address.

Furthermore, the sub-scanning direction of the area specified by the digitizer 16 is controlled by the selector 4213 to select the CPU bus 9610 side and make it valid, and "0" data is written in the valid area of the area specified by the RAM 4212. Invalid area is “
Write 1”.

For scaling processing in the main scanning direction, a scaling factor is set in the rate multiplier 4234 via the CPU bus 961O. In addition, the magnification processing in the sub-scanning direction is performed in RAM4.
This is possible depending on the data written to 212.

FIG. 13 is a timing chart when trimming processing is performed. As mentioned above, when storing only the area specified by the digitizer 16 in the memory (trimming processing), the trimming position in the main scanning direction is set in the comparators 4232 and 4233, and the trimming position in the sub-scanning direction is set in the selector 4213. is placed on the CPU bus 9610 side, and written to the RAM 4212 by the CPU.

Below, as a specific example, the trimming position is 1 in the main scanning direction.
A case where the number is 000 to 3047 and 1000 to 5095 in the sub-scanning direction will be explained.

The trimming section signal 9100 in the main scanning direction is H5YN
The counter 4230 operates in synchronization with CIN, 9452 and CLKIN 9456, and this counter output 9103 becomes 1.
000, the output of the comparator 4232 becomes “
l”, and the output Q of the flip-flop 4235 becomes “1”.
”, and then when the counter output 9103 becomes 3047, the output of the comparator 4233 becomes “1”, and the output of the flip-flop 4235 changes from “1” to “O”.
In addition, in the timing chart of FIG. 13, since equal processing is performed, the rate multiplier 4234
The output of the FIFO memory 405OR14050G, 405 is "1" according to the trimming interval signal 9100.
3 from address 1000 of color image information input to 0B
FIFO memory up to address 047 405OR, 4050
G, written to 4050B.

Also, from comparator 4231, H3YNCIN, 9
452, a signal 9102 delayed by the viewed pixel is output. In this way, FIFO memory 405OR14050G
, 4050B, by providing a phase difference between the R3TW input and the R5TR input, the FIFO memory 4050
CLKI input to R14050G, 4050B
Absorbs the difference in cycle between N9456 and CLK9453.

Next, for trimming in the sub-scanning direction, first selector 421
Select the counter 4214 side that controlled 3 and make it valid,
VSYNCIN, 9455. H3YNCIN, 9452
The 0 interval value number 9104, which outputs an interval signal 9104 synchronized with the RAM 4212, is synchronized with the signal 9102 by the flip-flop 4211, and is output from the FIFO memory 4050R.
The image information stored in 14050G and 4050B is output only in the section where the trimming signal 9101 is "0" (n
I~m°).

In the above description, only the trimming process has been described, but the scaling process can be performed simultaneously with the trimming. For scaling in the main scanning direction, a scaling factor is set in the rate multiplier 4234 via the CPU bus 9610. Further, in the sub-scanning, magnification processing can be performed by data written to the RAM 4212.

FIG. 14 is a timing chart showing the operation when trimming processing and 50% scaling processing are performed. FIG. 14 shows that the image data from the selectors 4254R1G and 4254R1B are scaled down by 50% and stored in the FIFO memory 405.
An example is shown in which data is transferred to 0R14050G and 4050B.

A setting value of 50% reduction is set in the rate multiplier 4234 in FIG. 12 via the CPU bus 9610. At this time, the output signal 910 of the rate multiplier 4234
6 is "0" for each pixel in the main scanning direction as shown in FIG.
” and “l” are repeated. This signal 910
Reduction is performed by controlling the write enable to the FIFO memories 405OR14050G and 4050B using the AND signal 9100 of 6 and the interval signal 9105 generated by the comparators 4232 and 4233. Also, the sub-scanning is shown in FIG. Write data to RAM4212 (FIFO memory 405OR14050G, 405
By setting the read enable signal to 0B to "l" (reading prohibited) within the image data valid area, 50
Only the image data reduced by % is stored in the image memory 4060R1.
Sent to 4060G and 4060B. In the case of FIG. 14, the read enable signal 9101 is "l",'
A 50% reduction is performed by repeating the O'' data alternately.

In other words, the trimming and scaling processing in the main scanning direction is performed using F.
The write enable of the IFO memories 405OR14050G and 4050B is controlled, and the trimming and scaling processing in the sub-scanning direction is performed by the FIFO memories 405OR14050G and 4050B.
Controls read enable of 4050B.

Next, FIFO memory 4050R14050G, 4050
Memory 406OR14060G from B.

The image data is transferred to the 4060B using the counter O (40
80-0) and control line 9101.

The control line 9101 is the FIFO memory 405OR14
050G, 4050B read enable signal,
It is also an enable signal for the counter 4080-0 and a write enable signal for the memories 4060R14060G and 4060B.

When the control line 9101 is “0”, the FIFO memory 4
The image data read from 05OR14050G and 4050B is transferred to tri-state buffer 9090R190.
Pass through 90G and 9090B, memory 406OR1406
Input to 0G, 4060B. At this time, counter 4
The enable signal of 080-0 is also “0”, and C
Signal 912 counted up in synchronization with LK9453
0-Q is output from the counter 4080-0, passes through the selector 4070, and is sent to the memories 4060R14060G, 40
It is input to the ADR9110 of 60B.

Also at this time, memories 406OR14060G, 406
Since the write enable signal WE of 0B is also "0", the image data 9090R19090G, 9 input to the memory 406OR14060G, 4060B
090B is stored.

Note that since the memory capacity in this embodiment is 1M bytes for each color, the image data in the reading area in FIG.
By reducing the read image data by 0%, the read image data is converted to data of the maximum capacity of the memory of the image storage device N3 and is stored.

Further, in the above embodiment, the CPU 4360 calculates the effective area from the information of the area specified by the digitizer 16 of the A3 original, and sets corresponding data in the comparators 4231 to 4233, the rate multiplier 4234, and the RAM 4212.

In this embodiment, since the data capacity of the read image was larger than the image memory capacity, a reduction process was performed to convert the data to a storable capacity, and then the data was stored in the image memory. However, if the data capacity of the read image is smaller than the image memory capacity, the CLR signal 917 in FIG.
'', it is possible to store multiple screens simultaneously in the image memory.In this case, digitizer 1
Trimming information data is set in the comparators 4232 and 4233 that control the writing of the area designated by 6 into the memory, and the same rate is set in the rate multiplier 4234. Furthermore, the write data to the RAM 4212 is set to "0" for all image valid areas and "l" for the other areas, and set to the same size.

In addition, in order to store the read image in the memory while maintaining its aspect ratio (vertical/horizontal ratio), the CPU 4360 first performs zero-order processing to calculate the effective number of pixels "X" from the area information sent from the digitizer 16. Maximum capacity of image storage memory “
y'', calculate 2 using the following formula.

y / x X 1 00- z As a result, (1) When z≧100, the rate multiplier 42
34 is set to 100%, and the entire effective image area is set to “0”.
” and store it in the RAM 4212 at the same size.

(2) When z>100, rate multiplier 42
34 settings and the RAM 4212 are reduced by 2%, and the image is stored in the maximum capacity of the memory while maintaining the aspect ratio.

Even in this case, the data to be written into the RAM 4212 may be appropriately written as data of "l" and "θ" corresponding to the reduction ratio of "2".

By controlling in this way, it is possible to perform arbitrary magnification processing with easy control while maintaining the 7 aspect ratio of the input image by controlling only the image storage device 3, and it is possible to effectively recognize the read image. becomes. Moreover, it is also possible to maximize the utilization efficiency of memory capacity at the same time.

Description of Sv Recording/Playback Interface> As shown in FIG.
It is also possible to output to a color printer 2. The image processing device 3 also handles input images.

Next, a process for importing a video image from the Sv recording/reproducing unit 31 into the image storage device 3 will be described.

First, FIGS. 10(A) and 10(B) show the control for importing video images from the SVR playback unit 31 into the image storage device 3.
This will be explained with reference to a block diagram of the image storage device 3.

The video image from the Sv recorder/player 31 is inputted in the form of an NTSC composite signal 9000 via an analog interface 4500, and is separated by a decoder 4000 into four signals 9015R: R, G, B signals, and composite 5YNC signal. , G, B, and S.

The decoder 4000 also receives a Y (luminance)/C (chroma) signal 9010 from the analog interface 451O.
are also decoded in the same way as above. Selector 401
902OR19020G, 9020B, 9020 to O
The S signals are input signals in the form of separate R, G, BM signals and a composite 5YNC signal. Note that the switch 4530 is a selector 4 for selecting and switching between the inputs of the signals 9020R-S and 9015R-5.
This is a switch that controls 01O. When switch 4530 is open, it selects signal 9030R-3, and when it is closed, it selects signal 9015R-5.

Separate selected by selector 401O) R, G
, 905OR, 9050G, 9050B as B signal
Each signal is converted to A/D converter 4020R14020G.
, 4020B performs analog/digital conversion.

In addition, the selected composite 5YNC signal 90505
is input to the TBC/HV separation circuit 4030, and the TB
Composite 5YN by C/HV separation circuit 4030
A clock signal 9060C, a horizontal synchronization signal 9060H and a vertical synchronization signal 9060V are generated from the C signal 9050. These synchronization signals are sent to the system controller 42
10.

The TVCLK9060c signal output from the TBC/HV separation circuit 4030 of this embodiment is a 12.25 Mn2 clock signal, and the TVHSYNC,9060B signal has a pulse width of 83.5x S17) signal, TVVSYNC,90
The 60V signal has a pulse width of 18.7mS.

The FIFO memory 405OR14050G, 4050B is reset by the TVHSYNC, 9060B signal, and data 9420R19420G, 9420B is written from the "0" address in synchronization with the TVCLK9060C signal.
050B is written by the system controller 421O.
This is performed when the WE output from the signal 9100 is activated.

Next, this WE, the FIFO memory 405OR by the signal
Details of write control of 14050G and 4050B will be explained.

The Sv recording and reproducing unit 31 in this embodiment conforms to the NTSC standard. Therefore, when the video image from SV Recording and Playback 31 is digitized, it has 640 pixels (H) x 480 pixels (V
) screen capacity. Therefore, first, C of the image storage device 3 is
The PU 4360 writes the setting value to the comparators 4232 and 4233 so that there are 640 pixels in the main scanning direction. Next, the input of the selector 4213 is set to the CPU bus 961O side, and writes "O" for 480 pixels in the sub-scanning direction to the RAM 4212. Furthermore, 100% data is set in the rate multiplier 4234 that sets the magnification in the main scanning direction.

The image information of the SV recorder/player 31 is stored in the memory 4060R140.
When storing to 60G, 4060B.

System control 0-74210 is output from TBC/HV separation circuit 4030. TVVSYNC,9060
V, TVHSYNC, 9060H1TVCLK9060
C is vsyNCIN shown in FIG. 12, 9455.
H3YNCIN.

9452 and CLKZN9456.

As described above, by sending the image control signal to the Sv recording/player interface side, the A/D converter 402
9 which is the output signal from OR24020G, 4020B
Data for one main scan of video images of 420R19420G and 9420B are stored in FIFO memories 405OR and 405.
It is stored in 0G and 4050B at the same size.

On the other hand, when reducing the input Sv video image and storing it in the FIFO memory 405OR14050G, 4050B, the reduction rate is set in the rate multiplier 4234, and the data in the RAM 4212 within the image effective area is By setting it to 1'', reduction is possible.

Data transfer from PIF04050R14050G, 4050B to memory 4060R14060G, 4060B is performed from the color reader 1 mentioned above to memory 406OR14.
This is similar to data write control to 060G and 4060B.

Further, in this embodiment, the CPU 4360 of the image storage device 3 determines the type of information on each track of the S floppy mounted on the SV recording/playback unit 31 via the signal line 651. It is possible to know via the SV vane face 4300.

The CPU 4360 sends a command to the Sv recorder/player 31 to output the track contents via the SV bay face 4300.
In response to the above command, in order to return the status of 10 tracks, when registering 16 screens of images, the above command is sent twice to obtain information for 20 tracks.

FIG. 16(A) is a flowchart showing this operation.

First, the CPU 4360 sends a command to the SV recording/playback command 31 to output the contents of the track (S11), and if this command is properly accepted (S12).
), the status for the above IO track will be returned, so enter it (S13), and CP
The U4360 sends a command to output the contents of the next track to the Sv recording/playback program 31 (S14), and if this command is properly accepted (S15), the status of the next 10) racks is sent. is returned, so input it (S16).If the command is not accepted properly in S12,515 and a command error occurs (S17,518), the error handling routine is executed. to move to.

FIG. 16(B) is an explanatory diagram showing status information of each track.

The CPU 4360 selects bit b7. of FIG. 16(B). b6
It is possible to know the type of desired track information from the information in and b3.

Of the status information, when bits b7 and b6 are both "l", it indicates a video track, and bit b
When 3 is “0”, it indicates a field record, and “1”
, indicates frame recording.

FIG. 24 is a flowchart showing the operation when storing image information in the memories 406OR14060G and 4060B based on such status information.

The information of each track of the mass and Sv floppy is reproduced by the SV recording/reproducing device 31 (521), and the CPU 4360 decodes the status information (S22).

Then, when the status information indicates frame recording (S23), the image storage device 3 stores the information of each track as is in the memories 406OR14060G and 4060B (S24).

Further, when the status information indicates field recording (S23), the system controller 421O
First, the field information of the SV recording/playback command 31 is stored as it is in the image memory 4060R14080G, 4060B (525), and then the CPO 4360 stores the field information as it is in the image memory 4060
The image information stored in the 60R14060G and 4060B is read out via the CPU bus 961O (526), interpolation calculations are performed from that information (S27), and the obtained information is transferred to the image memory 406OR1 via the CPU bus 9610.
4060G and 4060B (328), and such operations are performed one after another to create image information for one field.

FIG. 16(C) is a schematic diagram showing a state in which 16 screens of image information from the Sv recording/reproducing device 31 are stored in the image memory.
be.

Note that if the image information is frame recorded, it is stored as is, and if it is field recorded, it is doubled by the above interpolation calculation, so the same storage capacity is allocated for both. .

The SV recording/playback device 31 of this embodiment is based on the NTSC standard, and the aspect ratio of the digital image in the main scanning direction and the sub-scanning direction is 4:3. Even for the aspect ratio of 16:9 of the HDTV standard, which is expected to be the standard, the comparator 42 in FIG.
This can be handled by rewriting the contents of 32.4233 and RAM4212.

In addition, for the memory capacity of 2M bytes in this embodiment, NT
Since the capacity of one screen according to the SC standard is approximately 0.3 MB, it is possible to store images of 6 screens. Storage of these six screens is also possible by setting CLR 9171 shown in FIG. 15 to "1".

In addition, in the case of 1840 pixels (main scanning direction) x 1035 (sub scanning) in the HDTV standard, CLR, 9171
By setting “O”, 1 memory of 2M/<
The screen can be memorized.

Furthermore, it is also possible to correspond to the no-band configuration of video equipment. That is, by increasing the TVCLK output from the TBC/HV separation circuit 4030 of this embodiment, it is possible to increase the number of pixels read in the main scanning direction.

Reading Process from Image Storage Device 3> Next, the memory 406OR of the image storage device 3 described above
The process of reading image data from 14060G and 4060B will be explained.

Inputting instructions and the like when outputting an image from this memory to form an image on the color printer 2 is mainly performed by the digitizer 16 shown in FIG. 7 mentioned above.

In FIG. 7, the key 428 is the memory 4060R140.
This is an entry key for forming an image on the color printer 2 using image data from 60G and 4060B according to the size of recording paper. A key 429 is an entry key for forming an image at a position indicated by the coordinate detection plate 420 of the digitizer 16 and the point pen 421.

First, an example will be described in which an image is formed according to the size of recording paper, and then an example in which an image is formed in an area designated by a digitizer will be described.

Image forming process corresponding to the size of recording paper> In this embodiment, the color printer 2 has two cassette trays 735 and 736, as shown in FIG. 1, and two types of recording paper are set therein. . Here, A4 size recording paper 791 is set in the upper row and A3 size recording paper 791 is set in the lower row. This selection of recording paper is input through the liquid crystal touch panel of the operation section 20. Note that the following description will be made regarding the case where a plurality of images are formed on A4 size recording paper.

First, prior to image formation, by inputting the read image data from the above-mentioned Sv recording/reproducing device 31 to the image storage device 3,
Image memory 4060R14 (described later) from color reader l
060G and 4060B, respectively, store a total of 16 image data from "Image 0" to "Image 15" as shown in FIG. 16(C).

Next, press the entry key 428 of the digitizer 16. This causes the CPU (not shown) to detect the human force on this key, and
The image forming device M3 is automatically set for the size of recording paper.

When forming 16 images shown in FIG. 16(C),
For example, the image forming position is set as shown in FIG.

Next, details of the above image forming process in this embodiment will be explained with reference to the block diagram in FIG. 10 and the timing chart shown in FIG. 18.

IT sent from the color printer 2 shown in FIG. 2 to the color reader l via the printer interface 56
The OP signal 551 is input to the video interface 101 in the video processing unit 12 and is sent from there to the image storage device 3.

The image storage device 3 starts image forming processing in response to this ITOP signal 551. Each image sent to the image storage device N3 is stored in one image storage device 3 as shown in FIG.
The image is formed under the control of the system controller 4210 shown in B).

In Figures 1θ (A) and (B), counter 0 (408
0-0) is selected by the selector 4070,
Memory address line 9110 connects memory 406OR14
060G and 4060B are accessed for reading. With this access, each memory 406OR14060G
, 4060B is read out, and read image signals 9160R19160G, 9 from each memory are read out.
160B is lookup table (LUT) 411OR
14110G and 4110B, where logarithmic transformation is performed to match the relative luminous efficiency characteristics of the human eye. Conversion data 9200R19200G from each LUT,
9200B is masking/black extraction/UCR circuit 412
It is input to 0. And this masking/black extraction/U
The CR circuit 4120 performs color correction of the color image signal of the image storage device 3, and also performs UCR/black extraction during black recording.

The image signal 9210 from these continuously connected massing/black extraction/UCR circuits 4120 is
Each image is separated by the selector 4130, and each FI
It is input to FO memories 4140-0 to 4140-3. Each image that was arranged sequentially until now is stored in this FIFO41.
Parallel processing is possible due to the action of 40-0 to 40-3.

Read image signal 9160R1916 from each memory
0G, 9160B, and parallel output image information 9260-0 to 9260-3 from each FIFO can all be processed in parallel.

The parallel image signals 9260-0 to 3 are input to primary enlargement/interpolation circuits 4150-0 to 4150-3. expansion·
Interpolation circuits 4150-0 to 3 are system controller 42
10, each image is controlled to have the layout shown in FIG. 17, and enlarged and interpolated as shown in signals 9310-0 to 9310-3 shown in FIG. 18. Note that in this embodiment, a linear interpolation method is used.

These interpolated signals 9300-0 to 9300-3 are transmitted to the selector 41
Each image data inputted to 90 and processed in parallel thus far is again converted into a serial image data signal. Selector 4
Image signal 9330 converted into serial image data by step 190 is subjected to edge enhancement and smoothing processing by edge filter circuit 4180.

The signal then passes through LUT 4200 and is input to selector 4250 via signal line 9380.

The signal input to the selector 4250 is a tri-state gate 4256R14256G.

4256B and 4255R14255G, through 4255B, signal lines 9430R19430G, 9430B
is output to connector 4550 via.

Similarly, ENOUT, 9454, and CLK9453, which are output from the system controller 4210, are also tri-state games) 4256E, 4256V, and 4255E,
4255V and is output to connector 455o via signal line 9450.

At this time, the control line 5ELECT-A (9451A) that controls the tristate gate shown at $111iU
, 5ELECT-B (9451B), 5ELECT-
C (9451C) is set to “O”, “0”, and “l”.

After the formation of all the image data for "Image 0" to "Image 3" is completed, the next steps are "Image 4" to "Image 7", "Image 8" to "Image 11", and "Image 12J to "Image 3". Images are sequentially formed in the order of "image 15", and 16 images "image 0" to "image 15" shown in FIG. 17 are formed.

Image Formation by Layout at Any Position> The above explanation describes the control for developing and forming an image so that it can be automatically formed as shown in FIG. The present invention is not limited to this, and an arbitrary image can be developed at an arbitrary position to form an image.

Below, as an example of this case, "Image 0" shown in FIG.
A case will be described in which "Image 3" is developed as shown in the figure and formed into an image.

First, using the same control as the image input control to the memory described above, four pieces of image information read from the color reader l are
406OR which is image memory.

4060G and 4060B to be stored as shown in FIG. 19. Next, by pressing the entry key 429 of the digitizer 16, the system waits for input from the digitizer 16 of the specified position of the read image at which the image should be formed.

Then, operate the point pen 421 to detect the coordinates on the coordinate detection plate 42.
Specify and input the desired deployment position from 0.

Next, the image forming process in this case is shown in Figs. 1θ (A) and (B).
) and timing charts shown in FIGS. 21 and 22.

! @Figure 21 is t! This is a timing chart during image formation on the "f+" line shown in Figure J20, and is a timing chart for the 22nd
The figure is a timing chart during image formation in the "text 2" line shown in FIG. 20.

The ITOP signal 551 is output from the printer 2 in the same manner as described above, and the system controller 4210 starts operating in synchronization with this signal.

In the image layout shown in FIG. 20, "Image 3" is the image from the color reader 1 rotated by 90 degrees. The rotation process for this image is performed in the following steps.

First, the memory 406 is controlled by the DMAC (direct memory access controller) 4380 in FIG.
Work memory 439 from OR14060G, 4060B
Transferring the image to 0 Next, after the CPU 4360 performs known image rotation processing in the work memory 4390, the DMAC 4380 transfers the image to the work memory 4390.
The image will be transferred from there to the memories 406OR14060G and 4060B, and image rotation processing will be performed.

The position information of each image laid out and inputted by the digitizer 16 is stored in the video processing unit 1 in FIG.
2 to the image storage device 3. The system controller 42 receives the development position information for each image.
10 is an enlargement/interpolation circuit 4150-0 corresponding to each image.
-3 operation permission signals 9320-0 to 9320-3 are generated.

In the layout at any position in this example,
For example, counter 0 (4080-0) is in image 1, counter 2 (4080-2) is in image 2, counter 3 is in image 1, counter 2 (4080-2) is in image 2, counter 3 is in
(4080-3) operate corresponding to image 3, respectively.

Control during image formation on the "intersection 1" line shown in FIG. 20 will be explained with reference to FIG. 21.

Image) -TI-IJ 406 OR14060G, 4
Reading “Image 0” from 060B is performed by counter 0 (4
080-0) to read from address "0" to address "0.5M" (storage area for "image 0" shown in FIG. 19). This is done by selector 4070.

Similarly, when reading “Image 1”, counter 1 (4080
-1), the data from address 0.5M to address IM is read out.The timing of this readout is shown in FIG.
16OR, 9160G.

Shown as 9160B.

Here, counter 4080-2 and counter 4080-
3 is not operated by the counter enable signal 9130-2.9130-3 from the system controller 421O.

The data of "Image 0" and "Image l" is LUT411O
It is sent to the masking/black extraction/UCR circuit 4120 via R14110G and R14110B, where it becomes a frame-sequential color signal 9210. This frame sequential signal 921O is parallelized by the selector 4130, divided for each pixel, and sent to the FIFO memory 4140-0.4140-1. Then, the expansion from the system controller 4210
When the operation permission signal 9320-0.9320-1 to the interpolation circuit 4150-0.4150-1 is enabled, the expansion/interpolation circuit 4150-0.4150-1 enables the FIFO read signals 9280-〇 and 9280-1. and starts read control.

The FIFO memory 4140-0.4140-1 starts transferring image data to the enlarged Φ interpolation circuit 4150-0.4150-1 in response to this signal 9280-0.9280-1. And this enlarged fist interpolation circuit 4150-0.4
150-1 performs layout and interpolation calculations according to the area previously designated by the digitizer 16. This timing is 9300-0.9300-1 in Figure 21.
Shown below.

“Image 0” and “Image 1” data that have been subjected to layout and interpolation calculations are selected by a selector 4190 and then passed through an edge filter circuit 4180 and sent to a LUT 4200.
is input.

The subsequent processing up to the connector 4550 is the same as described above, so the explanation will be omitted.

Next, with reference to FIG. 22, the timing of the "intersection 2" line shown in FIG. 20 will be explained.

The processing from the image memories 406OR14060G and 4060B to the enlargement/interpolation circuits 4150-1 and 4150-2 is the same as described above.

However, in the "intersection 2" line, "image l" and "image 2" are output, so the counter l (4080
-1) and counter 2 (4080-2), FIF04
140-1.4140-2, expansion/interpolation circuit 4150-
1.4150-2 works. These controls are performed according to control signals from the system controller 421O.

As shown in FIG.
” and “Image 2” overlap. In this overlapping portion, it can be selected by a control signal 9340 from the system controller 4210 whether to form one image, both images, or both images.

The specific control is the same as in the above case.

The signal from connector 4550 is connected to color reader l by a cable. Therefore, the video interface 101 of the color reader 1 selectively outputs the image signal 105 from the image storage device 3 to the printer interface 56 through the signal line path shown in FIG.

FIG. 23 shows the image storage device 3 in the above-mentioned image formation.
3 is a timing chart showing details of the process of transferring image information to the color printer 2. FIG.

As described above, by pressing the start button on the operation unit 20, the printer 2 starts operating and starts conveying the recording magazine. Then, when the recording paper reaches the leading edge of the image forming section, an ITOP signal 551 is output. This ITOP signal 55
1 is sent to the image storage device 3 via the color reader 1. The image storage device 3 reads the image data stored in each image memory 406OR14060G, 4060B under set conditions, performs the processing such as layout, enlargement, interpolation, etc. described above, and then stores the processed image data. is sent to the video processing unit 12 of the color reader l. The video interface 101 of the video processing unit 12 processes the types of data (R, G, B)/(M,
C, Y, BK) according to the video interface 101
Select the processing method.

In this embodiment, since M, C, Y, and BK are output sequentially, the above operation is repeated four times in the order of M, C, Y, and BK to form an image.

Explanation of the printer section> As described above, the configuration of the color printer 2 that prints out the image signal processed by the video processing unit 12 is explained in the first section.
This will be explained using figures.

In the configuration of the printer 2 shown in FIG.
Reference numeral 1 denotes a laser output unit that converts an image signal from the color reader 1 into an optical signal, a polygon mirror 712 having a polygonal shape (for example, an octahedron), a motor (not shown) that rotates this polygon mirror 712, and an f/θ lens (coupling). image lens) 713
etc.

In addition, 714 is a scanner 711 indicated by a dashed line in the figure.
It is a reflective mirror that changes the optical path of the laser beam from the
715 is a photosensitive drum.

The laser beam emitted from the laser output section is reflected by a polygon mirror 712, and linearly scans (raster scan) the surface of the photosensitive drum 715 by an f/θ lens 713 and a reflecting mirror 714, thereby creating a latent image corresponding to the original image. form.

In addition, 717 is a primary charger, 718 is a full exposure lamp,
723 is a cleaner section that collects residual toner that has not been transferred; 724 is a pre-transfer charger; these members are arranged around the photosensitive drum 715. 726 is a developing unit that develops the electrostatic latent image formed on the surface of the photosensitive drum 715 by laser exposure;
(for yellow), 713M (for magenta), 713C (for cyan), and 713BK (for black) are photosensitive drums 71
Phenomenon sleeve that directly develops in contact with 5, 730Y, 7
30M and 730C2730BK are toner hoppers for holding toner, and 732 is a screw for phasing the developer material. These sleeves 730Y~731BK
, toner hoppers 730Y to 730BK, and the screw 732 constitute a developer unit 726, and these members are arranged around the rotation axis P of the developer unit 726.

For example, when forming a yellow toner image, the yellow toner is developed at the position shown in FIG. Further, when forming a magenta toner image, the developing unit 72
6 is rotated around the axis P in the figure, and the developing sleeve 731M in the magenta developing device is disposed at a position in contact with the photoreceptor 715. Cyan and black development is similarly performed by rotating the developing unit 726 around the axis P in the figure.

Further, 716 is a transfer drum that transfers the toner image formed on the photosensitive drum 715 onto paper, and 719 is a transfer drum 716 that moves to the home position by being close to an actuator plate 719 for detecting the movement position of the transfer drum 716. 725 is a transfer drum cleaner, 727 is a paper press roller, 728 is a static eliminator, and 729 is a transfer charger. These members 719, 720, 725, 727, and 729 are It is arranged around the transfer roller 716.

On the other hand, 735.736 is a paper feed cassette that collects paper (paper sheets), 737.738 is a paper feed roller that feeds paper from the cassette 735.736, and 739.740.741
is a timing roller that takes timing of paper feeding and conveyance. The paper fed and conveyed via these is guided by a paper guide 749 and wound around the transfer drum 716 while its leading edge is held by a gripper to be described later, and then moves to the image forming process.

Further, 550 is a drum rotation motor, and the photosensitive drum 7
15 and the transfer drum 716 are rotated synchronously. 750 is a peeling claw that removes the paper from the transfer drum 716 after the image forming process is completed, 742 is a conveyor belt that conveys the removed paper, and 743 is an image fixing unit that fixes the paper that has been conveyed by the conveyor belt 742. In the image fixing section 743, the motor 74 attached to the motor attachment section 748
7 is transmitted to a pair of heat pressure rollers 744 and 745 via a transmission gear 746, and this heat pressure roller 7
The image on the paper conveyed between 44 and 745 is fixed.

The printout process of the printer 2 having the above configuration will be explained below with reference to the timing chart of FIG. 23.

First, when the first ITOP 551 arrives, a Y latent image is formed on the photosensitive drum 715 by laser light, and this is developed by the developing unit 731Y. Next, the image is transferred onto a sheet of paper on a transfer drum, and magenta printing processing is performed. The developing unit 726 then rotates around the axis P in the figure.

Next, when the ITOP 551 arrives, an M latent image is formed on the photosensitive drum by laser light, and cyan print processing is performed in the same manner. ITO that follows this action
Corresponding to P551, C and BK are similarly processed, and yellow print processing and black print processing are performed. When the image forming process is completed in this way, the paper is then peeled off by the peeling claw 750, and the image fixing unit 74
Explanation of monitor TV interface> The system of this embodiment is
As shown in Figure 1.

The contents of the image memory in the image storage device are displayed on the monitor TV 3.
It is possible to output to 2. It is also possible to output video images from the SV recorder/player 31.

This will be explained in detail below.

The video image data stored in the image memories 4060R14060G and 4060B is read out by the DMAC 4380 and is stored in the display memory 4410R1441.
The video image data stored in 0G, 4410B is
D/through UT4420R14420G, 4420B
It is sent to the A converter 443OR14430G, 4430B, where the analog R signal 45 is sent in synchronization with the 5YNC signal 4590S from the display controller 4440.
90R, G signal 4590G and B signal 4590B are converted and output.

On the other hand, the display controller 4440 outputs 5YNC in synchronization with the output timing of these analog signals.
A signal 9600 is output. This analog R signal 459
OR, G signal 4590G, B signal 4590B, 5YNC
By connecting the signal 459OS to the monitor 4, the contents stored in the image storage device 3 can be displayed.

Furthermore, in this embodiment, the displayed image can be trimmed by sending a control command from the host computer 33 to the image storage device 3.

Based on the area information input by the host computer 33, the CPU 4360 controls the display control memories 4410R14410G and 441 using the same control as described above.
Trimming is possible by transferring only the effective area to 0B.

In addition, in response to the area instruction information of the host computer 33, the computer (rate 4232.42) shown in FIG.
33 and RAM 4212 in the same manner as described above, and then use the color reader l or Sv recording/player 3 again.
By inputting the image data from 1, the trimmed image data is stored in the memory 4060R14060G, 40
60B.

Note that 4400 is a volume for adjusting the tone of the color image displayed on the monitor television 32.

The CPU 4360 calculates the resistance value (
setting value), and from this setting value LUT4420R1
Set the output adjustment correction data in the tables 4420G and 4420B. Further, in order to match the display color of the monitor 4 with the recorded color, the adjustment correction data in the table of the LUT 4200 is changed in conjunction with the setting value of the volume 4400.

In addition, image memory 406OR24060G, 4060B
If multiple images are stored in the color printer 2
The layout of each image when recording with Monitor TV 3
2 and the host computer 33.

That is, by first displaying the size of the recording paper on the monitor television 32, and inputting the layout position information of each image using the host computer 33 while viewing this display, it is possible to layout each image to be recorded on the color printer 2. It is.

At this time, image memory 4060R14060G, 4060
The reading control of stored information from B to the color printer 2 and the recording control in the color printer 2 are the same as those in the above-mentioned embodiment, so the explanation will be omitted.

Description of Computer Interface> In the system of this embodiment, a host computer 33 is connected to the image storage device 3, as shown in FIG. Next, the interface between the device of this embodiment and the host computer 33 will be explained using FIG.

The interface with the host computer 33 is performed by a GPZB controller 4310 connected by a connector 4580. GPZB controller is CP
It is connected to the CPU 4360 via the U8 bus 610, and can exchange commands and transfer image data with the host computer 33 according to a predetermined protocol.

Although detailed embodiments have been described above, the present invention is of course applicable not only to the above-mentioned color image forming system but also to monochrome printers and the like.

[Effects of the Invention] As described above, according to the present invention, the attributes of the image information are read together with the image information stored in the storage medium, and when the attribute of the image information is field recording, the image An interpolation operation is performed from the information to generate one field and it is stored as frame information.If the attribute of the image information is frame recording, it is stored sequentially as it is, so when forming a visible image such as a hard copy. Another advantage is that it is possible to obtain high-quality output images based on frame information for both field recording and frame recording image information.

[Brief explanation of drawings]

FIG. 1 is a system configuration diagram of an embodiment according to the present invention. FIG. 2 is a block diagram showing details of the color league in the same embodiment. 3 to 6 are schematic diagrams showing examples of switching control of the video interface section of the color league in the same embodiment. FIG. 7 is an external view showing the digitizer in the same embodiment. FIG. 8 is an explanatory diagram illustrating address information instructed by the digitizer in the same embodiment. FIG. 9 is a timing chart showing the output timing from the interface section to the image storage device in the same embodiment. FIGS. 10(A) and 1(B) are block diagrams showing details of the image storage device of the same embodiment. FIG. 11 is a circuit diagram showing details of the selector section of the image storage device in the same embodiment. FIG. 12 is a circuit diagram showing details of the system controller unit and FIFO memory of the image storage device in the same embodiment. FIG. 13 is a timing chart showing the operation of the system controller section during digital storage in the FIFO memory during the same-magnification processing in the same embodiment. FIG. 14 is a timing chart showing the operation of the system controller section during digital storage in the FIFO memory during the same-size processing in the same embodiment. FIG. 15 is a detailed circuit diagram showing the related structure between the system controller section and the image memory of the image storage device in the same embodiment. FIG. 16(A) shows the image storage device and S
12 is a flowchart showing the exchange of Sv track information through communication with a V recording/playback device. FIG. 16(B) is a schematic diagram showing track information in Sv. FIG. 16(C) is a schematic diagram showing the arrangement of image information in the image memory of the image storage device in the same embodiment. FIG. 17 is a schematic diagram showing the layout of image formation in the same embodiment. FIG. 18 is a timing chart showing the operation of image forming processing according to the image forming layout shown in FIG. 17. FIG. 19 is a schematic diagram showing the arrangement of image information in the memory in another image storage device of the same embodiment. FIG. 20 is a schematic diagram showing a state in which the image information shown in FIG. 19 is arbitrarily laid out. FIG. 21 is a timing chart showing the timing of image formation in the "text" line shown in FIG. 20. FIG. 22 is a timing chart showing the timing of image formation on the "!;L2" line shown in FIG. 21. FIG. FIG. 23 is a timing chart showing the timing of the image forming process in the same embodiment. FIG. 24 is a flowchart showing the operation when information from the Sv recording/reproducing device is stored in the memory in the same embodiment. l...Color league, 2...Color printer, 3...Image storage device, 11...Document scanning unit/to, 12...Video processing unit, 13...Control unit, 16... - Digitizer, 20... Operation unit, 31... SV recorder/player, 32... Monitor TV, 33... Host computer, 56... Printer interface, 420... Coordinate detection board, 421... ...Point pen, 4000...Decoder, 4010.4070.4130. 190. 4213.4250.4253...Selector, 402
0.4430...A/D converter, 4050, 4 l
40, 4252... FIFO memory, 4060... Image memory, 4080.4214.4230... Counter, 411
0.4200.4220...LUT, 4120...
Masking/black extraction/UCR circuit, 4150...enlargement/interpolation circuit, 421O...system controller, 4212...
RAM, 4270...League controller, 4360...CPU, 4380...DMAC. 4400...Volume, 4410...Display memory, 4440...Display controller.

Claims (1)

[Claims] Reproducing means for reading out a plurality of image information stored in a storage medium and attributes of the image information; a storage means capable of storing a plurality of pieces of information on the storage medium; If the attribute of the image information is field recording, interpolation is performed from the image information to generate one field and stored in the storage means as frame information.On the other hand, if the attribute of the image information is frame recording, , a storage control means for sequentially storing the image information in the storage means as is; and an image forming means for forming the image information stored in the storage means as a visible image.