JPH03203482A - Image processing system - Google Patents

Abstract

PURPOSE:To always obtain a proper image free from a shear by frame-recording image information obtained from a video equipment in a storage means when the image information is a static image or field-recording the single field information of the image information in the storage means in the case of a moving image. CONSTITUTION:A CPU 4360 finds out correlation between the even and odd fields of the image information stored in image memories 4060R, 4060G, 4060B. When the correlation exists, the image information is judged as a static image, and at the time of no correlation it is judged as a moving image. At the time of judging the static image, the image is directly formed, but in the case of the moving image, image formation is executed by using the image of the even field as it is and interpolating the odd field image from the even field image. Thereby, the output image of high quality can be obtained by frame recording in the case of a static image and a proper output image free from a shear can be obtained by field recording in the case of a moving image.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to an image processing system that forms an image from input information.

[Prior Art] Recently, various video devices such as still video cameras, handy video cameras, and VTRs have appeared that store image information in a storage medium such as a magnetic material and then reproduce it as an electrical signal.

Furthermore, video printers and the like have been provided as devices that form image information from these video devices as visible images.

[Problems to be Solved by the Invention] However, in conventional video printers, etc., images are formed solely using field information, so when processing frame information from video equipment,
There was a drawback that the quality of the output image deteriorated.

On the other hand, if frame information from a video device is directly recorded to form an image, there is no problem if the original information is a still image, but if it is a moving image, the information in each field may be misaligned. Therefore, there is a drawback that a misaligned image is formed.

The object of this invention is to provide an image processing system that can properly form an image regardless of whether the image information from a video device is a moving image or a still image.

[Means for Solving the Problems] The present invention provides a storage means for storing image information reproduced by a video device, a determining means for determining whether the image information is a moving image or a still image, and a determination result by the determining means. , if the image information is a still image, the frame is stored in the storage means,
On the other hand, if the image information is a moving image, a storage control means for field-recording the one-field information in the storage means;
It is characterized by comprising an image forming means for forming an image as a visible image from the image information stored in the storage means.

[Function] In the present invention, when the image information from the video equipment is a still image, this is recorded as a frame in the storage means, and on the other hand, when the image information is a moving image, one field information is stored. Since field recording is performed on the device, it is possible to obtain high-quality output images for still images using frame information, and for moving images, image formation is not performed using frame information, resulting in proper images without deviation. can be obtained.

Furthermore, when one image information is a moving image, a high-quality output image can be obtained by performing image formation using one field information as interpolation information.

[Example] Hereinafter, an example according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a system configuration diagram showing a schematic internal configuration of a color image forming system according to an embodiment of the present invention.

The system of this embodiment includes a digital color image reading device (hereinafter referred to as a color reader) 1 that reads a digital color image, and a digital color image printing device (hereinafter referred to as a color printer) that prints out the digital color image.
2, an image storage device 3, a video device 31, a monitor television 32, and a host computer 33.

The color reader 1 of this embodiment includes a color separation means, which will be described later,
This device uses a photoelectric conversion element such as a CCD to read color image information of a read document for each color and converts it into an electrical digital image signal.

The color printer 2 is an electrophotographic laser beam color printer that limits color images by color according to the digital image signal to be output, and transfers and stores the images multiple times in the form of digital dots onto storage paper. .

The image storage device 3 is a device that quantizes the digital image read from the color reader 1 or the analog video signal from the video device 31, converts it into a digital image, and then stores the digital image.

The video device 31 is a device that reproduces image information and outputs it as an analog video signal.

The monitor television 32 is a device that displays images stored in the image storage device 3 and the contents of analog video signals output from the video equipment 31.

The host computer 33 has a function of transmitting image information to the image storage device 3 and receiving and receiving image information from the color reader 1 and video equipment stored in the image storage device 3. It also controls the color reader l, color printer, etc.

The details of each part will be explained below.

Description of color reader l First, the configuration of the color reader 1 will be explained.

In the color reader 1 shown in Fig. 1, 999 is an original, 4 is a platen glass on which the original is placed, and 5 is a halogen exposure lamp 1O that collects the reflected light image from the original that has been exposed and scanned. , 6 is a rod array lens for inputting images. The rod array lens 5, the same-magnification full color sensor 6, the sensor output signal amplification circuit 7, and the halogen exposure lamp 10 together constitute an original scanning unit 11, which exposes and scans an original 999 in the direction of the arrow (AI). Image information to be read from the original document 999 is sequentially read line by line by exposing and scanning the original scanning unit 11. The read color separated image signal is amplified to a predetermined voltage by the sensor output signal amplification circuit 7, and then input to the video processing unit 12 via the signal line 501, where the signal is processed. Note that the signal line 501 has a coaxial cable configuration to ensure faithful signal transmission. A signal 502 is a signal line that supplies drive pulses for the same-magnification full-color sensor 6, and all necessary drive pulses are generated within the video processing unit 12. Reference numeral 8.9 denotes a white plate and a black plate for white level correction and black level correction of image signals, and by irradiating them with a halogen exposure lamp 10, signal levels of predetermined densities can be obtained, respectively.
Used for white level correction and black level correction of video signals.

13 is the color of this embodiment having a microcomputer.
This is a control unit that controls the entire reader 1, and performs display on the scanning panel 20, control of key manual power, control of the video processing unit 12, etc. via the bus 508, and also controls the signal line 509 via the position sensors S1 and S2. .510 to detect the position of the document scanning unit 11.

Further, the signal line 503 controls the stepping motor drive circuit 15 that pulse-drives the stepping motor 14 for driving the scanning body 11, and the exposure lamp driver 21 controls the ON/OFF of the halogen exposure lamp io via the signal line 504. control, light amount control, signal line 5
All controls of the color league section 1 are performed, including control of the digitizer 16, internal keys, and display section via the controller 05.

The color image signal read by the above-mentioned exposure scanning unit ll during exposure scanning of the original is sent to the sensor output amplification circuit 7.
, are input to the video processing unit 12 via a signal line 501.

Next, details of the above-mentioned document scanning unit 11 and video processing unit 12 will be explained using FIG.

The color image signal input to the video processing unit 12 is separated into three colors, G (green), B (blue), and R (G2D), by the sample and hold circuit S/H 43. Each separated color image signal is subjected to analog processing in an analog color signal processing circuit 44, and then to an A/
It is converted into a digital color image signal.

In this embodiment, the color reading sensor 6 in the document scanning unit 11 is arranged in a staggered manner divided into five regions. This color reading sensor 6 and FIFO memory 46
, the 2nd and 4th channels being pre-scanned and the remaining l
, 3.5 channels are corrected for reading position deviations.

The signal of the device misalignment correction flow composed of the FIFO memory 46 is input to the black correction/white correction circuit, and the signal corresponding to the reflected light from the white plate 8 and the black plate 9 is used to correct the color reading sensor 6, unevenness in the amount of light from the halogen exposure lamp 10, variations in sensor sensitivity, etc. are corrected.

Color image data proportional to the input light amount of the color reading sensor 6 is input to a video interface 101 and connected to the image storage device 3.

This video interface 101 has the functions shown in FIGS. 3 to 6. That is, (1) the signal 559 from the black correction/white correction circuit is sent to the image storage device 'I! 13 (Fig. 3), (2) function to input image information from the image storage device 3 to the logarithmic conversion circuit 86 (Fig. 4), (3) function to input image information from the printer interface 56 into image storage. It has four functions: (4) a function to output to the device 3 (FIG. 5), and (4) a function to send the signal 559 from the black correction/white correction circuit to the logarithmic conversion circuit 86 (FIG. 6). The selection of these four functions is switched by the CPU control line 508 as shown in FIGS. 3-6.

Description of the image storage unit 3> Next, the reading (capturing) control in the color reader I in this embodiment and the image storage unit M3 of the read image information will be explained.
The storage control will be explained.

Settings for reading by the color reader I are performed by the digitizer described below. FIG. 7 is a front view showing the appearance of the digitizer 16.

In FIG. 7, 427 is an entry key for transferring image data from the color reader 1 to the image storage device 3. The coordinate detection plate 420 is used to specify an arbitrary area on the document to be read, or to set the reading magnification and the like. The point pen 421 is for specifying the coordinates.

To transfer the image data of an arbitrary area on the document to the image storage device 3, after pressing the entry key 427, the point pen 421 is used to indicate the reading position.

This reading area information is sent to video processing unit 12 via communication line 505 in FIG. In the video processing unit 12, this signal is sent to the CPU control line 508.
From the video interface 101, the image storage unit m3
send to

Further, if the reading position is not specified with the point pen 421 after pressing the entry key 427, the color reader l detects the size of the original 999 by bliscan, and uses this information as image reading area information. It is sent to the image storage device 3 via the video interface 101.

Next, a process of sending information on a designated area of the original document 999 to the image storage device 3 will be explained.

FIG. 8 shows an example of the address of the information (points A and B) of the area indicated by the point pen 421 of the digitizer 16.

In addition to this area information, the video interface 101 also receives the VCLK signal, ITOP551. Area signal generation circuit 5
The signals EN, signal lO4, etc. from 1 (note that the book indicates a negative logic signal) are stored in the image storage unit M3 along with the image data.
Output to.

FIG. 9 is a timing chart showing these output signal lines.

As shown in FIG. 9, by pressing the start button of the operation fi20, the stepping motor 14 is driven.
When the original scanning unit 11 starts scanning and reaches the leading edge of the original, the ITOP signal 551 becomes "work", the original scanning unit 11 reaches the area specified by the digital tie f16, and while scanning this area EN, the signal 104 becomes ' Therefore, the read color image information (DATA 05, 106, 107) while the EN signal 104 is "1" may be taken in.

As shown in FIG. 9 above, image data transfer from the color reader 1 is performed by controlling the video interface 101 as shown in FIG.
R data 105, G data 106, and B data 107 are sent to the image storage device 3 in real time in synchronization with the control signal 104 and the VCLK signal.

Next, FIG. 10(A) shows how the image storage device specifically stores data using these image data and control signals.
This will be explained with reference to (B).

The connector 4550 is connected to the video interface 101 of the color reader L via a cable, and the R data 1
05, G data 106, and B data 107 are connected to the selector 4250 via signal lines 9430R19430G and 9430B, respectively. VCLK, EN, signals 104 sent from the video interface 101
, ITOP 551 are directly input to the system controller 4210 through a signal line 9450.

Further, prior to reading the document, the area information specified by the digitizer 16 is input to the reader controller 4270 through the communication line 9460, and is read from there to the CPU 4360 via the CPU bus 9610.

After being selected by the selector 4250, the R data 105, G data 106, and B data 107 input to the selector 4250 via the signal lines 9430R, 9430G, and 9430B are input to the signal lines 9420R, 29420G, and 9420R, respectively.
Output to 9420B, FIFO memory 405OR14
It is input to 050G and 4050B.

FIG. 11 is a circuit diagram showing the detailed configuration of this selector 4250.

As shown in the figure, when storing image information from the color reader 1 to the image storage device 3, the control signal 5ELECT-A (9451A) from the system controller 4210 is set to "1".
, 5ELECT-B (945IC) as “1”, 5EL
Set ECT-C (945Ic) to 0'', make use of only tri-state buffers 4251E, V, R, G, B, and use other tri-state buffers 4255E, V, R,
G, B, 4256E, V, R, G, and B are high impedance.

Similarly, control signals 9450 (7), VCLK, EN
, signals are also selected by the 5ELECT signals (9451A, B, C). Now, when image information from the color reader 1 is stored in the image storage bag M3, as shown in FIG.
Only the CLKIN, ENIN, and signal lines 9 are alive.
456.9457 to 3a'1. System controller 4
210.

Also, control signals VSYNCIN, (9455), HSY
NCIN, (9452) is input directly to system controller 4210 from connector 4550. moreover,
The selector 4250 also has a function of averaging image information from the color reader l. Signals 9430R19430G, 9430B input from color reader l pass through signal lines 9421R19421G, 9421B, and
It is input to IFO memories 4252R14252G and 4252B.

The output from the FIFO memory 4252R14252G, 4252B is image information 9421R19421G, 942
1B, it is a signal with l main scanning delay, and the signal line 9
422R19422G, 9422B, adder 42
53R14253G, 4253B. Further, the adders 4253R24253G and 4253B receive the signal 94 from the selectors 4251R14251G and 4251B.
21R19421G and 9421B are input. The adders 4253R14253G, 4253B take the average of 2 pixels in the main scanning direction, 2 pixels in the so-called scanning direction, that is, 4 pixels, and add the average of 4 pixels to the signal lines 9423R19423G, 9423B.
Output to.

Selectors 4254R24254G, 4254B select image signals 9421R19421G, 9 from color reader l.
421B or averaged 9423R19423G
, 9423B, and the signal 942OR19420
G, 9420B, FIFO memory 405OR, 40
Input to 50G and 4050B.

System controller 421 (Hi, selector 4254
Image data 9420 from R14254G, 4254B
Of R29420G and 9420B, only the effective image area is stored in FIFO memory 4050R14050G and 4050
Transfer to B. Also at this time, the system controller 42
10 also performs trimming processing and scaling processing at the same time.

Furthermore, FIFO memory 4050R14050G, 40
50B absorbs the difference in clock between the color reader I and the image storage device 3.

Hereinafter, these processes of this embodiment will be specifically explained with reference to the circuit diagram of FIG. 12 and the timing chart of FIG. 13.

That is, from the selectors 4253R14253G, 4253B to the FIFO memories 4050R14050G, 4050B
Prior to data transfer to the CPU bus 9610, the effective area in the main scanning direction of the area specified by the digitizer 16 is written to the comparators 4232 and 4233.

The comparator 4232 is set with a start address in the main scanning direction of the area designated by the digitizer 16, and the comparator 4233 is set with a stop address.

Furthermore, the sub-scanning direction of the area specified by the digitizer 16 is controlled by the selector 4213 to select the CPU bus 9610 side and make it valid, and "0" data is written in the valid area of the area specified by the RAM 4212. Invalid area is “
Write “l”.

For scaling processing in the main scanning direction, a scaling factor is set in the rate multiplier 4234 via the CPU bus 961O. In addition, the magnification processing in the sub-scanning direction is performed in RAM4.
This is possible depending on the data written to 212.

FIG. 13 is a timing chart when trimming processing is performed. As mentioned above, when storing only the area specified by the digitizer 16 in the memory (trimming processing), the trimming position in the main scanning direction is set in the comparators 4232 and 4233, and the trimming position in the sub-scanning direction is set in the selector 4213. is placed on the CPU bus 9610 side, and written to the RAM 4212 by the CPU.

Below, as a specific example, the trimming position is 1 in the main scanning direction.
A case where the number is 000 to 3047 and 100 to 5095 in the sub-scanning direction will be described.

The trimming section signal 9100 in the main scanning direction is as follows.

The counter 4230 operates in synchronization with HSYNCIN, 9452 and CLKIN 9456, and this counter output 91
When 03 becomes 10.00, comparator 4232
The output of the flip-flop 4235 becomes "1", the output Q of the flip-flop 4235 becomes "1", and then the counter output 9103 becomes "3".
047, the output of comparator 4233 becomes l.
'', the output of the flip-flop 4235 changes from ``1'' to ``0''. Also, in the timing chart of FIG. FIFO memory 405OR14050 according to trimming interval signal 9100
G, 1000 of color image information input to 4050B
#rflll! Addresses l to 3047 are written to the FIFO memories 405OR14050G and 4050B.

Also, HSYNCIN, 9 from comparator 4231
452, a signal 9102 delayed by a sentence pixel is output. In this way, FIFO memory 4050R24050G
, 4050B RS TV.

By giving a phase difference to the input and R3TR/input, FIFO memory 405OR14050G, 4050
CLKIN9456 and CLK945 input to B
Absorbs the difference in the period of 3.

Next, for trimming in the sub-scanning direction, first selector 421
Select the counter 4214 side that controlled 3 and make it valid,
VSYNCIN, 9455, HSYNCIN, 9452
The 0 interval value number 91O4, which outputs the interval signal 9104 synchronized with the RAM 4212, is synchronized with the signal 9102 by the flip-flop 4211, and
The image information stored in 14050G and 4050B is output only in the section where the trimming signal 9101 is "O" (n
l~m°).

In the above description, only the trimming process has been described, but the scaling process can be performed simultaneously with the trimming. For scaling in the main scanning direction, a scaling factor is set in the rate multiplier 4234 via the CPU bus 9610. Further, in the sub-scanning, magnification processing can be performed by data written to the RAM 4212.

FIG. 14 is a timing chart showing the operation when trimming processing and 50% scaling processing are performed. This figure 14 shows that the image data from the selectors 4254R5G and B are scaled and reduced by 50%, and then stored in the FIFO memory 405.
An example of data transfer to 0゛R14050G and 4050B is shown.

A setting value of 50% reduction is set in the rate multiplier 4234 in FIG. 12 via the CPU bus 9610. At this time, the output signal 910 of the rate multiplier 4234
6 is "O" for each pixel in the main scanning direction as shown in FIG.
” and “1” are repeated. This signal 910
The reduction is performed by controlling the write enable to the FIFO memories 4050R, 4050G, and 4050B using the AND signal 9100 of 6 and the interval signal 91O5 generated by the comparators 4232 and 4233. As shown in FIG.
By setting the input enable signal to 0B to "l" (reading prohibited) within the image data valid area, 50
Only the image data reduced by % is stored in the image memory 406OR1.
Sent to 4060G and 4060B. In the case of FIG. 14, the read enable signal 9101 is "1", '
A 50% reduction is achieved by repeating 0'' data alternately.

In other words, the trimming and scaling processing in the main scanning direction is performed using F.
The write enable of the IFO memories 405OR14050G and 4050B is controlled, and the trimming and scaling processing in the sub-scanning direction is performed by the FIFO memories 405OR14050G and 4050B.
Controls read enable of 4050B.

Next, FIFO memory 4050R54050G, 4050
Transfer of image data from B to memories 4060R14060G and 4060B is performed by counter O (4080-0) and control line 9101.

Control line 9101 is FIFO memory 4050R14
050G, 4050B glue enable signal,
It is also an enable signal for the counter 4080-0 and a write enable signal for the memories 406OR14060G and 4060B.

When the control line 9101 is “0”, the FIFO memory 4
The image data read from 050R, 4050G, and 4050B is sent to the tristate buffer 909OR190.
90G, 9090B, memory 4060R1406
Input to 0G, 4060B. At this time, counter 4
The enable signal of 080-0 is also “0”, and C
Signal 912 counted up in synchronization with LK9453
0-Q is output from the counter 4080-0, passes through the selector 4070, and is sent to the memories 4060R, 4060G, 40
It is input to the ADH9110 of 60B.

Also at this time, memories 406OR24060G, 406
Since the write enable signal WE of 0B is also "O", the image data 9090R19090G, 9 input to the memories 4060R14060G, 4060B
090B is stored.

Note that since the memory capacity in this embodiment is 1M bytes for each color, the 8th V! By reducing the image data in the reading area in J by 50%, the read image data is converted to data in the maximum capacity of the memory of the image storage device 3 and is stored.

Further, in the above embodiment, the CPU 4360 calculates the right movement area from the information of the area specified by the digitizer 16 of the A3 original, and sets the corresponding data in the comparators 4231 to 4233, the rate multiplier 4234, and the RAM 4212.

In this embodiment, since the data capacity of the read image was larger than the image memory capacity, a reduction process was performed to convert the data to a storable capacity, and then the data was stored in the image memory. However, if the data capacity of the read image is smaller than the image memory capacity of 5, the CLR signal 917 in FIG.
”, it is possible to store multiple screens simultaneously in the image memory. In this case, digitizer 1
Trimming information data is set in the comparators 4232 and 4233 that control the writing of the area designated by 6 into the memory, and the same rate is set in the rate multiplier 4234. Furthermore, the write data to the RAM 4212 is set to 0'' for all image valid areas and 1'' for all other areas, and set to the same size.

Furthermore, in order to store the read image in the memory while maintaining its aspect ratio (vertical/horizontal ratio), the CPU 4360 first calculates the number of effective pixels "X" from the area information sent from the digitizer 16. Next, the maximum capacity of image storage memory “
y'', calculate 2 using the following formula.

y / x X L 00 = z As a result, (1) When z≧100, the rate multiplier 42
The setting of 34 is 100%, and the entire effective image area is O”
and store it in the RAM 4212 at the same size.

(2) When z>100, rate multiplier 42
34(7) Both the settings and the RAM 4212 are reduced by 2%, and the image is stored in the maximum capacity of the memory while maintaining the aspect ratio.

Even in this case, the data to be written into the RAM 4212 may be appropriately written as data of "1" and "O" corresponding to the reduction ratio of "2".

By controlling in this manner, arbitrary scaling processing can be performed with easy control while maintaining the aspect ratio of the input image by controlling only within the image storage device 3, and effective recognition of the read image is possible. Become. Moreover, it is also possible to maximize the utilization efficiency of memory capacity at the same time.

Description of video equipment interface> The system of this embodiment can also store video images from the video equipment 31 in the image storage device 3 and output them to the monitor television 32 or color printer 2, as shown in the construction drawing. be. The image processing device 3 also handles input images.

Next, a process for importing a video image from the video device 31 into the image storage device 3 will be described.

First, a video image from the video device 31 is transferred to the image recording device 2.
Regarding the control imported to i3, Fig. 10 (A) and (B)
This will be explained with reference to a block diagram of the image storage device N3.

The video image from the video equipment 31 is transmitted via an analog interface 4500 to an NTSC composite signal 9.
000 format, and the decoder 4000 outputs 4 separate R, G, B signals and a composite 5YNC signal.
The signal is separated into 901SR, G, B, and S signals.

The decoder 4000 also receives a Y (luminance)/C (chroma) signal 9010 from an analog interface 4510.
are also decoded in the same way as above. Selector 401
902OR to 0, 9020G, 9020B, 9020
Each of the 5 signals is an input signal in the form of separate R, G, B signals and a combined 5YNC signal. Note that the switch 4530 connects the signals 9020RNS and 9015R-5.
This is a switch that controls a selector 4010 for selecting and switching between inputs. switch 4530
When is in an open state, signals 9020R-S are selected, and when is in a closed state, signal 9015R-5 is selected.

Separate R and G selected by selector 4010
, 905OR19050G, 9050B as B signal
Each signal is converted to A/D converter 4020R14020G.
, 4020B performs analog/digital conversion.

In addition, the selected combo, 1-sYNc signal 905
The OS is input to the TBC/HV separation circuit 4030, and the TBC/HV separation circuit 4030 converts the composite 5
A clock signal 9060C, a horizontal synchronizing signal 9060H and a vertical synchronizing signal 9060V are generated from the YNC signal 9050. These synchronization signals are provided to system controller 4210.

The TVCLK9060c signal output from the TBC/HV separation circuit 4030 of this embodiment is a 12.25 MH2 clock signal, and the TV) ISYNC, 9060B signal is a signal with a pulse width of 63.5 to S. TVVSYNC, 9060V
The symbol @ is a signal with a pulse width of 18.7m S.

FIFO memory 405OR14050G, 4050B!
*, TV HS YNC-9060H signal d:
is reset and TVCLK9060 starts from address “0”.
In synchronization with the C signal, data 9420R19420G, 9
This FIFO memory 4050R1 writes 420B
Writing of 4050G and 4050B is performed when the WE signal 9100 output from the system controller 4210 is activated.

Next, this WE, FIFO memory 4050R by signal
, 4050G, and 4050B will be explained in detail.

The video equipment 31 in this embodiment conforms to the NTSC standard. Therefore, when a video image from the video device 31 is digitized, the screen capacity is 640 pixels (H) x 480 pixels (V). Therefore, first, the CPU of the image storage device 3
4360 writes the setting value to the comparators 4232 and 4233 so that there are 640 pixels in the main scanning direction. Next, set the input of the selector 4213 to the CPU bus 9610 side, and
"O" for 480 pixels in the sub-scanning direction is written in the AM 4212, and 100% data is set in the rate multiplier 4234 that sets the magnification in the main scanning direction.

Image information of video equipment 31 is stored in memory 40BOR1406
When storing in 0G and 4060B, the system controller 4210 is output from the TBC/HV separation circuit 4030. TVVSYNC, 9060V, TVH5YNC
, 9060H.

TVCLK9060C is vsyNCI shown in FIG.
N, 9455, HSYNCIN, 9452,
Connected to CLKZN9456.

As described above, by sending the image control signal to the video equipment interface side, the A/D converter 4020
94 which is the output signal from R14020G, 4020B
Data for one main scan of video images of 20R19420G and 9420B are stored in FIFO memories 4050R and 40'5.
It is stored in 0G and 4050B at the same size.

On the other hand, the input video image is reduced and stored in the FIFO memory 40.
When storing in 50R54050G and 4050B, reduction is possible by setting a reduction rate in the rate multiplier 4234 and setting the data in RAM 4212 in the image effective area to "l" according to the reduction rate. .

Data transfer from FIF0405OR14050G, 4050B to memory 4060R54060G, 4060B is performed from color reader l mentioned above to memory 406OR14.
This is similar to data write control to 060G and 4060B.

FIG. 16(A) shows one piece of image information from the video equipment 31.
FIG. 3 is a schematic diagram showing a state in which six screens are stored in an image memory.

Image memories 406OR24060G and 4060B include
It is written in - style, regardless of whether it is a moving image or a still image.

FIG. 16(B) is a schematic diagram showing a state in which moving images and still images are stored in the memory.

That is, in FIG. 16(B), the "." mark indicates an even number field, and the "x" mark indicates an odd number field.

In the still image shown on the left side of FIG. 16(B), one image is formed by an even number field and a Tr number field, whereas in the moving image on the right side, an image that is shifted between an even number field and an odd number field is formed. It is formed.

Therefore, image memory 4060R14060G, 406
When a moving image is stored in 0B, if an image is formed using a color printer as it is, the shifted image will be hard-copied as is, as shown in Figure 1.

Therefore, the CPU 4360 uses the image memory 4060R14
The even and odd fields of the image information stored in 060G and 4060B are correlated, and if there is a correlation, it is determined to be a still image, and if there is no correlation, it is determined to be a moving image.

If it is determined to be a still image, the image is formed as is, but if it is determined to be a moving image, the even field image is left as is, and the odd field image is interpolated from the image information of the even field. Form. That is, the CPU 4360 uses the image memory 4060R140
Even field image information from 60G and 4060B is converted to C.
It is read out via the PU bus 9010, interpolation is performed from the information, and the obtained information is overwritten via the CPU bus 9010 into the odd fields of the image memories 406OR14060G and 4060B. By performing these operations one after another, the image information for the odd fields is regenerated, and the image obtained by interpolating the image information for the original even fields is created.
In other words, the image memory 40BOR5406 stores an image in which the above-mentioned "•" mark and "x" mark are continuous without being separated.
0G, 4060B.

Furthermore, although the video equipment 31 of this embodiment is of the NTSC standard, and the aspect ratio of the digital image in the main scanning direction and the sub-scanning direction is 4:3, as an example, the video equipment 31 is based on the NTSC standard. The comparator 423 in FIG.
This can be handled by rewriting the contents of 2.4233 and RAM4212.

In addition, for the memory capacity of 2M bytes in this embodiment, NT
Since the capacity of one screen according to the SC standard is approximately 0.3 MB, it is possible to store images of 6 screens. Storage of these six screens is also possible by setting CLR 9171 shown in FIG. 15 to "1".

In addition, in the case of 1840 pixels (main scanning direction) x 1035 (sub scanning) in the HDTV standard, CLR, 9171
By setting "O", one screen can be stored in a 2M byte memory.

Furthermore, it is also possible to support high-band video equipment. That is, by increasing TVCLK output from the TBC/HV separation circuit 4030 of this embodiment, it is possible to increase the number of pixels read in the main scanning direction.

Read Processing from Image Storage Device M3> Next, the memory 4060R of the image storage device 3 described above
The process of reading image data from 14060G and 4060B will be explained.

Inputting instructions and the like when outputting an image from this memory to form an image on the color printer 2 is mainly performed by the digitizer 16 shown in FIG. 7 mentioned above.

In FIG. 7, the key 428 is the memory 4060R140.
This is an entry key for forming an image on the color printer 2 using image data from 60G and 4060B according to the size of recording paper. The key 429 is an entry key for forming an image at the position indicated by the coordinate detection plate 420 of the digitizer 16 and the point ben 421.

First, an example will be described in which an image is formed according to the size of recording paper, and then an example in which an image is formed in an area designated by a digitizer will be described.

Image forming process corresponding to the size of recording paper> In this embodiment, the color printer 2 has two cassette trays 735 and 736, as shown in FIG. 1, and two types of recording paper are set therein. .

Here, A4 size recording paper 791 is set in the upper row and A3 size recording paper 791 is set in the lower row. This selection of recording paper is input through the liquid crystal touch panel of the operation section 20. Note that the following description will be made regarding the case where a plurality of images are formed on A4 size recording paper.

First, prior to image formation, by inputting read image data from the video device 31 described above to the image storage device M3, the color reader 1 is transferred to the image memory 406OR140 (described later).
60G and 4060B, respectively, store a total of 16 image data from "Image O" to "Image 15" as shown in FIG. 16(A).

Next, the entry key 428 of the digitizer 16 is pressed. As a result, the CPU (not shown) detects this key human power, and
The image forming device M3 is automatically set for the size of recording paper.

When forming 16 images shown in FIG. 16(A),
For example, the image forming position is set as shown in FIG.

Next, details of the above image forming process in this embodiment will be explained with reference to the block diagram in FIG. 10 and the timing chart shown in FIG. 18.

IT sent from the color printer 2 shown in FIG. 2 to the color reader l via the printer interface 56
The OPi number 551 is input to the video interface 101 in the video processing unit 12 and sent from there to the image storage device 3.

The image storage device 3 starts image forming processing in response to this ITOP signal 551. Then, each image sent to the image storage device 3 is stored in the image storage device 3 as shown in FIG.
The image is formed under the control of the system controller 421O shown in B).

In FIGS. 10(A) and (B), the counter O (408
0-0) is selected by the selector 4070,
Memory 4060R14 via memory address line 9110
060G and 4060B are accessed for reading. With this access, each memory 4060R14060G
, 4060B is read out, and read image signals 9160R19160G, 9 from each memory are read out.
160B is lookup table (I, UT) 4110
R, 4110G, and 4110B, where logarithmic transformation is performed to match the luminous efficiency characteristics of the human eye.

Conversion data 920OR19200G from each LUT
, 9200B is the masking/black extraction/UCR circuit 41
20 is input. And this masking/black extraction/
The UCR circuit 4120 performs color correction of the color image signal of the image storage device 3, and performs UCR/black extraction and full extraction when recording black.

The image signal 9210 from these continuously connected masking/black extraction/UCR circuits 4120 is
Each image is separated by the selector 4130, and each FI
It is input to FO memories 4140-0 to 4140-3. The images that have been arranged sequentially up until now are displayed in this F:[FO41
Parallel processing is possible due to the action of 40-0 to 40-3.

Read image signal 9160R1916 from each memory
0Q, 9160B and parallel output image information 9260-0 to 9260-3 from each FIFO can all be processed in parallel.

The parallel image signals 9260-0 to 9260-3 are input to the next enlargement/interpolation circuits 4150-0 to 4150-3. Enlarge-
Interpolation circuits 4150-0 to 3 are system controller 42
10, each image is controlled to have the layout shown in FIG. 17, and enlarged and interpolated as shown in signals 9310-0 to 9310-3 shown in FIG. 18. Note that in this embodiment, a linear interpolation method is used.

This interpolated signal 9300-'O~3 is sent to the selector 4
Each image data input to 190 and processed in parallel so far is again converted into a serial image data signal. The image signal 9330 converted into serial image data by the selector 4190 is processed by the edge filter circuit 4180.
Edge enhancement and smoothing processing is performed. The signal then passes through LUT 4200 and is input to selector 4250 via signal line 9380.

The signal input to the selector 4250 is a tristate game (4256R14256G, 4256B, and 4256B).
55R14255G, 4255B, signal line 9
Connector 4 via 43OR19430G, 9430B
550.

Similarly, ENOUT, 9454, and CLK9453 output from the system controller 4210 also have tristate gates 4256E, 4256V, and 4255E,
4255V is output to connector 4550 via signal line 9450.

At this time, the control line 5ELECT-A (9451A) that controls the tristate gate shown in FIG.
5ELECT-B (9451B), 5ELECT-C
(945IC) is set to "0", "0", and "1".

After the formation of all the image data for "Image O" to "Image 3" is completed, the next steps are "Image 4" to "Image 7", "Image 8" to "Image 11", and "Image 12" to "Image 11". Images are sequentially formed in the order of ``Image 15'', and ``Images O'' to ``Images O'' shown in FIG.
Sixteen images of image 15J are formed.

Image Formation by Layout at Any Position> The above explanation describes the control for developing and forming an image so that it can be automatically formed as shown in FIG. The present invention is not limited to this, and an arbitrary image can be developed at an arbitrary position to form an image.

Below, as an example of this case, "Image 0" shown in FIG.
A case will be described in which "Image 3" is developed as shown in the figure and formed into an image.

First, using the same control as the image input control to the memory described above, four pieces of image information read from the color reader l are input into one image.
Image memory 40BOR54060G, 4060B
Then, the digitizer 1 is stored as shown in Figure 19.
By pressing the entry key 429 of No. 6, the system waits for the input of the designated position of the read image from the digitizer 16 where the image is to be formed.

Then, operate the point pen 421 to detect the coordinates on the coordinate detection plate 42.
Specify and input the desired deployment position from 0.

Next, the image forming process in this case is shown in FIGS.
) and timing charts shown in FIGS. 21 and 22.

FIG. 21 is a timing chart during image formation on the "text 1" line shown in FIG. 20, and FIG. 22 is a timing chart during image formation on the "sense 2" line shown in FIG. 20.

The ITOP signal 551 is output from the printer 2 in the same manner as described above, and the system controller 4210 starts operating in synchronization with this signal.

In the image layout shown in FIG. 20, "Image 3" is an image obtained by rotating the image from color reader 1 by 90'.

This image rotation process is performed in the following steps.

First, the memory 406 is controlled by the DMAC (direct memory access controller) 4380 in FIG.
Work memory 439 from OR14060G, 4060B
Transferring the image to 0 Next, after the CPU 4360 performs known image rotation processing in the work memory 4390, the DMAC 4380 transfers the image to the work memory 4390.
The image will be transferred from there to the memories 406OR14060G and 4060B, and image rotation processing will be performed.

The position information of each image laid out and inputted by the digitizer 16 is stored in the video processing unit 1 in FIG.
2 to the image storage device 3. The system controller 42 receives the development position information for each image.
1O is an enlargement/interpolation circuit 4150-0 corresponding to each image.
-3 operation permission signals 9320-0 to 9320-3 are generated.

In the layout at any position in this example, 2
For example, counter 0 (4080-0) is in image l, counter 2 (4080-2) is in image 2, counter 3 is in
(4080-3) operate corresponding to image 3, respectively.

Control during image formation on the "Ml" line shown in FIG. 20 will be explained with reference to FIG. 21.

To read "Image O" from the image memories 4060R, 14060G and 4060B, counter O (4oao-o) reads from address "O" to address "0.5M" (storage area for "Image O" shown in FIG. 19). Read this counter 4
Switching of outputs of 080-0 to 080-3 is performed by selector 4070.

Similarly, when reading “Image 1”, counter 1 (4080
-1), the data from address "0.5M" to address "1M" is read out.The timing of this readout is shown in FIG.
16OR19160G.

Designated as 9160B.

Here, counter 4080-2 and counter 4080-
3 is not activated by counter enable signals 9130-2 and 9130-3 from system controller 4210.

The data of "Image 0" and "Image 1" is LUT4110
It is sent to the masking/black extraction/UCR circuit 4120 via R14110G and R14110B, where it becomes a frame-sequential color signal 9210. This frame sequential signal 9210 is parallelized by the 5 selector 4130, divided for each pixel, and sent to the FIFO memory 4140-0.4140-1. And an enlargement from the system controller 4210◆
When the operation enable signal 9320-0.9320-1 to the interpolation circuit 4150-0.4150-1 is enabled, the expansion/interpolation circuit 4150-0.4150-1 enables the FIFO read signal 9280-0.9280-1. and starts read control.

FIFO memory 4140-0.4140-1 starts transferring image data to enlargement/interpolation circuit 4150-0.4150-1 in response to signal 9280-0.9280-1. And this enlargement/interpolation circuit 4150-0.4
150-1 performs layout and interpolation calculations according to the area previously designated by the digitizer 16. This timing is 9300-0.9300-1 in Figure 21.
Shown below.

The “Image O” and “Image L” data that have been subjected to layout and interpolation calculations are selected by the selector 4190 and then passed through the edge filter circuit 4180 to the LUT 4200.
is man-powered. The subsequent processing up to the connector 4550 is the same as described above, so the explanation will be omitted.

Next, with reference to FIG. 22, the timing of the "sentence?" line shown in FIG. 20 will be explained.

The processing from the image memories 406OR14060G and 4060B to the enlargement/interpolation circuits 4150-1 and 4150-2 is the same as described above.

However, in the 4-sentence 2'' line, since "Image 1" and "Image 2" are output, counter 1 (4080
-1) and counter 2 (4080-2), FIF04
140-1.4140-2, expansion/interpolation circuit 4150-
1.4150-2 works. These controls are performed according to control signals from system controller 4210.

As shown in Fig. 20, in the “u?” line, “Image 1”
and "Image *2J are overlapping. In this overlapping area, whether to form one image, both images, or both images is determined by the system controller 421O. can be selected by control signal 9340.

The specific control is the same as in the above case.

A signal from connector 4550 is connected to color reader 1 via a cable. Therefore, the video interface 101 of the color reader 1 receives the image signal 10 from the image storage device 5!13 through the signal line path shown in FIG.
5 is selectively output to the printer interface 56.

FIG. 23 shows the image storage device 3 in the above-mentioned image formation.
3 is a timing chart showing details of the process of transferring image information to the color printer 2. FIG.

As described above, by pressing the start button on the operation unit 20, the printer 2 starts operating and starts conveying the recording magazine. Then, when the recording paper reaches the leading edge of the image forming section, an ITOP signal 551 is output. This ITOP signal 55
1 is sent to the image storage device 3 via the color reader 1.9 The image storage device 3 reads the image data stored in each image memory 40BOR 14060G, 4060B under the set conditions, and creates the layout described above. , after performing processing such as enlargement and interpolation, the processed image data is sent to the video processing unit 12 of the color reader 1. The video interface 101 of the video processing unit 12 processes the types of data (R, a, B)/(M,
C, Y, BK) according to the video interface 101
Select the processing method.

In this embodiment, since M, C, Y, and BK are output sequentially, the above operation is repeated four times in the order of M, C, Y, and BK to form an image.

Description of Printer Unit> The 414 rules of the color printer 2 that prints out the image signal processed by the video processing unit 12 as described above will be explained using the diagram.

In the configuration of the printer 2 shown in FIG.
1 includes a laser output unit that converts an image signal from a color reader l into an optical signal, a polygon mirror 712 having a polygonal shape (for example, an octahedron), a motor (not shown) that rotates this polygon mirror 712, and an f10 lens (imaging lens). )713
etc.

In addition, 714 is a scanner 711 indicated by a dashed line in the figure.
It is a reflective mirror that changes the optical path of the laser beam from the
715 is a photosensitive drum.

The laser beam emitted from the laser output section is reflected by a polygon mirror 712, and linearly scans (tester scan) the surface of the photosensitive drum 715 by an f/θ lens 713 and a reflecting mirror 714, forming a latent image corresponding to the original image. form.

In addition, 717 is a primary charger, 718 is a full exposure lamp,
723 is a cleaner section that collects residual toner that has not been transferred; 724 is a pre-transfer charger; these members are disposed around the photosensitive drum 715. 726 is a developing unit that develops the electrostatic m image formed on the surface of the photosensitive drum 715 by laser exposure;
(for yellow), 713M (for magenta), 713C (for cyan), and 713BK (for black) are photosensitive drums 71
Phenomenon sleeve that directly develops in contact with 5, 730Y, 7
30M and 730C1730BK are toner hoppers for holding toner, and 732 is a screw for phasing the developer material. These sleeves 730Y~731BK
, the developer unit unit 2 door 26 is 4IIRed by the toner hoppers 730Y to 730BK and the screw 732,
These members are arranged around the rotation axis P of the developing unit 726.

For example, when forming a yellow toner image, the yellow toner is developed at the position shown in FIG. Also, when forming a magenta toner image, two developing unit 72
6 is rotated around the axis P in the figure, and the magenta developing sleeve 731M inside the device is disposed at a position in contact with the photoreceptor 715. Cyan and black development is similarly performed by rotating the developing unit 726 around the axis P in the figure.

Further, 716 is a transfer drum that transfers the toner image formed on the photosensitive drum 7'15 onto paper, and 5719 is a transfer drum 716 that is moved by being close to an actuator plate 719 for detecting the moving position of the transfer drum 716. A position sensor detects movement to the home position, 725 is a transfer drum cleaner, 727 is a paper press roller, 728 is a static eliminator, 729 is a transfer charger,
These members 719.720.725.727.729
are arranged around the transfer roller 716.

On the other hand, 735 and 736 are paper feed cassettes for collecting paper (paper sheets), 737 and 738 are cassettes, and doors 35 and 736
Paper feed roller that feeds paper from 739.740.74
Reference numeral 1 denotes a timing roller that takes timing of paper feeding and conveyance. The paper fed and conveyed via these is guided by a paper guide 749 and wound around the transfer drum 71B while its leading end is carried by a gripper to be described later, and then moves to the image forming process.

Further, 550 is a drum rotation motor, and 5 photosensitive drums 7
15 and the transfer drum 716 are rotated synchronously. 750 is a peeling claw that removes the paper from the transfer drum 716 after the image forming process is completed, 742 is a conveyor belt that conveys the removed paper, and 743 is an image fixing unit that fixes the paper that has been conveyed by the conveyor belt 742. In the image fixing section 743, the motor 74 attached to the motor attachment section 748
7 is transmitted to a pair of heat pressure rollers 744 and 745 via a transmission gear 746, and this heat pressure roller 7
The image on the paper conveyed between 44 and 745 is fixed.

The printout process of the printer 2 having the above configuration will be explained below with reference to the timing chart of FIG. 23.

First, when the first ITOP 551 arrives, a Y latent image is formed on the photosensitive drum 715-hi by the 1/-the light, and this is developed by the developing unit 731Y. Next, the image is transferred onto a sheet of paper on a transfer drum, and magenta printing processing is performed. The developing unit 726 then rotates around the axis P in the figure.

Next, when the ITOP 551 arrives, an M latent image is formed on the photosensitive drum by laser light, and cyan print processing is performed in the same manner. ITO that follows this action
Corresponding to P551, C and BK are similarly processed, and yellow print processing and black print processing are performed. When the image forming process is completed in this way, the paper is then peeled off by the peeling claw 750, and the image fixing unit 750 peels off the paper.
43, the printing of a series of color images is completed.

Theory of Monitor TV Interface 11> As shown in FIG. 1, the system of this embodiment can output the contents of the image memory in the image storage device to the monitor TV 32. It is also possible to output video images from the video equipment 31.

This will be explained in detail below.

The video image data stored in the image memories 40BOR14060G and 4060B is read out by the DMAC4380 and is transferred to the display memory 441OR1441.
The video image data stored in 0G, 4410B is
D/through UT4420R14420G, 4420B
It is sent to the A converters 4430R14430G and 4430B, where the analog R signal 45 is sent in synchronization with the 5YNC signal 459O3 from the display controller 4440.
90R, G signal 4590G and B signal 4590B are converted and output.

On the other hand, the display controller 4440 outputs 5YNC in synchronization with the output timing of these analog signals.
A signal 9600 is output. This analog R signal 459
0R, G signal 4590G, B signal 4590B, 5YNC
By connecting the signal 4590S to the monitor 4, the contents stored in the image storage device 3 can be displayed.

Furthermore, in this embodiment, the displayed image can be trimmed by sending a control command from the host computer 33 to the image storage device 3.

Based on the area information input by the host computer 33, the CPU 4360 controls the display control memories 4410R14410G and 441 using the same control as described above.
Trimming is possible by transferring only the effective area to 0B.

In addition, in response to the area instruction information from the host computer 33, comparators 4232 and 423 shown in FIG.
3 and RAM 4212 in the same manner as described above, and by inputting image data from the color reader l or video device 31 again, the trimmed image data is stored in the memory 406OR14060G, 4060
It can be stored in B.

Note that 4400 is a volume for adjusting the tone of the color image displayed on the monitor television 32.

The CPU 4360 calculates the resistance value (
Read the setting Vi) and use the LUT442OR from this setting value.
Set the output adjustment correction data in the tables 14420G and 4420B. Further, in order to match the display color of the monitor 4 with the recorded color, the adjustment correction data in the table of the LUT 4200 is changed in conjunction with the setting value of the volume 4400.

In addition, image memory 406OR54060G, 4060B
If multiple images are stored in the color printer 2
The layout of each image when recording with Monitor TV 3
2 and the host computer 33.

That is, by first displaying the size of the recording paper on the monitor television 32, and inputting the layout position information of each image using the host computer 33 while viewing this display, it is possible to layout each image to be recorded on the color printer 2. It is.

At this time, image memory 4060R14060G, 4060
The reading control of stored information from B to the color printer 2 and the recording control in the color printer 2 are the same as those in the above-mentioned embodiment, so the explanation will be omitted.

Description of Computer Interface> In the system of this embodiment, as shown in FIG. 1, a host computer 33 is connected to an image storage device M3. Next, the interface between the device of this embodiment and the host computer 33 will be explained using FIG.

The interface with the host computer 33 is performed by a GPZB controller 4310 connected by a connector 4580. GPZB controller is CP
It is connected to the CPU 4360 via the U bus 9610, and the host computer 3
It is possible to exchange commands and transfer image data with 3.

Note that the present invention is of course applicable not only to the above-mentioned color image forming system but also to monochrome printers and the like.

[Effects of the Invention] As explained above, according to the present invention, it is determined whether the image information reproduced from the video equipment is a moving image or a still image, and if it is a still image, it is recorded as a frame in the storage means. However, in the case of a moving image, since one-field information is field-recorded in the storage means, a high-quality output image can be obtained by frame recording for still images, and a proper image without deviation can be obtained by field recording for moving images. This has the effect of making it possible to obtain a beautiful output image.

[Brief explanation of drawings]

FIG. 1 is a system configuration diagram of an embodiment according to the present invention. FIG. 2 is a block diagram showing details of the color league in the same embodiment. 3 to 6 are schematic diagrams showing examples of switching control of the video interface section of the color league in the same embodiment. FIG. 7 is an external view showing the digitizer in the same embodiment. FIG. 8 is an explanatory diagram illustrating address information instructed by the digitizer in the same embodiment. FIG. 9 is a timing chart showing the output timing from the interface section to the image storage device in the same embodiment. FIGS. 10(A) and 10(B) are block diagrams showing details of the image storage device of the same embodiment. Figure t511 is a circuit diagram showing details of the selector section of the image storage device in the same embodiment. FIG. 12 is a circuit diagram showing details of the system controller unit and FIFO memory of the image storage device in the same embodiment. FIG. 13 is a timing chart showing the operation of the system controller section during digital storage in the FIFO memory during the same-magnification processing in the same embodiment. FIG. 14 is a timing chart showing the operation of the system controller section during digital storage in the FIFO memory during the isothermal processing of the same embodiment. FIG. 15 is a detailed circuit diagram showing the related structure between the system controller section and the image memory of the image storage device in the same embodiment. FIG. 16(A) is a schematic diagram of FIG. 16(B) showing the arrangement of image information in the image memory of the image storage device in the same embodiment.
FIG. 2 is a schematic diagram showing the storage state of moving images and still images in the image memory. FIG. 17 is a schematic diagram showing the layout of image formation in the same embodiment. FIG. 18 is a timing chart showing the operation of image forming processing according to the image forming layout shown in FIG. 17. '; Figure 519 is a schematic diagram showing the arrangement of image information in the memory in another image storage device of the same embodiment. FIG. 20 is a schematic diagram showing a state in which the image information shown in FIG. 19 is arbitrarily laid out. FIG. 21 is a timing chart showing the timing of image formation on the M sentence 1" line shown in FIG. 20. FIG. 22 is a timing chart showing the timing of image formation on the "fL2" line shown in FIG. This is a timing chart. Fig. 23 is a timing chart showing the timing of the image forming process of the same embodiment. 1... Color league, 2... Color printer, 3... Image storage device, 11. ... Original scanning unit, 12... Video processing unit, 13... Control unit, l6... Digitizer, 20... Operation unit, 31... Video equipment. 32... Monitor television, 33. ...Host computer, 56...Printer interface, 420...Coordinate detection plate, 421...Point Ben, 4000...Decoder, 4010.4070.4130.4190.4213.
4250.4253...Selector, 4020.443
0... A/D converter, 4050.4140.4252... FIFO memory, 4060... Image memory, 4080.4214.4230... Counter, 411
0.4200.4220...LUT, 4120...
Masking/black extraction/UCR circuit, 4150... Enlargement O interpolation circuit, 4210... System controller, 42 l 2.
...RAM, 4270...reader controller, 4360...CPU, 4380...DMAC5 4400...volume, 441O...display memory, 4440...display controller.

Claims (2)

[Claims] (1) A storage means for storing image information played back by a video device; A determining means for determining whether the image information is a moving image or a still image; As a result of the determination by this determining means, whether the image information is a still image or not; For example, a storage control means stores a frame in the storage means, and conversely, if the image information is a moving image, field-records one field information in the storage means; An image processing system comprising: an image forming means for forming an image as an image. (2) Image processing according to claim (1), characterized in that an interpolation operation is performed based on one field information stored in the storage means, and the other field information is generated and field recorded in the storage means. system.