JPH03227260A - Thermal recording device - Google Patents

Abstract

PURPOSE:To improve printing speed and printing quality by a method wherein a printing output pulse of a pulse width corresponding to output voltage of a D-A converter circuit is outputted in synchronization with a printing reference pulse. CONSTITUTION:A D-A converter circuit 3 connects one terminal of N-type transistors Tr1, Tr2, Tr3, Tr4 which turn on and off by earthing its source with inputting printing data DTi(n), DTi(n-1), DTi(n-2), DTi(n-3) from a shift resistor circuit 2 to its gate respectively correspondingly thereto, respectively correspondingly to each drain of the transistors Tr1-Tr4. Further, resistors R2, R3, R4, R5 the other terminal of which is commonly connected, and a resis tor R1 connected between the other terminal of those resistors R2-R5 and a power source terminal (power source voltage VDD) are provided. Voltage of a level corresponding to a value of the printing data DTi(n)-DTi(n-3) is outputted. A printing output pulse POi of a pulse width corresponding to output voltage of the D-A converter 3 is outputted in synchronization with a printing reference pulse PREF.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thermal recording device, particularly a thermal history recorder for applying energization pulses to a print head according to the energization frequency of a thermal recording device, a thermal transfer recording device, etc. The present invention relates to a thermal recording device having a control circuit.

[Conventional technology]

In a thermal recording device such as a thermal recording device or a thermal transfer recording device, the heat storage state of the print head changes depending on the frequency of energization of the heating element, so it is necessary to perform thermal history control.

The basic concept of thermal history control will be explained with reference to FIG.

The temperature of one heating element changes as shown by curves a, b, and c. Now, if we focus on a certain energizing period n, depending on the presence or absence of energization in the previous energizing period (n-1), the 2nd energizing period (n-2), and the 3rd energizing period (n=3), , the initial temperatures of the heating element during the energization period n are At, Bl, and cl, each at a different level. Therefore, in order to print at a constant temperature, it is necessary to correct the energization time width. In this example, the energization start timing is corrected, and the heating element temperature is 4AI, B2°C for curves a, b, and c, respectively.
Print output pulses POa, POb, and POc are outputted so as to start energization from the time when the voltage reaches 2. This control is thermal history control.

In a thermal recording device having a 24-bin print head, each of the 24 pins has a different energization history, so it is necessary to correct the energization time width for each heating element based on the past energization history.

The ideal energization correction is as shown in Figure 6, when the energization period (
Depending on the presence or absence of energization of (n-3), (n-2), and (n-1), four energization times, T1 to T, are set during the energization period n, but in conventional thermal recording devices, Now, this is done by software, and in this energization correction, such ideal energization correction was not performed.

FIG. 7 is a circuit diagram relating to thermal history control of a conventional thermal recording device.

In this circuit diagram, first, the basic printing pulse P IIIEF is
", the transistor Tr7 is turned on, and the power supply voltage DD is supplied to the print head driver circuit 10. In this circuit, energization correction is not performed by the basic printing pulse PY, but the energization is performed by the print output data Do. Correction is being performed.The control method will be explained below.

In this circuit, the buffer used for history calculation is
Printing history buffer PND3 stores data output during the 3rd previous energizing period (n-3), 2nd energizing period (n-3)
2) Print history buffer PD that stores the data output to
N2, print history buffer PDNI that stores the data output during the previous energization period (Cn-1), and the current energization period (Cn-1).
A total of six output data buffers DO2 and Do1 are provided, including a ratio data buffer DO3 that stores print data to be outputted to n), and output data buffers DO2 and Do1 that store print data obtained by history calculation processing.

Here, if the symbol of each part is the value stored in each part, the value to be stored is the printing 8-power data DOI, D
O2, DO3+! DO1=DO3・PDN2 (* represents AND operation) DO2=DO3・PDNI DO3=DO3 is given by the calculation formula and output. Print output data D
OI to DO3 are output at the timing shown in FIG.

jID, the printing period (energization period) is divided into three equal parts, and the contents of the output data buffers DOI, DO2, and DO3 are output in this order.

FIG. 9 is a flowchart showing the processing sequence of this circuit.

Further, FIGS. 10 and 11 show the output timing of print output data and its calculation procedure in the case of 4 dots as an example.

As described above, this thermal history control is software control, and must be executed by interrupt processing in order to obtain corrected data output.

On the other hand, in a thermal recording device, the lateral movement of the print head is controlled by interrupt processing, so if this energization correction is performed by another interrupt processing, it will result in multiple interrupt processing.

[Problem to be solved by the invention]

The conventional thermal recording device described above performs thermal history control using software, and in order to obtain corrected data,
Since it is configured with multiple interrupt processing including horizontal movement control of the print head, etc., there is a disadvantage that performing multiple interrupt processing requires time to save and restore register data, resulting in a decrease in printing speed.

Further, there is a drawback that a time lag occurs due to software control, and ideal energization correction cannot be performed, resulting in a decrease in print quality.

An object of the present invention is to provide a thermal recording device that can improve printing speed and printing quality.

[Means to solve the problem]

The thermal recording device of the present invention is provided corresponding to each printing pin of a print head, and sequentially stores print data of a plurality of printing periods in accordance with a printing basic pulse that determines a printing period and a printing cycle of the print head. a shift register circuit that inputs the parallel pressure of this shift register circuit and outputs a voltage at a level corresponding to the value of this parallel output; and an energizing pulse generation circuit that outputs a print output pulse having a pulse width in synchronization with the basic print pulse.

[Effect]

According to the present invention, history information of shift register record data is stored based on basic printing pulses generated by a microcomputer or the like.

Then, this history information is converted into a threshold voltage by a DA conversion circuit, and a printing pressure coverage having a pulse width corresponding to this threshold voltage is generated by an energization pulse generation circuit.

Therefore, the microcomputer can perform ideal energization correction simply by outputting basic printing pulses, and the burden on the software is greatly reduced.

Therefore, high-speed and high-quality recording can be realized.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. Note that this circuit uses one heating element (print pin) of the print head.
For example, for a 24-pin print head, it is necessary to prepare 24 sets of buses other than the data bus 1. FIG. 1 shows a circuit corresponding to the first heating element (printing pin).

The shift register circuit 2 includes D forming a shift register.
-Flip-flops FFI to FF3 and logic game) Gl,
G2, and according to the inversion signal of the basic printing pulse PREF transmitted from the microprocessor to determine the printing period and printing cycle of the print head, the print data of the three printing periods (n-3) before the current time. DTi (n-3
), print data DTi of the two previous printing period (n −2)
(n2) The print data DTi (n-1) of the previous print period (n-1) is sequentially fetched and stored from the data bus 1, and these print data and the print data DTi (n) of the current print period n are combined. Output in parallel.

The D-A converter circuit 3 has a grounded source and a gate that receives print data DTi(n), DTi from the shift register circuit 2.
(n-1), DTi (n-2), DTi(n-
3) are respectively inputted and turned on/off by N-type transistors Trl, Tr2 . Tr3, Tr4, and resistors R2, R3, whose one ends are connected to the drains of these transistors Tr1 to Tr4, respectively, and whose other ends are commonly connected.
R4, R5, and a resistor R1 connected between the other ends of these resistors R2 to R5 and a power supply terminal (power supply voltage VDD), and print data DTi (n) to DTi (n-
Output a voltage at a level corresponding to the value of 3).

The energizing pulse generation circuit 4 includes an inverter 1 that inverts the basic printing pulse P□6F, an amplifier A1 that amplifies the output of the inverter 1, and a voltage V by integrating the output of the amplifier AI. The resistor R6 and capacitor C1 output 1, and the voltage V. 1 and the output voltage of the DA conversion circuit 3, and a logic gate G3. G4 and a resistor R7, the print output pulse POi with a pulse width corresponding to the output voltage of the D-A conversion circuit 3 is used as the basic print pulse P.
Output in synchronization with REF.

Next, the operation of this embodiment will be explained.

FIG. 2 is a waveform diagram of various signals for explaining the operation of this embodiment.

The corresponding 1-bit print data DTi on the data bus is sequentially shifted into a shift register formed by three D-flip floats 7'FF1 to FF3 and stored therein. The shift clock of the shift register is generated by inverting the printing basic pulse PIFF output from a microcomputer or the like using an inverter 1.

The Q outputs of these D-flip-flops FFI to FF3 are print data DTi (n-1), DTi (n-2),
DT i (n-3) is shown. The print data is DTi(n) directly to the gate of the transistor Trl, D
-Print data DTi from flip-flop FFI
(n-1) directly to the gate of transistor Tr2, D-
Print data DTi(n-
2) is input to the gate of transistor Tr3 via AND-type logic game 1-Gl, and print data DT from D-flip-flop FF3 is input to the gate of transistor Tr4 via AND-type logic game 1-G2. .

The transistors Tri to Tr4 are turned on when the gate input is "1" and turned off when the gate input is '0'.
The drains of rl to Tr4 are pulled up to the power supply voltage VDD by resistors R1 to R5.

Print data DTi (n), DTi (n-1), D
Table 1 shows the relationship between the operations of the transistors Trl to Tr4 and the output voltage of the DA conversion circuit 3 with respect to Ti (n-2) and DTi (n-3).

Table 1 (Note: R1 to R5 are the values of resistors R1 to R5) The output of the DA conversion circuit 3 is input to the (-) input terminal of the comparator CMI. The (+) input terminal of the humpator CMI is connected to the voltage ■ which is the basic printing pulse P, which is integrated by the resistor R6 and the capacitor C1 after passing through the inverter II and the amplifier A1.
. 1 is input.

The output of the comparator CMI is the NAND of the printing basic pulse P RlF and the printing data DTi by the logic game) G3.
The output obtained by the calculation is NORed and the print output pulse P
Generate Oi. Logic gate G3 outputs print data DTi
is “0”, the print output pulse POi is forced to “0”.
``I'm trying to make it happen.''

Now, focusing on the 11 points in Figure 2, the print data DTi
is "1", so there are 8 basic printing pulses P.

At the falling edge of DTi(n)="1", DTi(n-
1) = “O”, DTi (n-2) = “0”, DTi (
n-3)=“1”, and transistors Tr1 and Tr4
is on, transistor Tr2. Tr3 is turned off and D
The output voltage vTH of the -A conversion circuit 3 is as shown in Table 1. Waveform of (+) input terminal of comparator CMI (VC
+) is the time constant τ=R6XCI (R6 is the value of resistor R6,
Since C1 is an integral waveform having the value of the capacitor CI, the output of the comparator CMI is a waveform in which the rise of the basic printing pulse PREF is delayed. Since the output of the comparator CMI is NOR-operated with the output of the logic game G3, the print output pulse PO is generated at point t2.
i is forced to be "0".

Figure 3 shows the input of the D-A conversion circuit 3 and the print output pulse PO.
FIG. 3 is a waveform diagram showing the relationship between pulse widths of i.

Here, the value relationship of resistors R3 to R5 is R3<R4<R5
The output of the D-A conversion circuit 3 is VTn+<V 7M2
< V□3 < V T! (4, and the relationship between the pulse width of the print output pulse POi in each case is T 1 <
T 2 < T 3 < T 4. Further, each pulse width can be arbitrarily set by changing the values of the resistors R1 to R5 or the values of the resistor R6 and the capacitor C1.

In this way, it is sufficient to output the printing basic pulse P RET from the microprocessor, etc., and there is no need to output three pieces of data per dot as in the past, reducing the burden on the software and reducing time lag. Since this does not occur, high-speed printing is possible. Further, it is possible to perform the ideal energization correction of the print head.

FIG. 4 is a circuit diagram showing a second embodiment of the present invention.

In this embodiment, control is performed in consideration of the print data DT (i+1) of the print head one above the print head to be controlled and the print data DT (i-1) of the print dot one below. This has the advantage that it is possible to perform ideal energization correction with even higher accuracy.

〔Effect of the invention〕

As explained above, the present invention provides a shift register circuit that holds print data of a plurality of printing periods and outputs it in parallel, and a D-A conversion circuit that outputs a voltage at a level corresponding to the parallel output of the shift register circuit. By adopting a configuration that includes a circuit that generates a print output pulse with a pulse width corresponding to the output voltage of this D-A conversion circuit, a microprocessor etc. does not need to perform multiple interrupt processing and can generate basic print pulses. Since it is only necessary to output the data, the burden on the software is reduced, time lag is eliminated, and printing quality and speed can be improved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention, FIGS. 2 and 3 are waveform diagrams of signals of various parts to explain the operation of the embodiment shown in FIG. 1, and FIG. 4 is a circuit diagram showing a first embodiment of the present invention. is a circuit diagram showing a second embodiment of the present invention, FIGS. 5 and 6 are waveform diagrams of signals of various parts for explaining the operating principle of a conventional thermal recording device, and FIG. 7 is a diagram of a conventional thermal recording device. Circuit diagrams showing an example of FIGS. 8 and 9
The figures are a timing waveform diagram and a flowchart of print output data for explaining the operation of the thermal recording device shown in FIG. 7, respectively, and FIGS. 3 is a timing waveform diagram of print output data for 4 dots of the print head and a logical value diagram showing its calculation procedure. FIG. 1... Data bus, 2... Shift register circuit, 3.3A... D-A conversion circuit, 4...
... Energization pulse generation circuit, 10 ... Print head driver circuit, A1 ... Amplifier, C1 ...
... Capacitor, CMl ... Comparator,
FF1~FF3...D-Flip-flop, G
1-G4...Logic gate, Il, I2...
...Inverter, R1-R11...Resistor, l-S6...Step, Tr1-Tr7...Transistor.

Claims (1)

[Claims] 1. Provided corresponding to each print pin of the print head, and sequentially stores print data of a plurality of print periods and outputs them in parallel in accordance with basic print pulses that determine the print period and print cycle of the print head. a shift register circuit, a D-A converter circuit that inputs the parallel outputs of this shift register circuit and outputs a voltage at a level corresponding to the value of this parallel output;
A thermal recording device comprising: an energizing pulse generating circuit that outputs a printing output pulse having a pulse width corresponding to the output voltage of the A conversion circuit in synchronization with the basic printing pulse. 2. Input the parallel output of the shift register circuit and the print data of the print pins above and below the corresponding print pin of the print head to the D-A converter circuit, and convert the level corresponding to the values of these parallel outputs and print data. The thermal recording device according to claim 1, wherein the thermal recording device outputs a voltage.