JPH03227053A - Semiconductor memory circuit - Google Patents

Abstract

PURPOSE:To obtain a semiconductor memory circuit in which an unstable memory cell is easily detected by a method wherein the power supply paths of the memory cells and peripheral circuits other than the memory cell are separated from each other. CONSTITUTION:A voltage high enough to operate a peripheral circuit 2 other than a memory cell 1 is supplied to the peripheral circuit 2 from an outer power supply 3. A voltage close to the operational limit of the memory cell 1 is supplied to the memory cell 1 from a memory cell outer power supply 4 to enable a semiconductor memory circuit to operate. A test mode judging circuit is provided inside a semiconductor memory circuit besides, whereby a test can be executed in the same way as above by replacing a memory cell power supply path 6 with a power supply path 5 for an operating voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of supplying power within a semiconductor memory circuit.

[Conventional technology]

Figure 2 is a plan view showing the power supply structure of a conventional semiconductor memory circuit. In Figure 5, (1) is a memory cell, (2) is a peripheral circuit other than the memory cell (1), and (3) is a semiconductor memory circuit. (5) is a power supply line that supplies power to the inside of the semiconductor memory circuit.

Next, the operation will be explained. Conventional semiconductor memory circuits supply power from a voltage source (3) to the memory cell (1) and peripheral circuits (2) other than the memory cell (1) using the same power supply v++5). fc to operate the semiconductor memory circuit.

[Problem that the invention seeks to solve]

Conventional semiconductor memory circuits are configured as described above, so when an unstable memory cell is detected by changing the external power supply, the memory cell is operating and the peripheral circuits other than the memory cell are not operating, resulting in a short p1. There is a problem in that unstable memory cells cannot be easily detected in a timely manner.

This invention was made to solve the above problems, and by changing the external power supply to the memory cell to the voltage supplied to peripheral circuits other than the memory cell, it is possible to easily eliminate unstable memory cells. The purpose of this study is to obtain a semiconductor memory circuit that can be detected.

[Means to solve the problem]

The semiconductor memory circuit according to the present invention separates the power supply paths for memory cells and peripheral circuits other than the memory cells. Additionally, different voltages can be supplied to the memory cells and peripheral circuits other than the memory cells.

〔Example] Hereinafter, an embodiment of the invention will be explained with reference to the drawings.

2 in FIG. 1, (4) is a memory cell voltage source that supplies power to the memory cell H; 16) #': t is a memory cell power supply path that supplies power to the memory cell; The reference numerals are the same as those of the prior art, so the explanation will be omitted.

Next, the operation will be explained. First, the peripheral circuits (2) other than the memory sensor (1) are supplied with one voltage sufficient to operate sufficiently from the external power supply (3). In addition, a voltage close to the memory cell operating limit is supplied to the memory cell 1 (1) from the external power supply for the memory cell (4) to shorten the unstable memory cell (rl) when operating the semiconductor memory circuit. Detect between plates and easily.

In addition, by providing a test mode determination method in the semiconductor memory circuit, one source supply path (6) for memory cells can be used during testing.
It can be done in the same way as F by changing the voltage of the power supply path (5).

〔Effect of the invention〕

As described above, according to the present invention, unstable memory cells can be detected easily in a short period of time, and by connecting the external power supply for memory cells and the power supply path when completing the finished product, it is possible to detect unstable memory cells easily. Since it can be used in the same way as a semiconductor memory circuit, it has the effect of shortening evaluation time.

[Brief explanation of drawings]

FIG. 1 is a plan view of a semiconductor memory circuit according to an embodiment of the present invention, and FIG. 2 is a plan view of a conventional semiconductor memory circuit. In the figure, (1) r! Memory cell %(2) is a memory cell (periphery other than 11@circuit%f3), f4) is an external power supply that supplies power to the semiconductor memory circuit, t5),
(6) shows a power supply path for supplying power to various parts within the semiconductor memory circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A semiconductor memory circuit characterized in that power supplies for peripheral circuits and memory cells are separated.