JPH03216752A - Integrated circuit - Google Patents

Abstract

PURPOSE:To decide the address of its own station with no use of its own address setting terminal nor a nonvolatile memory by recording the production No. of an integrated circuit IC to a fuse ROM contained in the IC and deciding the address of its own station based on the recorded manufacturing number. CONSTITUTION:A fuse ROM 17 contains an individual serial No. written at the time of production. A sequence controller 16 decides with comparison whether the serial No. written into the ROM 17 at communication is coincident with the data inputted via the serial bus input terminals 11 and 12 or not. Thus the manufacturing number of an IC is recorded to the ROM 17 contained in the IC and the address of its own station is decided based on this number. Thus it is possible to decide the address of its own station without using its own station address setting terminal nor a nonvolatile memory which stores its own address for each device.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to integrated circuits for serial bus interfaces.

[Conventional technology]

Traditionally, one integrated circuit for serial bus interfaces has been used for each device connected to the serial bus. The integrated circuit for each serial bus interface in each device connected to the serial bus has a unique address. When the integrated circuits in each device start communication, after confirming that there are no signals on the serial bus and that the bus is free, they first output a communication start signal to the bus. Notify each connected device that communication is about to begin. Subsequently, by sending the address of the own station as a master address and the address of the communication partner station as a slave address to the bus, the receiving station of the transmitting station is identified and communication is performed.

Each integrated circuit in each device connected to the serial bus must determine its own address in advance and retain its own address even when the power is turned off. Either the terminal has a terminal and the own station address is determined by connecting this terminal, or each device has a non-volatile memory inside or outside the communication integrated circuit and the non-volatile memory is programmed in advance. By writing the station address in advance, the own station address is determined.

[Problem to be solved by the invention]

In the above-mentioned conventional integrated circuits, the terminal connections are different for each device, making the settings cumbersome, and the cost is high because a nonvolatile memory is required for each device.

[Means to solve the problem]

The integrated circuit of the present invention includes a means for comparing an individual serial number with the fuse ROM during manufacturing and a means for comparing whether the serial number written in the fuse ROM during communication matches the data input from the serial bus interface. have.

In the present invention, the serial number of the integrated circuit is recorded in the fume ROM inside the integrated circuit, and the serial number can be used as the own station address, or the own station address can be determined based on this serial number. The local station address can be determined without having an address setting terminal or a nonvolatile memory for storing the local station address for each device.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a first embodiment of the present invention, and FIG. 2 is a circuit diagram of the fuse ROM portion of FIG. 1.

In FIG. 1, the serial bus connections fi 11, l2 are connected directly to the serial bus. Since the circuit shown in FIG. 1 is a half-duplex asynchronous communication circuit, input and output operations cannot be performed at the same time, and there is an input mode and an output mode. In the input mode, the bus signal is converted into a digital signal by the humparator 13, and the input signal is input to the shift register 14. The signal input to the shift register I4 is sent to the sequence controller l6 via the internal data bus 15 when a certain number of bits are input.
Processed by In output mode, shift register l4 reset by sequence controller l6
The output signal is converted into a bus drive signal by the driver 18 and applied to the serial bus connection terminals 11 and 12. Input/output signals include commands that control other devices connected to the bus, commands that determine the input/output direction and nature of input/output data, and signals that communicate with devices connected to the bus. This includes the data itself that is input and output between the two. Also, at the start of communication, the serial number is input from the serial bus input terminals 11 and 12, and the sequence controller 16 inputs the serial number from the serial bus input terminal 1.
1. The serial number input from 12 is the fuse ROM
It is compared to see if it matches the serial number written in advance in 17. If the two serial numbers match, it recognizes that the communication from the other station is for its own station, and performs transmission and reception with the other station. If the two serial numbers are different, the communication from the other station is not intended for your own station and is ignored. The serial number of the integrated circuit is written in advance in this fuse ROM 17, and is set so that no two numbers are the same. The circuit of the fuse ROM will be explained with reference to FIG. 2. After the pre-process (diffusion process) of the integrated circuit manufacturing process is completed, the polysilicon fuse 21aze is cut off before the post-process (assembly process). As for the cutting method, among the polysilicon fuses 21a''-6, each fuse to be cut is connected to the corresponding fuse ROM cutting terminal 22.
Apply a high voltage to a-e to connect polysilicon fuses 21a-e.
It is fused by passing a large current through it. At this time, the lead
-E-4 signal 24 is low level, so switch 2
3a-e are set to the off state, and no current flows through fuse ROM latches 25a-e. Also, fuse ROM
The cutting terminals 22a''-e are only needed when cutting the polysilicon fuse, and are not exposed outside the integrated circuit package.Also, when reading the contents of the fuse ROM during communication, first the fuse 'ROM latch 25a is used. -e, if the initialization signal 26 is once set to a high level and the polysilicon fuses 21a-e are blown, the outputs of the fuse ROM latches 25a-e are fixed at a high level.However, During communication, the read mode signal 24 is at a high level and the switches 23a to 23e are on, so if the corresponding fuse ROM is not cut off, the policy fuse 21axe is turned off after the initialization signal 26 falls. Since one end is connected to VDD, the pressure of the fuse ROM latches 25a to 25e becomes low level.
The outputs of the fuse ROM latches 25a-e are determined by the states of the fuses 21a-e.

FIG. 3 is a block diagram of a first embodiment of the present invention.

When viewed from the outside, the circuit shown in FIG. 3 can be accessed as a memory with a serial bus interface.

When accessing from the outside, first of all the fuse ROM
The serial number No. 37 is input as the device address from the serial bus connection terminals 31 and 32. The device address input from the serial bus connection terminals 31 and 32 to the shift register 34 via the comparator 33 is compared with the serial number read from the fuse ROM 39 via the internal data bus 35 by the coincidence detection circuit 39. Ru.

If the two serial numbers match, the read/write enable signal 310 becomes active.
Thereafter, the data memory 36 includes a comparator 33, a driver 38, a shift register 34, and an internal data bus 35.
5, addresses of the data memory 36 are input and data is input/output from the serial bus connection terminals 31 and 32. On the other hand, if the two serial numbers do not match, the read enable signal 310 becomes inactive and subsequent data input/output is prohibited.

FIG. 4 is a block diagram of a third embodiment of the present invention, and FIG. 5 is a flowchart of an address setting procedure.

First, an outline of the operation of the circuit shown in FIG. 1 will be explained.

In FIG. 1, serial bus connection terminals 101 and 102
is connected directly to the serial bus. Since the circuit shown in FIG. 1 is a half-duplex asynchronous communication circuit, input and output operations cannot be performed at the same time, and there is an input mode and an output mode.

In the input mode, the input signal is converted from the signal on the serial bus into a digital signal by the comparator 103.
It is input to shift register 104. The signal input to the shift register 104 is decomposed into a command and data by the sequence controller 106 via the internal data bus 105 when a large number of bits are input, and the data is sent to the output terminal via the output buffer 107. It is output from 108a''-c and used for controlling the sub-units.

In the output mode, the state in the sub-unit input from the input terminals 109a to 109C via the input buffer 110 by the sequence controller 106 is set to the shift register 104, and the output signal is sent to the driver 1.
11 into a bus drive signal, which is output from serial bus connection terminals 101 and 102.

Next, the method of setting the local station address will be explained. Such settings are performed by interconnecting each unit with a bus 503 as shown in FIG. Each subunit has an IC as shown in FIG. First, the serial number set in the fuse ROM 112 is the serial number of the sub units 502a to 502d.
The number is set during the manufacture of the integrated circuit so that the same number will never be used twice for each integrated circuit for the bus interface.

This serial number may be considered the integrated circuit's manufacturing number. If the serial number is directly used as the communication address of each sub-unit, the number of digits in the address will increase and communication efficiency will decrease.As a countermeasure to this, a conversion table between the serial number and communication address can be stored in the non-volatile read/write memory of the main unit 501. This can be solved by having each serial number have a communication address and distributing the communication address for each serial number from the main unit. FIG. 5 is a flowchart of the sub-unit address setting procedure.

First, when a sub-unit is first powered on and connected to the bus system, it sends its own real number to the main unit. In FIG. 4, the connection detection circuit 1 is reset when the power-on reset circuit 113 detects that the power is turned on.
14 monitors the status of serial bus connection terminals 101 and 102 via comparator 1' 1 0 3 and confirms that they are correctly connected to the serial bus, and then transfers the contents of fuse ROM 112 to serial bus connection terminal 1.
Output from 01 and 102. When the main unit receives a serial number, it refers to the conversion table in the main unit, and if there is no 7 real number that is the same as the received serial number, it stores the newly received serial number and a new address corresponding to it in the conversion table. Set. The master unit then transmits the address corresponding to the received serial number to the sub-unit along with the received serial number. The sub unit compares the received serial number with its own serial number, and if they match, sets the distributed address carried in the same frame as the serial number as its own address. In FIG. 4, the sequence controller 106 is connected to the serial bus tit
[Data input from children 101 and 102 is transferred to fuse RO
Compare the contents of M112, and if they match, serial
The data input from the bus connection terminals 101 and 102 is written to the local address register 115. Once the own address is set, the sub-unit only needs to communicate using the contents of the own address register 115 as the own address, and there is no need to send or receive a serial number unless the power is turned off.

FIG. 6 is a block diagram of a fourth embodiment of the present invention.

When viewed from the outside, the circuit shown in FIG. 6 can be accessed as a memory with a serial bus interface.

In this embodiment, the serial number is directly used as the sub-unit address. In that case, when the sub-unit is powered on and connected to the bus system, the sub-unit sets the contents of the fuse ROM 407 in the shift register 404, and transfers the contents of the fuse ROM 407 to the serial bus connection terminal 401, via the driver 413. 402, the serial number of the own station is transmitted. By receiving the serial number from this memory sub-unit, that is, the address of the sub-unit, the main unit can know at which address the sub-unit memory is located.

When accessing the sub unit memory from the main unit, first enter the serial number of fuse ROM407 as the sub unit address.
Input from bus connection terminals 401 and 402. serial·
The sub unit address input from the bus connection terminals 401 and 402 to the shift register 404 through the comparator 403 is detected to match the real number read from the ROM 407 via the internal data hash 405. A comparison is made by circuit 408. If the two serial numbers match, the read/write invalid signal 409 becomes active. Data after U
The memory 406 includes a comparator 403 and a tricycle 413.
, a shift register 404, and an internal data bus 405 to input addresses and input/output data from the real hash connection terminals 401 and 402 to the data memory 406. On the other hand, if the two serial numbers do not match, the read enable signal 409 becomes inactive, and subsequent data input/output is prohibited. By making this circuit a sub-unit on the serial bus, you can expand the memory as much as you like by simply connecting this memory sub-unit on the bus without having to provide a terminal for setting the address in the sub-unit. can.

〔Effect of the invention〕

As explained above, according to the present invention, the serial number of the integrated circuit is recorded in the fuse ROM inside the integrated circuit, and the own station address is determined based on this serial number. The local station address can be determined even without a non-volatile memory.

[Brief explanation of drawings]

FIG. 1 is a diagram of a first embodiment of the present invention, FIG. 2 is a configuration diagram of the fuse ROM of FIG. 1, FIG. 3 is a diagram of a second embodiment, FIG. 4 is a diagram of a third embodiment, and FIG. is an address setting flowchart, FIG. 6 is a diagram of the fourth embodiment, and FIG. 7 is a communication system diagram.

Claims (1)

[Claims] It is an integrated circuit for a serial bus interface, and includes a fuse ROM in which an individual serial number is written during manufacturing, and the serial number written in the fuse ROM during communication as data input from the serial bus interface. and means for comparing whether or not they match.