JPH03214657A - Module element - Google Patents
Module elementInfo
- Publication number
- JPH03214657A JPH03214657A JP2008216A JP821690A JPH03214657A JP H03214657 A JPH03214657 A JP H03214657A JP 2008216 A JP2008216 A JP 2008216A JP 821690 A JP821690 A JP 821690A JP H03214657 A JPH03214657 A JP H03214657A
- Authority
- JP
- Japan
- Prior art keywords
- arc
- module element
- transistor
- fuse
- container
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000008188 pellet Substances 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 abstract description 3
- 230000002265 prevention Effects 0.000 abstract description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 230000009172 bursting Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000003795 chemical substances by application Substances 0.000 description 4
- 238000001816 cooling Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 101100127891 Caenorhabditis elegans let-4 gene Proteins 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Fuses (AREA)
- Inverter Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
（産業」二の利用分野）
本発明は電力用半渾体制御素子に係り、特に防爆特性を
改良したモジュール素子に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a semicircular power control element, and particularly to a module element with improved explosion-proof characteristics.
（従来の技術）
電力用半導体制御素子は第３図に示すように、インバー
タブリッジ４のスイッチ素子６１〜６６としてバイポー
ラトランジスタ，ＭＯＳＦＥＴ，ＩＧＢ Ｔ （ Ｉｎ
ｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎ
ｓｉｓｔｏｒ）など各種のものが使用されている。(Prior Art) As shown in FIG. 3, power semiconductor control elements include bipolar transistors, MOSFETs, and IGBT (In
Sulated Gate Bipolar Tran
sistor), etc. are used.
第３図は、交流電動機駆動用トランジスタインバータの
一般的な構成例である。FIG. 3 shows a typical configuration example of a transistor inverter for driving an AC motor.
第３図において、直流電源１とフィルタ用コンデンサ２
から成る電源が高速ヒューズ３を介してトランジスタブ
リッジ４に供給され、その交流出力によって電動＠５が
駆動される。In Figure 3, DC power supply 1 and filter capacitor 2
A power source consisting of is supplied to the transistor bridge 4 through the high-speed fuse 3, and the electric motor @5 is driven by its AC output.
トランジスタブリッジ４は、１〜ランジスタ６１，６２
， ６３， ６４， ６５． ６６から成る三和インバ
ータブリッジを構成している。The transistor bridge 4 includes transistors 1 to 61 and 62.
, 63, 64, 65. The Sanwa inverter bridge consists of 66 inverter bridges.
現在これに使用されているトランジスタは主としてモジ
ュール形であり、主電極と冷却面は電気的に絶縁され、
主電極はボンディンクワイヤを介して１一ランジスタの
チップに接続されている。The transistors currently used for this purpose are mainly modular, with the main electrode and cooling surface electrically insulated.
The main electrode is connected to the chip of the transistor 1 through a bonding wire.
第４図はモジュール形１ヘランジスタの構造の一例を示
すもので、冷却フィンに放熱させる銅ベース８０の」二
に熱伝導性の良い絶縁セラミックス８］を接着し、その
上に鋼材８２， ８３． ８４が接着されて電極となり
、トランジスタペレット８５のコ１ノクタが銅材８２に
エミッタ端子を上側にして接着され、エミッタ端子はボ
ンディングワイヤ８７てエミッタ電極８９にボンディン
クされ、コレクタ側はボンティングワイヤ８６でコレク
タ電極８８に接続されている。FIG. 4 shows an example of the structure of a module-type helangistor. Insulating ceramics 8 with good thermal conductivity are bonded to the copper base 80 which dissipates heat to the cooling fins, and steel materials 82, 83. 84 is bonded to form an electrode, the contactor of the transistor pellet 85 is bonded to the copper material 82 with the emitter terminal facing upward, the emitter terminal is bonded to the emitter electrode 89 through the bonding wire 87, and the collector side is bonded to the bonding wire 86. and is connected to the collector electrode 88.
実際には、この他にベース信号端子も接続され、モジュ
ール外部には第５図に示すようにエミッタＥ，コレクタ
Ｃ，ベースＢの端子が引き出され、外壁は絶縁性のモー
ルド材でカバーされている。In reality, the base signal terminal is also connected, and the emitter E, collector C, and base B terminals are drawn out to the outside of the module as shown in Figure 5, and the outer wall is covered with an insulating molding material. There is.
第３図のようにブリッジ構成されたインバータ回路にお
いて、上下の１一ランジスタの一方がバンクすると直流
電源が短絡されて１〜ランジスタに過電流が流れ、図示
しない過電流保護回路がこれを検出しトランジスタをす
べてオフすることにより過電流保護をしている。しかし
、直流電圧が高い場合や制御回路の異常の場合は１一ラ
ンジスタの安全動作領域内で保護できず、他方のＩ一ラ
ンジスタもパンクし短絡電流が増大し、ボンディングワ
イヤが溶断してアークを出し、モジュール形トランジス
タの外壁が飛散して危険となるので、高速ヒューズ３に
よって故障電流を限流遮断している。In an inverter circuit with a bridge configuration as shown in Figure 3, if one of the upper and lower transistors 1-1 is banked, the DC power supply is short-circuited and an overcurrent flows through the transistors 1-1, and an overcurrent protection circuit (not shown) detects this. Overcurrent protection is provided by turning off all transistors. However, if the DC voltage is high or there is an abnormality in the control circuit, protection cannot be achieved within the safe operating area of the I-1 transistor, and the other I-1 transistor will also become punctured, increasing the short-circuit current, causing the bonding wire to melt and causing an arc. If the failure occurs, the outer wall of the module transistor may be blown off, which could be dangerous, so a high-speed fuse 3 is used to limit and cut off the fault current.
インバータの容量が大きくなると、モジュール素子を多
数並列に使用する必要があり、この場合モジュール素子
の外壁の破裂を防ぐために、第６図に示すように各トラ
ンジスタモジュールのコレクタ側にそれぞれ高速ヒュー
ズを接続している。As the capacity of the inverter increases, it is necessary to use a large number of module elements in parallel.In this case, in order to prevent the outer wall of the module elements from bursting, a high-speed fuse must be connected to the collector side of each transistor module, as shown in Figure 6. are doing.
これは第３図のような直流側の共通ヒュース３とすると
、並列接続したすべてのモジュール素子の保護に適合す
るヒューズが無いからである。This is because if a common fuse 3 on the DC side is used as shown in FIG. 3, there is no fuse suitable for protecting all the module elements connected in parallel.
また第６図ではヒューズを各１〜ランジスタのコレクタ
側に挿入しているが、こればトランジスタのベース駆動
信号を各トランジスタのエミツタ側を共通な基準電位と
して印加しているのでエミツタ側の電位変動がないよう
にする必要かあるからである。In addition, in Figure 6, fuses are inserted into the collector side of each transistor, but in this case, the base drive signal of the transistor is applied to the emitter side of each transistor as a common reference potential, so the potential on the emitter side will fluctuate. This is because it is necessary to make sure that there is no such thing.
第６図はトランジスタブリッジの１相分を示したもので
、複数の１−ランジスタ６１−１〜６１−ｎの各エミッ
タおよびベースをそれぞれ並列に接続すると共にそれぞ
れの１・ランジスタに高速ヒューズ３１−１〜３１−ｎ
を挿入している。FIG. 6 shows one phase of a transistor bridge, in which the emitters and bases of a plurality of 1-transistors 61-1 to 61-n are connected in parallel, and each 1-transistor is connected to a high-speed fuse 31-n. 1-31-n
is inserted.
また同じように１−ランジスタ６２−１〜６２−ｎの各
ベースおよびエミッタをそれぞれ並列に接続す＝３−
ると共に、それぞれの１−ランジスタに高速ヒューズ３
２−１〜３２−ｎを挿入している。Similarly, the bases and emitters of the 1-transistors 62-1 to 62-n are connected in parallel = 3-, and a high-speed fuse 3 is connected to each 1-transistor.
2-1 to 32-n are inserted.
さらにコンデンサ８を直流母線のサージを吸収ずるため
に出来るだけ素子の近くに配置している。Furthermore, the capacitor 8 is placed as close to the element as possible in order to absorb surges from the DC bus.
（発明が解決しようとする課題）
しかしながら、第６図に示すように各１・ランジスタの
コレクタ側にヒューズを接続すると、そのための配線長
が長くなってインダクタンスＬがｄｊ
増加し、ターンオフ時のサージ電圧（Ｌ＝）が高くなっ
て素子の信頼性を低下させるという問題がある。(Problem to be Solved by the Invention) However, when a fuse is connected to the collector side of each transistor as shown in FIG. There is a problem in that the voltage (L=) increases and the reliability of the device decreases.
特に最近開発されているＩＧＢＴやＭＣＴ（ＭＯＳ
Ｃｏｎｔｒｏｌｌｅｄ Ｔｈｙｒｊｓｔｏｒ）などは、
スイッチング速度がバイポーラトランジスタの数倍高速
であるためにｄｉ／ｄｔも数倍（５〜６倍）高くなり、
その分だけサージ電圧が上昇して従来の回路方式は使用
できない。In particular, recently developed IGBT and MCT (MOS)
Controlled Thyrjstor) etc.
Since the switching speed is several times faster than that of a bipolar transistor, the di/dt is also several times higher (5 to 6 times).
The surge voltage increases accordingly, making conventional circuit methods unusable.
このため第７図に示すようなサージ電圧の吸収回路が用
いられてきている。For this reason, a surge voltage absorption circuit as shown in FIG. 7 has been used.
すなわち、配線インダクタンスＬａ， Ｌｂ， Ｌｅｔ
−４
ＬｄがそれぞれのＩ Ｇ Ｂ Ｔ７１． ７２の主回路
に存在するとき、コンデンサ９とダイオード１０によっ
てＩ Ｇ Ｂ Ｔ７１のコレクタ・エミツタ間のサージ
エネルギーをクランプし、抵抗１６を介してコンデンサ
２に放電し、またＩ Ｇ Ｂ Ｔ ７２に刻してもダイ
オード１１、コンデンサ］２によってサージエネルギー
をクランプし抵抗１５を介してコンデンサ２に放電する
。That is, the wiring inductance La, Lb, Let
-4 Ld is each IGBT71. When present in the main circuit of IGBT 72, the surge energy between the collector and emitter of IGBT 71 is clamped by capacitor 9 and diode 10, is discharged to capacitor 2 via resistor 16, and is also applied to IGBT 72. However, the surge energy is clamped by the diode 11 and the capacitor 2 and discharged to the capacitor 2 via the resistor 15.
しかし、この回路は、使用部品が多くなって複雑になる
こと、各素子ごとにサージクランプ回路を設ける必要が
あること、抵抗１５． １６にエネルギーの損失が発生
し効率が低下することなどの欠点がある。However, this circuit requires a large number of components and is complicated, requires a surge clamp circuit for each element, and resistors 15. 16 has drawbacks such as energy loss and reduced efficiency.
本発明は高速ヒューズを挿入することによるインダクタ
ンスの増加を抑制するため、高速ヒューズを省略し、高
速ヒューズによる事故電流の遮断はモジュール素子のボ
ンデインクワイヤの溶断を利用することにより、経済的
でサージ電圧の発生の少ないトランジスタブリッジ用の
モジュール素子を提供することを目的としている。The present invention eliminates the high-speed fuse in order to suppress the increase in inductance caused by inserting the high-speed fuse, and uses the melting of the bonded ink wire of the module element to cut off the fault current using the high-speed fuse, which is economical and prevents surges. The object of the present invention is to provide a module element for a transistor bridge that generates less voltage.
（発明を解決するための手段）
本発明は、密封された容器内に収容された半導体ベレッ
トと、該容器外に導出される電極端子を備えた電力用半
導体制御素子において、該半導体ペレットと該電極端子
間をワイヤーボンディングにより接続すると共に、該容
器を補強してその中に消弧剤を充填しモジュール素子を
構成する。(Means for Solving the Invention) The present invention provides a power semiconductor control element that includes a semiconductor pellet housed in a sealed container and an electrode terminal led out of the container. The electrode terminals are connected by wire bonding, and the container is reinforced and an arc extinguishing agent is filled therein to form a module element.
（作用）
モジュール素子に過電流が流れたとき、ボンディングワ
イヤの接続部が溶断しアークを出すが消弧剤により冷却
されてアークが消滅し事故電流がしゃ断される。また、
モジュール素子の破裂が防げるので破裂防止用の高速ヒ
ューズが省略でき、インバータブリッジの高速ヒューズ
配線によるインダクタンス分が減少しサージ電圧が著し
く低下する。(Function) When an overcurrent flows through the module element, the bonding wire connections melt and generate an arc, but are cooled by the arc extinguisher, extinguishing the arc, and cutting off the fault current. Also,
Since bursting of the module elements can be prevented, high-speed fuses for bursting prevention can be omitted, the inductance due to the high-speed fuse wiring of the inverter bridge is reduced, and the surge voltage is significantly reduced.
（実施例） 第１図に本発明によるモジュール素子の実施例を示す。(Example) FIG. 1 shows an embodiment of a module element according to the present invention.
第１図はモジュール素子の構成図で、第４図と重複する
部分には同一番号を付し説明を一部省略する。FIG. 1 is a block diagram of a module element, and parts that overlap with those in FIG. 4 are given the same numbers and some explanations are omitted.
１一ランジスタペレット８５のコレクタＣは銅＋１８２
に接着され、銅材８２からボンテインクワイヤ８６によ
りコレクタ電極８８にボンデイングし、コレクタ端子９
２として出力する。トランジスタペレット８５のエミッ
タＥからボンディングワイヤ８７により、エミッタ電極
８９に接続され、エミツタ端子９３として出力する。1- Collector C of transistor pellet 85 is copper +182
The copper material 82 is bonded to the collector electrode 88 by bonding wire 86, and the collector terminal 9
Output as 2. The emitter E of the transistor pellet 85 is connected to an emitter electrode 89 via a bonding wire 87 and output as an emitter terminal 93.
トランジスタペレット８５０ベースＢ（またはゲー１−
）はボンデインクワイヤ９１によりゲート電極９０に接
続しゲート端子９４として出力される。Transistor pellet 850 base B (or gate 1-
) is connected to the gate electrode 90 by a bonding wire 91 and output as a gate terminal 94.
モジュール素子は側面カバー９５と上面カハー９６で成
るケースにより覆われ、内部にば消弧剤９７が充填され
ている。The module element is covered with a case consisting of a side cover 95 and a top cover 96, and the inside is filled with arc extinguishing agent 97.
ボンディング部Ａ点は銅材８２に接続してあるので冷却
効果が良いが、ボンデインク部Ｂ点は１〜ランジスタペ
レット８５のエミッタＥ部に接続されているので冷却効
果が悪く、トランジスタ部が劣化したり、過大損失が発
生すると必ずＢ点付近でｉ容ー７
断が発生ずる。Ｂ点で溶断が発生しアークが出たとき周
囲の消弧剤９７により、アークが消弧され、事故電流が
しゃ断される。この時内部のガス圧が上昇するのでケー
スが破裂しないように補強されている。Since the bonding part A point is connected to the copper material 82, the cooling effect is good, but the bonding ink part B point is connected to the emitter E part of the transistor pellet 85, so the cooling effect is poor and the transistor part deteriorates. If excessive loss occurs, a break will always occur near point B. When melting occurs at point B and an arc is generated, the surrounding arc extinguishing agent 97 extinguishes the arc and interrupts the fault current. At this time, the internal gas pressure increases, so the case is reinforced to prevent it from bursting.
第２図にモジュール素子のケースの補強例を示す。通常
のケースでは、ガス圧のために側面カバーが膨らみ破裂
することもあるので第２図に示すように、側面カバー９
５に部分的に凸部ｄを設け補強すると同時に、上下部に
もｅ，ｆに示す突起を設けて上、下のケースにはめ込み
、側面カバーの膨れを防止する。FIG. 2 shows an example of reinforcing the case of a module element. In normal cases, the side cover may bulge and burst due to gas pressure, so as shown in Figure 2, the side cover 9
Convex portions d are partially provided on 5 for reinforcement, and at the same time, protrusions shown as e and f are also provided on the upper and lower parts to fit into the upper and lower cases to prevent the side cover from bulging.
また、側面カバーの破裂による飛散を防ぐため、ゴム製
のカバー９８で周囲を保護するこども併用できる。In addition, to prevent scattering due to bursting of the side cover, a rubber cover 98 can be used to protect the child's surroundings.
さらに、側面カバーの強度を増すため繊維（ガラス繊維
等）の混入キＡを用いることもできる。Furthermore, in order to increase the strength of the side cover, it is also possible to use a mixture A of fibers (glass fibers, etc.).
以上説明したように本発明によれるば、モジュール素子
の中央に位置するトランジスタ・エミ−８−
ッタのボンディンク部が最初に溶断することを利用して
、この周囲に充填した消弧剤によりアークを消弧して事
故電流をしゃ断し、この過程で発生するガス圧による破
裂を、ケースを補強することにより防止することができ
る。これにより、従来使用していた高速ヒューズを省略
することができ、経済的で小形のインバータブリッジを
構成することができる。また、ヒューズ配線に伴うイン
ダクタンス分が減少するのでスイッチング時のサージ電
圧（エネルギー）が減少し、サージ吸収回路の省略また
は小形化が可能となり高効率になると同時にサージ電圧
減少によりスイッチング素子の安全動作領域に対してマ
ージンが増加し、信頼性の高いインバータブリッジが構
成できるモジュール素子を提供することができる。As explained above, according to the present invention, by taking advantage of the fact that the bonding part of the transistor emitter located in the center of the module element melts first, the arc extinguisher filled around this By extinguishing the arc and cutting off the fault current, it is possible to prevent rupture due to the gas pressure generated in this process by reinforcing the case. This makes it possible to omit the conventionally used high-speed fuse, and to construct an economical and compact inverter bridge. In addition, since the inductance associated with fuse wiring is reduced, the surge voltage (energy) during switching is reduced, making it possible to omit or downsize the surge absorption circuit, resulting in high efficiency, and at the same time, the safe operating area of the switching element due to the reduction in surge voltage. It is possible to provide a module element that has an increased margin and can constitute a highly reliable inverter bridge.
第１図は本発明の実施例図、第２図は本発明の部分実施
例図、第３図，第６図，第７図は従来のモジュール素子
を用いたインバータブリッジの構成図、第４図，第５図
は一般的なモジュール素子の構成図、第８図は本発明に
よるモジュール素子を用いたインバータブリッジの一実
施例図である。
１・・・直流電源 ２，８．１２・・・コンデンサ
３，３１．３２・・・ヒューズ
４・・トランジスタブリッジ ５・・・電動機１５・・
・抵抗
７１． ７２・・・本発明によるモジュール素子８０・
・・銅ベース ８１・・・絶縁セラミックス８２
． ８３， ８４， ８８． ８９・・銅材８６， ８
７． ９１・・・ボンディングワイヤ９５． ９６・・
・カバー ９７・・・消弧剤９２， ９３． ９４
・・端子FIG. 1 is an embodiment of the present invention, FIG. 2 is a partial embodiment of the present invention, FIGS. 3, 6, and 7 are configuration diagrams of an inverter bridge using conventional module elements, and FIG. 5 is a block diagram of a general module element, and FIG. 8 is an embodiment of an inverter bridge using the module element according to the present invention. 1...DC power supply 2,8.12...Capacitor 3,31.32...Fuse 4...Transistor bridge 5...Motor 15...
・Resistance 71. 72... Module element 80 according to the present invention.
...Copper base 81...Insulating ceramics 82
．． 83, 84, 88. 89...Copper material 86, 8
7. 91...Bonding wire 95. 96...
・Cover 97... Arc extinguishing agent 92, 93. 94
・Terminal
Claims (1)
器外に導出される電極端子を備えた電力用半導体制御素
子において、該半導体ペレットと該電極端子間をワイヤ
ーボンディングにより接続すると共に、該容器内に消弧
剤を充填したことを特徴とするモジュール素子。In a power semiconductor control element comprising a semiconductor pellet housed in a sealed container and an electrode terminal led out from the container, the semiconductor pellet and the electrode terminal are connected by wire bonding, and the container A module element characterized by being filled with an arc extinguishing agent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008216A JP2677697B2 (en) | 1990-01-19 | 1990-01-19 | Module element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008216A JP2677697B2 (en) | 1990-01-19 | 1990-01-19 | Module element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03214657A true JPH03214657A (en) | 1991-09-19 |
| JP2677697B2 JP2677697B2 (en) | 1997-11-17 |
Family
ID=11687028
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008216A Expired - Lifetime JP2677697B2 (en) | 1990-01-19 | 1990-01-19 | Module element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2677697B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000183282A (en) * | 1998-12-21 | 2000-06-30 | Toshiba Corp | Device and module of semiconductor |
| DE10200372A1 (en) * | 2002-01-08 | 2003-07-24 | Siemens Ag | Power semiconductor module has one contact surface of semiconductor element contacting metallized structure via solder material and second contact surface contacting metallized structure via bonding wire |
| DE102005046063B3 (en) * | 2005-09-27 | 2007-03-15 | Semikron Elektronik Gmbh & Co. Kg | Semiconductor power module with excess current protection unit has fuse unit surrounded by explosion protection material connected across conductive tracks by narrower leads than power semiconductor |
| EP1768182A2 (en) * | 2005-09-27 | 2007-03-28 | Semikron Elektronik GmbH & Co. KG Patentabteilung | Semiconductor power module with overcurrent protection means |
| JP2013143910A (en) * | 2012-01-06 | 2013-07-22 | General Electric Co <Ge> | Adaptive power conversion system |
-
1990
- 1990-01-19 JP JP2008216A patent/JP2677697B2/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000183282A (en) * | 1998-12-21 | 2000-06-30 | Toshiba Corp | Device and module of semiconductor |
| DE10200372A1 (en) * | 2002-01-08 | 2003-07-24 | Siemens Ag | Power semiconductor module has one contact surface of semiconductor element contacting metallized structure via solder material and second contact surface contacting metallized structure via bonding wire |
| DE102005046063B3 (en) * | 2005-09-27 | 2007-03-15 | Semikron Elektronik Gmbh & Co. Kg | Semiconductor power module with excess current protection unit has fuse unit surrounded by explosion protection material connected across conductive tracks by narrower leads than power semiconductor |
| EP1768182A2 (en) * | 2005-09-27 | 2007-03-28 | Semikron Elektronik GmbH & Co. KG Patentabteilung | Semiconductor power module with overcurrent protection means |
| EP1768182A3 (en) * | 2005-09-27 | 2009-09-16 | Semikron Elektronik GmbH & Co. KG Patentabteilung | Semiconductor power module with overcurrent protection means |
| US8264071B2 (en) | 2005-09-27 | 2012-09-11 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with overcurrent protective device |
| JP2013143910A (en) * | 2012-01-06 | 2013-07-22 | General Electric Co <Ge> | Adaptive power conversion system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2677697B2 (en) | 1997-11-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5757599A (en) | Protection arrangement for a switching device | |
| JP6815524B2 (en) | Power converter | |
| JP6824422B2 (en) | Power converter | |
| JP2008235502A (en) | Resin-sealed semiconductor device | |
| US20090161277A1 (en) | Method and device for preventing damage to a semiconductor switch circuit during a failure | |
| JP6061029B2 (en) | Power converter | |
| US6147396A (en) | Power semiconductor module | |
| US6100745A (en) | Combination positive temperature coefficient resistor and metal-oxide semiconductor field-effect transistor devices | |
| JP3292614B2 (en) | Power module element | |
| JPH03214657A (en) | Module element | |
| JP6461264B1 (en) | Power converter | |
| JPH0354844B2 (en) | ||
| JP6479115B1 (en) | Power converter | |
| JP6395164B1 (en) | Power converter | |
| KR920001401B1 (en) | Semiconductor device | |
| KR102612691B1 (en) | Transient voltage suppression device with thermal blocking | |
| JP6869309B2 (en) | Power converter and power converter integrated rotary electric machine | |
| JPH1012806A (en) | Semiconductor device | |
| US20170338193A1 (en) | Power semiconductor module with short-circuit failure mode | |
| JP2005123516A (en) | Capacitor module having fuse function | |
| WO2018193581A1 (en) | Power conversion device | |
| JPH0378432A (en) | Protective circuit for transistor bridge | |
| JP2807297B2 (en) | Bridge circuit of semiconductor switch element | |
| JP3991581B2 (en) | SSR | |
| JP7218564B2 (en) | semiconductor equipment |