JPH03214289A - Data transfer device for ic card - Google Patents

Abstract

PURPOSE:To minimize the number of defective files by transmitting and receiving the data on a single transfer unit, fractionizing these data, and applying the check sum to the parts where the data are registered for each of fractionized blocks. CONSTITUTION:A data transmission/reception means 2 fractionizes the data on the transfer unit and performing the sum check for each of fractionized blocks to collectively transmit the data on each transfer unit. The sum check means 1a and 1b perform the sum check for the data on each transfer unit to be transmitted and received in each block and only in the registered sectors. Then the data on a single transfer unit is transmitted/received and at the same time fractionized, and the sum check is performed for each of fractionized blocks. At the same time, the sum check is performed only in the registered sectors. At a result, the transmission/reception response is improve and the number of defective files can be minimized.

Description

Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) The present invention relates to an IC card and a driver that is connected to the IC card in a contactless manner and that transmits and receives data between the IC card and the IC card. The present invention relates to a data transfer device for an IC card, which includes a device and transmits and receives data between the two.

(Prior Art) In recent years, IC cards have become widespread and are being used in various fields.

For example, in the field of machine tools, an IC card driver device is connected to an NC device that controls the servo control axes and various actuators of the machine tool, and data such as NC programs and graphic data stored in the IC card is transferred to the NC device. N
It has become common practice to operate the NC device by transferring the information to the C-system.

Here, IC cards are portable, easy to make and sell,
Moreover, it is possible to memorize confidential matters, so further development is desired.

By the way, in the conventional data transfer between an IC card and a driver device, one transfer unit (for example, 3 KB) of data is sent and received using a serial signal.In order to improve data reliability, A sum code is generated and a sum check is performed.

■Alternatively, the data after the transfer is read again and the data before and after the transfer is verified.

(Problem to be Solved by the Invention) However, in the conventional IC card data transfer device as described above, the number of files included in the method (2) is large because the unit of transfer is large. many,
If even one byte is missing, all files included in the transferred data must be interpreted as defective.

Further, in the method (2), since the verification is performed for each byte, for example, there is a problem that it takes a lot of processing time and the response is poor.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an IC card data transfer device that improves transmission and reception responses and can minimize file size.

[Structure of the Invention] (Means for Solving the Problems) The present invention for solving the above problems includes an IC card and an IC card.
A data transfer device for an IC card that includes a driver device that is connected to the card in a non-contact manner and that sends and receives data to and from the IC card, and that sends and receives data between the two. , a data transmitting/receiving means that performs a sum check on each subdivided block and transmits data in one transfer unit at once; The present invention is characterized by comprising a sum check means for performing the check.

(Operation) The IC card data transfer device of the present invention transmits and receives one transfer unit of data, subdivides the one transfer unit of data, and performs a sum check for each subdivided block. Furthermore, since this sum check is performed only on registered sectors, the transmission/reception response is high and the number of defective files can be minimized as much as possible.

(Example) Examples of the present invention will be described below.

FIG. 1 is a block diagram showing the overall configuration of an embodiment in which the present invention is applied to an NC device for controlling a machine tool.

The present invention relates to a non-contact type IC card 1 and a part of a driver (card reader/writer) that is magnetically coupled to the IC card 1 when the IC card 1 is inserted, and that transmits and receives data to and from the IC card 1. ) 2 and this driver part 2 is connected to the IC
A CPU board 3 that exchanges data such as NC data between the card 1 and the NC device f [(not shown);
It is comprised of a liquid crystal display 4a that displays directory data etc. read into the U-board 3, and a command output section 4 in which various command keys K1 to K6 are arranged. Here, the driver part 2, CPU board 3, and command output section 4 are collectively referred to as a driver device.

The IC card 1 internally includes a memory 1a and a sum check section 1b. The driver part 2 includes a RAM buffer 72a and a sum check section 2b. C.P.
U board 3 is buffer 3 for directory (DIR)
a, a read/write buffer 3b, and a data transfer buffer 3c used between an NC device (not shown).

FIG. 2 shows details of the storage devices of each section 1.2.3. The RAM buffer 2a of the driver part 2 has a page of 0 (D
i R section) Read/write area M1 and page 0 (DI
R section) comprises a sum check readout area M2, a data section (page n) read/write area M3, and a data section (page n) readout area M4 for sum check.

The memory 1a of the IC card has a storage area of, for example, 32 KB (128 sectors), and has a total of 4 pages from O page to 3 pages.
Of the page storage areas, sector 0 of page 0 is used for the system, sector 1 is used as the FAT (card size) section, sectors 2 and 3 are used as the PCB (file name block) section, and the following sectors are used as the data section. It is.

Each page of the memory 1a is divided into 32 sectors (sectors 0 to 31), as shown in detail in FIG. 2(B), and has a storage area of 256 bytes per sector.

The O sector of each page is a dummy sector, as shown in Figure 2 (C
), the 4-byte area indicated by the shaded area 5 is a system undefined area, and is an area for allowing for a delay in the completion of data transfer from the CPU board 3. Furthermore, an area of 3 bytes indicated by a hatched portion 6 is an area for detecting byte shift during data transfer.

Furthermore, from the 128th byte of sector 0, each sector 0
~31 checksum codes are stored. That is, the checksum code of sector 0 is stored in the 128th byte, and the checksum code of sectors 1 to 3, that is, the checksum code of the directory data, is stored in bytes 129 to 131 surrounded by number 7 in the figure. ing.

Note that the 0 sector of each page includes the first 4
Since there is a byte indeterminate area 5 and a byte shift detection area 6, the checksum value of the 0 sector is the total value from the 8th byte to the 256th byte counting from the 0 byte.

FIG. 4(a) is an explanatory diagram of the writing procedure.

In the figure, the write process is executed in the order of ■ to [stock].

(2) First, page 0 of IC,/17-dore 1 is read into OOOH-IFFFH of RAM buffer y2a.

■ Check the sum of 0 pages and check the calculated check sum of sectors 0 to 31.

If the checksum verification does not match, and if the FAT sections do not match, a message indicating that the card is defective is output, and FF}I is written in each of the FAT sections for one sector. Further, when the valid data sectors do not match, a predetermined area of the corresponding FCB section is rewritten to FF (H).

■ On the other hand, when the checksum comparison is a match, the DIR part is DiR from the page 0 data on the RAM buffer 2a.
The data is read into the buffer 3a and stored in an area for use by the application.

(2) Read page n (for example, n-3) in which the sector to be written to card 1 exists from DiR buffer 3a into area M3 of RAM buffer 2a.

(2) Verifying the checksum in sector O of page n Verify the checksum in sector O of page n with the calculated checksum of sectors 0 to 31. If the checksum verification does not match, repeat the same operation from ■. If the valid data sectors do not match even after checking three times, the next 20H of the file type in the corresponding FCB section (file name block) is rewritten to FFH. When the corresponding sector is empty data, the next empty sector is searched from the DiR section. If the page changes, repeat the process from ■. If veg n is 0, a card defect message is output and the F for 1 sector is output.
Write FFH and FFH to the AT section.

(2) Receive data from the transfer buffer 3C to the read/write buffer 3b via RS-232C.

When 2 5 6 bytes or up to the END of one program is received, code conversion is performed and a checksum is generated as data for one sector. When receiving data from RS-2320, RTS is not turned off for each byte.

■ To the corresponding part on RAM buffer y2a, 256 bytes
Write the data. When the next write sector exists on the same page, repeat the process from ①.

■ There are no more empty sectors (data write sectors) on the RAM buffer 2a of page n, or the EN of one program
When D arrives, the data of page n on RAM buffer 2a is written to the corresponding one of card 1. The checksum of each sector is written to the specified position of the 0 sector.

■ The page n data written to card l is transferred to RAM.
Read into buffer y2a from 6000H to 7FFFH″F.

■ Verify the checksum of sectors 0 to 31 of the read data (page n). If the checksum comparison does not match, repeat the same operation from ■. If there is a mismatch even after checking three times, if the sector currently being received or written is mismatched, a "Force write error" message is output and FF (H), FF (
H), but do not update part of the directory. Also, when the valid data sector (outside the currently written sector) does not match, the next 20
Rewrite H to FFH. If page n is page 0, the same process as ■ is also included. If it is not the end of one program, repeat the process from ①.

The data in the QDIR buffer 3a is updated and a checksum is generated.

The data in QDIR buffer y3a is transferred to RAM buffer 2.
Return to the specified position in area M1 of a. The checksum of the corresponding sector is also returned to the specified position.

■ Write data in RAM buffer 2a area M1 to page O of the card.

(2) Read the page 0 data written to the card into area M2 of the RAM buffer 2a.

[Stock] Verify the checksum of sectors 0 to 31 of the read page (page 0). If the checksum comparison does not match, repeat the same operation from ■. If there is no mismatch even after checking three times, the processing for the case of mismatch (2) is executed when the data portions do not match, and when the DIR buffer 3a is mismatched, the same processing as for the case of no match (2) is performed.

FIG. 4(a) shows a flow chart of a specific example of the write process.

FIG. 5(a) is an explanatory diagram of the reading procedure. In the figure, the reading process is executed in the order of ■ to ■.

■ From page 0, transfer 8KB including the DiR section from card 1 to RAM buffer 2a (0000H~1.F F
H).

■ Verify the check sum in the sector in page O. The sum check in sector 0 (for θ to 31 sectors) is compared with the calculated checksum of sectors 0 to 31.

If the checksum comparison does not match, repeat the same operation from ■. If there is no match after checking three times, F
When the AT part and the DiR part do not match, a card defect message is output and FFHS is written in the first sector 00H to OIH.
Write FFH. Furthermore, when the valid data sectors do not match, the corresponding area of the corresponding FCB part (file name block) is rewritten to FF (H).

■ From the data of PADE 0 on RAM buffer 2a, D
Reads the IR section (FAT and PCB) and stores it in an area for use by the application.

■ PCB of the program to be sent from the DiR section
Check whether the program data is defective. If the content written in the predetermined area is FF (H), it is defective. In this case, a defective message will be output.

■ The DiR unit transfers the page n (for example, n-3) in which the sector to be sent exists to the RAM buffer 2a (
4000H to 5FFFH).

■ Verify the checksum of the sector. If the checksum does not match, repeat the operation from ■. If there is a mismatch even after checking three times, a defective message will be output and the corresponding FCB section (file name block)
Rewrite the next 20H of the file type to FFH.

■ Extract data to the conversion buffer.

■ Converts code and sends data via RS-232C. If the next sending data exists on the same page, ■
Repeat the process from step 2, and if the next sector exists on another page, repeat the process from step 1.

FIGS. 5(b), 5(c), and 5(d) show specific flowcharts of the order during reading.

As mentioned above, in this example, the transfer unit of 8KB is 256
Divide into bytes and perform checksum on each byte. In addition, only the registered sector (256 bytes) is checked.

Therefore, it is possible to minimize the occurrence of bad files, and since only the registered sectors are checked, the processing time is fast, and since the registered sectors are checked, it is possible to detect file defects before actually reading them. .

In addition, error detection is performed using a method similar to the method used to quickly detect miscalculations by making good use of subtotals when performing table calculations, so it is particularly effective for short pages that are not full. .

In the above embodiment, the memory of the IC card is 8 KB, but the same applies even if the memory is 128 KB. Furthermore, although the block size is set to 256 bytes, this unit is not limited to this.

[Effects of the Invention] As described above, the IC card data transfer device of the present invention transmits and receives one transfer unit of data, subdivides the one unit of data, and registers data for each subdivided block. Since the checksum is performed only on the portions that have been deleted, the response of sending and receiving is high, and the number of bad files can be minimized as much as possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an IC card data transfer device showing an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of the storage device, and FIG. 3 is a block diagram of the IC card memory configuration. Explanatory diagram, Figure 4 (a), (b)
, (c) is an explanatory diagram of the writing process, and Fig. 5 (a) is an explanatory diagram of the writing process.
), (b), (.C), (d
) is an explanatory diagram of the reading process. 1...IC card 2...part of the driver 3...CPU board]. b, 2b...Checksum section

Claims (1)

[Claims] (1) An IC card data transfer device that includes an IC card and a driver device that is connected to the IC card in a non-contact manner and that transmits and receives data between the two. , a data transmitting/receiving means for dividing data in a transfer unit into pieces and transmitting data in one transfer unit at once by performing a sum check for each subdivided block; 1. A data transfer device for an IC card, comprising a sum check means for performing a sum check only on registered sectors in block units.