JPH03211684A - Pattern discrimination device - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention captures an image of a target pattern and converts it into binarized data, and then imports it into an image memory, and then reads it out to create a window image that is read out from the window pattern memory. The present invention relates to a pattern discrimination device that extracts feature quantities by superimposing them on a pattern, and discriminates a target pattern from the feature quantities.

[Conventional technology]

Conventionally, in a pattern discrimination device, after capturing an image of a target pattern with a television camera and binarizing the data obtained,
Once captured in the image memory, 2 in the image memory
By detecting the position of the target pattern as digitized data by a position detection circuit, the subtle positional deviation of the target pattern is known, and the position of the wind pattern read out from the wind pattern memory is corrected according to the positional deviation data. , extracting the feature amount of the target pattern by superimposing it on the target pattern read from the image memory,
Pattern discrimination was performed from the feature values.

At that time, the operation within the device is performed in synchronization with the vertical synchronization signal (hereinafter sometimes referred to as ■ synchronization or ■ synchronization signal) of the television signal in the television camera that images the target pattern, and the image of the captured data is import into memory,
Detection of the position of the target pattern in the image memory, extraction of feature quantities, etc. were performed.

This is because the circuit configuration can be simplified by operating in synchronization with a single synchronizing signal called the V synchronizing signal (one cycle is 16.7 m, s).

[Problem B to be solved by the invention] In the conventional technology, (1) importing image data into an image memory in synchronization with a synchronization signal and detecting the amount of position correction;

Image feature values are extracted, and the image feature values are extracted while reading out binarized image data from the image memory in synchronization with the V synchronization signal. 3 ■ Synchronization signal = 16.7 x 3 m until the extraction of image features is completed
s, and during this time the next image data cannot be imported due to the hardware, so the time required for the determination is:
16.7 X 3 =50, which could not be shortened to 1 ms or less.

In addition, when extracting image features, features are extracted while reading out the entire binarized image in the image memory in synchronization with V synchronization, so even if the predetermined window area is small,
This method requires a synchronization period (16.7 m s), and even if the detection of the position correction amount is completed in a short time, there is a problem in that it is necessary to wait until the next synchronization signal at which feature extraction begins.

In recent years, there has been a demand for high-speed pattern discrimination, and there is a limit to how fast the above technology can increase the speed.

An object of the present invention is to provide a pattern discrimination device that is free from the above-mentioned limitations and can discriminate patterns at high speed.

[Means to solve the problem]

In order to achieve the above object, the present invention has two systems of image memory, switching means for switching between them, and two systems of position detection circuits, and in extracting image features, (1) extracts features without synchronizing with a synchronization signal; Only the binarized image within the desired predetermined area is read out from the image memory and features are extracted.

[Effect]

By taking the above measures, the time required for the determination process is "image capture time (16,7ms) + detection time of ten position correction amount + image readout time in a predetermined area from which features are to be extracted + determination based on the extracted feature amount" 3) synchronization = 50.1 ms or less.

In addition, by having two systems of image memory and position detection circuit, while detecting the position correction amount, extracting the feature amount, and making a judgment based on the feature amount for the image data read from one image memory, It became possible to import image data into one of the image memories, and the shortest determination interval was 16.7 ms.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, 1 is a TV camera, 2 is a binarization circuit, and 3 is a synchronization signal (horizontal and vertical synchronization signals synchronized with the TV camera).
4 is an image memory changeover switch, 5 and 7 are address generation circuits, 6.8 are image memories, 9 and 10 are position detection circuits, 11 is a window pattern memory, 13 is a feature extraction circuit, 14 is CPU
, 15 is the bus, 18 is the target pattern, 16 is the l system, 1
7 is from another system.

The basic operation of the pattern discrimination device shown in FIG. 1 is as follows.

The image signal from the TV camera 1 is converted into 2 by the binarization circuit 2.
After being converted into a value, it is stored as pattern data in the image memory 6° or 8 selected by the changeover switch 4 in accordance with a command from the CPU 4 in synchronization with the vertical synchronization signal from the synchronization signal generation circuit 3.

At this time, the address generation circuit 5 or 7 of the selected image memory generates a write address in synchronization with the vertical synchronization signal from the synchronization signal generation circuit 3, and scans the selected image memory 6 or 8.

After the image data has been stored in the image memory, the projection data of a predetermined area in the image memory is extracted by the position detection circuit 9 or step 0 according to the command of CP[J14. , detect a slight shift in the pattern position, and then calculate the position correction amount. At this time, the address generation circuit 5 or 7 generates a read address for a predetermined area without synchronizing with the synchronization signal generation circuit 3 according to a command from the CPU 4, and reads the image memory 6 or 8 in which image data is stored. scan.

After the position detection is completed, the address generation circuit 5 or 7 asynchronously reads out the image of only a predetermined area whose position has been corrected for extracting features from the image memory 6 or 8 where the image is stored, generates an address, and scans the image. Then, it is partially read out, and the feature amount extraction circuit 13 compares it with the window pattern in the window pattern memory 11 to extract the feature amount. The extracted feature quantities are sent to the CPU via the bus 15.
14, and the target pattern is determined.

Initially, if the changeover switch 4 is connected to the a side and the image data is loaded into the image memory 6, the end timing of the loading can be determined by the address generation circuit 5 that generates the write address, so the CPU 14 , the timing is notified from the address generation circuit 5, and the changeover switch 4 is then switched to the b side so that the image data is now taken into the image memory 7.

While the image data is being loaded into the image memory 7 in this way, in parallel, position detection, feature quantity extraction, etc. are performed on the image memory 6 into which the image data was previously loaded.

FIG. 2 is an explanatory diagram showing a feature amount extraction method in the feature amount extraction circuit 13.

As shown in the figure, in order to retrieve the region C from which the feature of the target pattern is to be extracted from the image memory 6 or 8, the CPU 4 sends the address generation circuit 5 or 7 the coordinates (X ,,Y,) and width (Xa
, Ya), and only this area C is read out by generating read addresses in synchronous and asynchronous manners.

At this time, by correcting the coordinates (x+, y,) of the start point using the correction amount detected by the position detection circuit,
Appropriate region extraction is possible. For this read partial image (extraction area C), the feature extraction processing unit 3 extracts the window pattern D from the window pattern memory 11.
The feature amount (for example, area) within the window pattern D is extracted by superimposing the window pattern D and performing a logical product.

FIG. 3 is a chart showing the flow and timing of the operation of the embodiment shown in FIG.

First, the image is stored in image memory A in synchronization,
Next, the position detection circuit A detects the position correction lid, extracts the features, and performs determination processing by the CPU according to the extracted features. At this time, when the storage in the image memory A is completed, by switching the image memory changeover switch, the image is stored in the image memory B in parallel with the processing after position detection. Storage of images in image memory B is also performed in synchronization with V synchronization. The processing after storage is also the same as the processing for the image in image memory A.

However, position detection circuit B operates for position detection. After the image is stored, the above operations are performed alternately by switching the image memory changeover switch according to a command from the CPU. Here, the determination is a software process by the CPU, and the rest is a hardware process.

〔Effect of the invention〕

According to the present invention, position detection is performed asynchronously with the synchronization signal.
Feature extraction processing is possible, and during feature extraction, partial reading of the image is performed, and by having two systems of image memory units, the determination interval can be as short as 16.7 m.
It has become possible to shorten the time to 1/3 of the conventional one, making it possible to perform high-speed determination.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an explanatory diagram of a method for extracting features by extracting a partial area of an image, and Fig. 3 is an illustration of the operation of the embodiment of the present invention. This is a time chart showing the flow. Explanation of symbols 2...Binarization circuit, 3...Synchronization signal generation circuit, 4.
...Selector switch, 5, 7...Address generation circuit, 6
゜8... Image memory, 9.10... Position detection circuit,
11... Window pattern memory, 13... Feature amount extraction circuit, 14... CPU

Claims (1)

[Claims] 1) A binarization circuit that binarizes data obtained by imaging a target pattern, an image memory that captures and stores the binarized data, and the binarized data in the image memory. a position detection circuit for detecting the position of a target pattern, a window pattern memory, and a position detection circuit for correcting the position of the window pattern read from the window pattern memory according to the position data of the target pattern detected by the position detection circuit; , a feature amount extraction circuit that extracts the feature amount of the target pattern by superimposing it on the target pattern read from the image memory, wherein at least two systems of the image memory are provided, While the binarized data is being imported into the image memory belonging to the first system, the previously imported image data is read out from the image memory belonging to the second system, and position detection and feature extraction are performed. Binarized data is imported into the image memory belonging to the second system, and in the meantime, the previously imported image data is read out from the image memory belonging to the first system, and position detection and feature extraction are performed. . A pattern discriminating device comprising operation switching control means for alternately repeating operations between the first system and the second system.