JPH0321063A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize further greater capacity by forming an adjacent word line on a CVD oxide film provided on a field oxide film formed by thermal oxidation. CONSTITUTION:A CVD oxide film 14 is formed between an adjacent word line 4b and a field oxide film 2. Namely, the CVD oxide film 14 is formed more thickly between the word line 4b and the field oxide film 2 where a stacked capacitor is extended and formed. Accordingly, even though the occupied area of a memory capacitor in plan view is not expanded, the stepped portion of the stacked capacitor cell is increased corresponding to a thicker fraction of the film 14 formed under the word line 4b. Thus, a large area is assured to increase the capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device having a stacked capacitor type cell.

2. Description of the Related Art In recent years, the capacity of semiconductor memory devices has been increasing due to miniaturization and higher density integration of semiconductor devices. Therefore, stacked capacitor type cells are currently being proposed.

FIG. 3 shows a cross-sectional view of a dynamic semiconductor device having a conventional stacked capacitor type cell. In FIG. 3, 1 is a silicon substrate, 2 is a field oxide film formed by thermal oxidation, 3a and 3b are gate oxide films,
4a and 4b are word lines made of a first-layer polycrystalline silicon film; 13 is a side wall; 12a and 12b are n+ type diffusion regions that become sources and drains; 5 is an interlayer insulating film;
6 is a dielectric film of a stacked capacitor consisting of a second layer of polycrystalline silicon film, 7 is a capacitive insulating film, 8 is a stacked capacitor electrode consisting of a third layer of polycrystalline silicon film, 9 is an M-interval insulating film, and 10 is a An interlayer insulating film made of poronphosphosilicate glass, and reference numeral 11 indicate a bit line made of a polycide film.

Problems to be Solved by the Invention The semiconductor device having the stacked capacitor type memory cell described above achieves a large capacitance of the memory cell capacitor by effectively utilizing the space on adjacent word lines, so it is possible to achieve a short channel. If malfunctions due to hot electrons and hot holes caused by oxidation can be prevented, or if it is possible to further increase the capacity without expanding the area occupied by the memory capacitor in terms of plane, it is possible to achieve higher density and higher integration. Needless to say, it will be even more advantageous if you do so.

The present invention is intended to solve the above-mentioned conventional problems, and an object of the present invention is to provide a semiconductor device that can realize an even larger capacity.

Means for Solving the Problems In order to achieve the above object, the present invention provides a plurality of word lines, a plurality of bit lines arranged to intersect with the plurality of word lines, and an intersection between the word lines and the bit lines. The capacitor of the memory cell is in contact with the source or drain region of the transistor of the memory cell, and is connected to the gate portion of the transistor through an insulating film. a dielectric film on a first electrode extending over an adjacent word line portion and a second electrode on the dielectric film, forming a CUD oxide film between the adjacent word line and a field oxide film; It is characterized by

According to the above-described means, the CUD oxide film is thickly formed between the word line on which the stacked capacitor is formed and the field oxide film, so that the area occupied by the memory capacitor in the plane is expanded. Even if the CUD oxide film formed under the word line is thicker, the height difference of the stacked capacitor cell increases, and the area becomes larger and the capacitance increases.

Embodiment 3 4 FIG. 1 is a sectional view showing a first embodiment of the semiconductor device of the present invention.

In FIG. 1, 1 is a silicon substrate, 2 is a field oxide film formed by thermal oxidation, 3a and 3b are gate oxide films, 4a and 4b are word lines formed from the l-th layer polycrystalline silicon film, and 5 is an interlayer An insulating film, 6 is a dielectric film of a stacked capacitor from the second layer polycrystalline silicon film, 7 is a capacitive insulating film, 8 is a stacked capacitor electrode consisting of the third layer polycrystalline silicon film, 9 is interlayer insulation 10 is an interlayer insulating film made of boron phosphosilicate glass, 1l is a bit line made of polycide film, 12a and 12b are n-type diffusion regions which become sources and drains, 13 is a side wall, 1
4 indicates a CUD oxide film. At this time, by setting the thickness of the CUD oxide film to 200 nm, the step of the stacked cell is increased and the cell area is increased.

FIG. 2 is a sectional view showing a second embodiment of the semiconductor device of the present invention.

In FIG. 2, 1 is a silicon substrate, 2 is a field oxide film formed by thermal oxidation, 3a and 3b are gate oxide films, 4a and 4b are word lines made of the first layer polycrystalline silicon film, and 5 is an interlayer insulating film. , 6 is a dielectric film of a certain stacked capacitor made from a second layer polycrystalline silicon film, 7 is a capacitive insulating film, 8 is a stacked capacitor electrode made from a third layer polycrystalline silicon film, 9 is an interlayer insulating film, 10 is an interlayer insulating film made of borophosphosilicate glass, 11 is a bit line formed from a polycide film, 12a and 12b are n+ type diffusion regions serving as sources and drains, and 13 is a sidewall. 14
indicates a CUD oxide film. At this time, the thickness of the CUD oxide film is 200 nm, and the dielectric film 6 of the stacked capacitor consisting of the second layer polycrystalline silicon film is made to cover the adjacent word line 4b so that the end of the capacitor electrode is on the field oxide film. By arranging the cell area so as to extend up to 1000 nm, it is possible to further increase the cell area compared to the first embodiment.

By using the above method, it is possible to substantially increase the area of the stacked capacitor, that is, increase the capacitance, without increasing the planar area.

Effects of the Invention By using the semiconductor device according to the present invention, it is possible to substantially increase the area of the star socket capacitor, that is, increase the capacity, without increasing the area seen in a plan view.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the invention, FIG. 2 is a sectional view showing a semiconductor device according to a second embodiment of the invention, and FIG. 3 is a sectional view showing a conventional semiconductor device. FIG. 1...Silicon substrate, 2...Field oxide film formed by thermal oxidation, 3a, 3b...
・Gate oxide film, 4a, 4b...word line, 5
......Interlayer insulating film, 6...Stacked capacitor electrode, 7...Capacitive insulating film, 8...
...Stacked capacitor electrode, 9...Interlayer insulating film, 10...Interlayer insulating film, 11...
Bisotho line, 12a, 12b... Diffusion layer region, 1
3...Side wall, 14...CU
D oxide film. 7

Claims (2)

[Claims] (1) A plurality of word lines, a plurality of bit lines arranged to intersect with the plural word lines, and one transistor and one capacitor type memory cell provided at the intersection of the word lines and the bit lines. the capacitor of the memory cell has a dielectric material on a first electrode that is in contact with the source or drain region of the transistor of the memory cell and extends over the gate portion of the transistor and the adjacent word line via an insulating film; and a second electrode on the dielectric film, and the adjacent word line is formed on a CUD oxide film provided on a field oxide film formed by thermal oxidation. Semiconductor equipment. (2) The semiconductor device according to claim 1, wherein the CUD oxide film provided on the field oxide film has a thickness of 100 nm or more.