JPH03208366A - Structure of hybrid integrated circuit part - Google Patents
Structure of hybrid integrated circuit partInfo
- Publication number
- JPH03208366A JPH03208366A JP310590A JP310590A JPH03208366A JP H03208366 A JPH03208366 A JP H03208366A JP 310590 A JP310590 A JP 310590A JP 310590 A JP310590 A JP 310590A JP H03208366 A JPH03208366 A JP H03208366A
- Authority
- JP
- Japan
- Prior art keywords
- opening
- noise
- composite
- substrate
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 239000002131 composite material Substances 0.000 claims description 30
- 239000003990 capacitor Substances 0.000 claims description 9
- 239000000696 magnetic material Substances 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 6
- 238000010030 laminating Methods 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 2
- 238000005476 soldering Methods 0.000 abstract description 2
- 150000001875 compounds Chemical class 0.000 abstract 2
- 230000005855 radiation Effects 0.000 description 12
- 230000002093 peripheral effect Effects 0.000 description 5
- 230000007257 malfunction Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
Landscapes
- Coils Or Transformers For Communication (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、磁性体と導体との積層構造により形成された
複合インダクタからなる単一基板、もしくは複合インダ
クタと複合コンデンサあるいは複合抵抗の少なくともい
ずれかとを重畳した複合基板を備えた混成集積回路部品
の構造に関する。Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a single substrate comprising a composite inductor formed by a laminated structure of a magnetic material and a conductor, or at least one of a composite inductor, a composite capacitor, or a composite resistor. The present invention relates to the structure of a hybrid integrated circuit component having a composite substrate with overlapping edges.
(従来の技術)
第4図はこの種の従来の混成集積回路部品を示す断面図
であり、磁性体lとコイル用導体2とを印刷法等により
積層して複数のインダクタを形成した複合インダクタ3
(なお、複合インダクタl内にトランスを構成する場合
もあるか、本明細書においては、インダクタで代表させ
、トランスについての説明を省略する)と、誘電体4と
電極用導体5とを印刷法等により積層して複数のコンデ
ンサを構成した複合コンデンサ6とを重畳し、この重畳
体を一体化基板として用い、該基板上にトランジスタ、
ICあるいはチップ抵抗等の1個以上の電子部品7A、
7Bを搭載してなる。8は積層体の側面に形成した導体
でなる端子電極であり、内蔵するインダクタやコンデン
サあるいは電子部品7A、7Bとの間を接続すると共に
、所定の端子電極8かマザー基板(図示せず)に半田付
けされる。9は電子部品7A、7Bの端子lOと前記端
子電極8等とを接続する導体パターンである。(Prior Art) FIG. 4 is a cross-sectional view showing this type of conventional hybrid integrated circuit component, which is a composite inductor in which a plurality of inductors are formed by laminating a magnetic material 1 and a coil conductor 2 by a printing method or the like. 3
(Although a transformer may be configured within the composite inductor 1, in this specification, the inductor is used as a representative, and the description of the transformer is omitted.) The dielectric material 4 and the electrode conductor 5 are formed by a printing method. A composite capacitor 6 which is laminated to form a plurality of capacitors is superimposed, and this superimposed body is used as an integrated substrate, and a transistor and a transistor are placed on the substrate.
one or more electronic components 7A, such as an IC or chip resistor;
It will be equipped with 7B. Reference numeral 8 denotes a terminal electrode made of a conductor formed on the side surface of the laminate, which connects the built-in inductor, capacitor, or electronic components 7A, 7B, and connects the predetermined terminal electrode 8 to the motherboard (not shown). be soldered. Reference numeral 9 denotes a conductor pattern connecting the terminals 10 of the electronic components 7A and 7B to the terminal electrodes 8 and the like.
(発明か解決しようとする問題点)
このような混成集積回路部品においては、電子部品7A
または7Bがスイッチング素子等のように、放射ノイズ
を発生するものである場合、その放射ノイズが周辺部品
へ伝わり、周辺回路の誤動作あるいは信号の乱れ等の原
因となる。このような放射ノイズを発生させる電子部品
を有するものにおいては、原因となる素子および回路に
シールドケースを被せるか、あるいは周辺回路から距離
をとって配置する等の対策をとっているか2回路部体の
大型化を招来するという問題点がある。(Problem to be solved by the invention) In such hybrid integrated circuit components, the electronic component 7A
Alternatively, if 7B is something that generates radiation noise, such as a switching element, the radiation noise will be transmitted to peripheral components, causing malfunctions in peripheral circuits or signal disturbances. For products that have electronic components that generate such radiation noise, take measures such as covering the causing elements and circuits with a shielding case, or placing them at a distance from surrounding circuits. There is a problem in that it leads to an increase in size.
本光明は、上述した問題点に鑑み、放射ノイズの周辺回
路への影響を極力少なくした混成集積回路部品の構造を
提供することを目的とする。In view of the above-mentioned problems, it is an object of the present invention to provide a structure of a hybrid integrated circuit component that minimizes the influence of radiation noise on peripheral circuits.
(問題点を解決するための手段)
上記の目的を達成するため、本発明は、磁性体と導体と
の積層構造により形成された複合インダクタからなる単
一基板、もしくは複合インダクタと複合コンデンサある
いは複合抵抗の少なくともいずれかとを重畳した複合基
板を備えた混成集積回路部品において、前記基板を厚み
方向に貫通する開口部を設け、該開口部内に放射ノイズ
を発生する電子部品を収容し、前記開口部の内径部に沿
って放射ノイズをシールドするショートリングを設けた
ことを特徴とする。(Means for Solving the Problems) In order to achieve the above object, the present invention provides a single substrate consisting of a composite inductor formed by a laminated structure of a magnetic material and a conductor, or a composite inductor and a composite capacitor, or a composite inductor and a composite capacitor. A hybrid integrated circuit component including a composite substrate on which at least one of the resistors is superimposed, an opening passing through the substrate in the thickness direction, an electronic component that generates radiated noise accommodated in the opening, and the opening A short ring is provided along the inner diameter of the sensor to shield radiation noise.
(作用)
本発明は、上述の構造を有するので、開口部に収容され
た電子部品で発生する放射ノイズは、ショートリングで
電流に変換され、熱消費される。(Function) Since the present invention has the above-described structure, the radiation noise generated by the electronic component housed in the opening is converted into current by the short ring and heat is consumed.
(実施例)
第1図は本発明による混成集積回路部品の構造の一実施
例を示す断面図、第2図は該実施例の平面図である。第
1図および第2図において、11はマザー基板であり、
該マザー基板ll上に放射ノイズを発生させるトランジ
スタ等の電子部品7か、その端子lOを、マザー基板1
1上に形成した導体パターン12に固着して取付けられ
る。複合インダクタ3には、はぼ中央部に、厚み方向に
貫通した開口部13を設け、該開口部13内に前記電子
部品7を収容し、複合インダクタ3でなる基板の側面の
端子電極8の所定のものを導体パターン12に半田付は
等により固着する。また、開口部13の内径部に、積層
構造で導体を印刷するかシート状の導体を積層する等の
方法でショートリング14を形成する。(Embodiment) FIG. 1 is a sectional view showing an embodiment of the structure of a hybrid integrated circuit component according to the present invention, and FIG. 2 is a plan view of the embodiment. In FIGS. 1 and 2, 11 is a motherboard;
An electronic component 7 such as a transistor that generates radiation noise on the mother board 11 or its terminal 10 is connected to the mother board 1.
It is fixedly attached to a conductor pattern 12 formed on the conductor pattern 1. The composite inductor 3 is provided with an opening 13 penetrating in the thickness direction at the center thereof, the electronic component 7 is accommodated in the opening 13, and the terminal electrode 8 on the side surface of the substrate made of the composite inductor 3 is provided. A predetermined material is fixed to the conductive pattern 12 by soldering or the like. Further, the short ring 14 is formed on the inner diameter portion of the opening 13 by printing a conductor in a laminated structure or laminating sheet-like conductors.
このような構造とすることにより、電子部品7で放射さ
れるノイズは、ショートリング14に還流する電流に変
換され、熱消費される。With this structure, noise emitted by the electronic component 7 is converted into a current flowing back to the short ring 14, and heat is consumed.
また、本発明において、複合インダクタ3てなる基板上
に放射ノイズを実質的に発生しない電子部品を搭載して
も良いが1本実施例のように、電子部品7を開口部13
内に収容するものだけとする構成においては、部品全体
の厚みTは、複合インダクタ3の厚みのみとなり、薄型
化が達成される。Further, in the present invention, an electronic component that does not substantially generate radiation noise may be mounted on the substrate consisting of the composite inductor 3;
In the configuration in which only the components housed within the composite inductor 3, the thickness T of the entire component is only the thickness of the composite inductor 3, and a reduction in thickness is achieved.
第3図は本発明の他の実施例であり、複合インダクタ3
に複合コンデンサ6を一体に重畳させたものに前記実施
例と同様に開口部13を設け、該開口部13に放射ノイ
ズを発生させる電子部品7を収容したものである。また
5本実施例においては、電子部品7の端子lOは、マザ
ー基板1141の導体パターン12ではなく、積層体で
なる基板上に形成した導体パターン9に半田付けしてい
る。FIG. 3 shows another embodiment of the present invention, in which a composite inductor 3
A composite capacitor 6 is integrally superimposed on a composite capacitor 6, and an opening 13 is provided in the same way as in the previous embodiment, and an electronic component 7 that generates radiation noise is housed in the opening 13. Furthermore, in this embodiment, the terminal IO of the electronic component 7 is soldered not to the conductor pattern 12 of the motherboard 1141 but to the conductor pattern 9 formed on the board made of a laminate.
本発明は、上記実施例以外に、複合インダクタ3に複合
抵抗を重畳したもの、あるいは第3図の積層体にさらに
複合抵抗を重畳したものにも適用できる。In addition to the embodiments described above, the present invention can also be applied to a composite inductor 3 with a composite resistor superimposed thereon, or a composite resistor further superimposed on the laminate shown in FIG.
(発明の効果)
本発明によれば、積層体でなる基板を厚み方向に貫通す
る開口部を設け、該開口部内に放射ノイズを発生する電
子部品を収容し、前記開口部の内径部に沿って放射ノイ
ズをシールドするショートリングを設けたので、放射ノ
イズの周辺部品への伝達が阻止され、回路の誤動作ある
いは信号の乱れ等が防止される。また、従来のようにシ
ールドケースを被せるか、あるいは周辺回路から距離を
とる等の対策をとる場合に比較し、本発明によれば、積
層体と一体にショートリングを設けることかできるので
、回路全体の小型化か達成できる。(Effects of the Invention) According to the present invention, an opening is provided that penetrates a substrate made of a laminate in the thickness direction, an electronic component that generates radiation noise is housed in the opening, and a Since the short ring is provided to shield radiation noise, transmission of radiation noise to peripheral components is prevented, and circuit malfunctions and signal disturbances are prevented. Furthermore, compared to conventional measures such as covering with a shield case or keeping a distance from peripheral circuits, according to the present invention, a short ring can be provided integrally with the laminate, so the circuit Overall miniaturization can be achieved.
第1図は本発明による混成集積回路部品の一実施例を示
す断面図、第2図は該実施例の平面図。
第3図は本発明の他の実施例を示す断面図、第4図は従
来の混成集積回路部品の構造を示す断面図である。FIG. 1 is a sectional view showing an embodiment of a hybrid integrated circuit component according to the present invention, and FIG. 2 is a plan view of the embodiment. FIG. 3 is a sectional view showing another embodiment of the present invention, and FIG. 4 is a sectional view showing the structure of a conventional hybrid integrated circuit component.
Claims (1)
ダクタからなる単一基板、もしくは複合インダクタと複
合コンデンサあるいは複合抵抗の少なくともいずれかと
を重畳した複合基板を備えた混成集積回路部品において
、前記基板を厚み方向に貫通する開口部を設け、該開口
部内に放射ノイズを発生する電子部品を収容し、前記開
口部の内径部に沿って放射ノイズをシールドするショー
トリングを設けたことを特徴とする混成集積回路部品の
構造。In a hybrid integrated circuit component equipped with a single substrate consisting of a composite inductor formed by a laminated structure of a magnetic material and a conductor, or a composite substrate in which a composite inductor and at least one of a composite capacitor and a composite resistor are superimposed, the substrate is A hybrid device characterized by having an opening penetrating in the thickness direction, accommodating an electronic component that generates radiated noise in the opening, and providing a short ring for shielding radiated noise along the inner diameter of the opening. Structure of integrated circuit components.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003105A JP2810182B2 (en) | 1990-01-10 | 1990-01-10 | Structure of hybrid integrated circuit components |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003105A JP2810182B2 (en) | 1990-01-10 | 1990-01-10 | Structure of hybrid integrated circuit components |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03208366A true JPH03208366A (en) | 1991-09-11 |
JP2810182B2 JP2810182B2 (en) | 1998-10-15 |
Family
ID=11548070
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003105A Expired - Fee Related JP2810182B2 (en) | 1990-01-10 | 1990-01-10 | Structure of hybrid integrated circuit components |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2810182B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001223315A (en) * | 1999-12-01 | 2001-08-17 | Ibiden Co Ltd | Package substrate |
JP2010056166A (en) * | 2008-08-26 | 2010-03-11 | Denso Corp | Circuit board |
JP2012069784A (en) * | 2010-09-24 | 2012-04-05 | Murata Mfg Co Ltd | Circuit board and arrangement method for noise suppression components |
JP2014072483A (en) * | 2012-10-01 | 2014-04-21 | Fujitsu Semiconductor Ltd | Semiconductor device |
-
1990
- 1990-01-10 JP JP2003105A patent/JP2810182B2/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001223315A (en) * | 1999-12-01 | 2001-08-17 | Ibiden Co Ltd | Package substrate |
JP2010056166A (en) * | 2008-08-26 | 2010-03-11 | Denso Corp | Circuit board |
JP2012069784A (en) * | 2010-09-24 | 2012-04-05 | Murata Mfg Co Ltd | Circuit board and arrangement method for noise suppression components |
JP2014072483A (en) * | 2012-10-01 | 2014-04-21 | Fujitsu Semiconductor Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP2810182B2 (en) | 1998-10-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
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LAPS | Cancellation because of no payment of annual fees |