JPH03206690A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH03206690A JPH03206690A JP2002821A JP282190A JPH03206690A JP H03206690 A JPH03206690 A JP H03206690A JP 2002821 A JP2002821 A JP 2002821A JP 282190 A JP282190 A JP 282190A JP H03206690 A JPH03206690 A JP H03206690A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- base plate
- insulating layer
- base board
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 229920005989 resin Polymers 0.000 claims abstract description 12
- 239000011347 resin Substances 0.000 claims abstract description 12
- 125000006850 spacer group Chemical group 0.000 claims abstract description 8
- 230000017525 heat dissipation Effects 0.000 claims abstract description 5
- 230000000694 effects Effects 0.000 abstract description 3
- 238000007789 sealing Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 16
- 229920001296 polysiloxane Polymers 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、例えばパワーＩＣモジュール等に使用して好
適な半導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device suitable for use in, for example, a power IC module.
近年、半導体装置としては、パワーデバイスと制御回路
を一体化してなるパワー”ＩＣモジュールがエアコン・
汎用インバータ等に広く使用されている。In recent years, as a semiconductor device, power "IC" modules that integrate power devices and control circuits are used in air conditioners and
Widely used in general-purpose inverters, etc.
従来、この種の半導体装置は第３図に示すように構威さ
れている。これを同図に基づいて説明すると、同図にお
いて、符号ｌで示すものは金属製のベース板で、一方側
に３０〜２００μのエポキシ系樹脂からなる絶縁層２が
形成されており、他方側には外部に露呈する放熱面３が
形或されている。Conventionally, this type of semiconductor device has been constructed as shown in FIG. To explain this based on the same figure, in the same figure, what is indicated by the symbol l is a metal base plate, on one side of which an insulating layer 2 made of epoxy resin with a thickness of 30 to 200 μm is formed, and on the other side. A heat dissipation surface 3 exposed to the outside is formed on the surface.
４は枠状のケースで、前記ベース板１の周囲に立設され
ている。５は例えばｓｏｐ ＜樹脂封止形の半導体装置
）等からなるＩＣで、リード６が前記絶縁層２上に金属
パターン７の制御回路用パターンを介して接続され、か
つゲル状樹脂としてのシリコーン８によって封止されて
いる。９はパワーデバイスとしてのチップで、前記金属
パターン７のパワーデバイス用パターン上に金属プロソ
ク１０を介して接合され、かつ前記ＩＣ５と同様に前記
シリコーン８によって封止されている。また、１１は前
記金属パターン７のバンドと前記チソプ９の電極とを接
続するＡＩワイヤ、１２は前記ケース４に内封されかつ
前記シリコーン８上に積層されたエボキシ系樹脂である
。なお、ｌ３は前記金属パターン７の制御回路用パター
ンと前記ＩＣ５のり−ド６問および前記金属ブロック１
０と前記金属パターン７のパワーデバイス用パターン間
に介在する半田ペースト、１４は前記金属ブロック１０
と前記チソプ９との間に介在する半田である。Reference numeral 4 denotes a frame-shaped case, which is erected around the base plate 1. Reference numeral 5 denotes an IC consisting of, for example, a sop (semiconductor device of resin-sealed type), etc., in which a lead 6 is connected to the insulating layer 2 via a control circuit pattern of a metal pattern 7, and silicone 8 is formed as a gel-like resin. is sealed by. Reference numeral 9 denotes a chip as a power device, which is bonded onto the power device pattern of the metal pattern 7 via a metal protuberance 10, and is sealed with the silicone 8 similarly to the IC 5. Further, 11 is an AI wire connecting the band of the metal pattern 7 and the electrode of the chisop 9, and 12 is an epoxy resin sealed in the case 4 and laminated on the silicone 8. Note that l3 is the control circuit pattern of the metal pattern 7, the six IC5 boards, and the metal block 1.
0 and the solder paste interposed between the power device patterns of the metal pattern 7, and 14 the metal block 10.
This is the solder interposed between the solder plate 9 and the solder plate 9.
次に、このように構威された半導体装置の製造方法につ
いて説明する。Next, a method for manufacturing a semiconductor device configured as described above will be explained.
先ず、ベース板１上に絶縁層２を形戒する。次いで、こ
の絶縁層２上にパワーデバイス用と制御回路用の金属パ
ターン７を形或する。しかる後、金属パターン７の回路
制御用パターンとパワーデバイス用パターンに半田ペー
スト１３を塗布してＩＣ５のリード６を接続すると共に
、パワーデバイス用パターンに金属ブロック１０を接合
し、このうち金属ブロック１０上に半田１４によってチ
ソプ９を接合する。そして、リフロー炉内での半田付け
後に金属パターン７のパッドとチソプ９の電極とをＡｌ
ワイヤ１１によって接続し、ベース板１の側面に接着剤
によってケース４を接着してから、ケース４内にシリコ
ーン８，エポキシ系樹脂１２を順次封入する。First, the insulating layer 2 is formed on the base plate 1. Next, metal patterns 7 for power devices and control circuits are formed on this insulating layer 2. After that, solder paste 13 is applied to the circuit control pattern and the power device pattern of the metal pattern 7 to connect the leads 6 of the IC 5, and the metal block 10 is joined to the power device pattern. The chisop 9 is joined on top with solder 14. After soldering in a reflow oven, the pads of the metal pattern 7 and the electrodes of the chisop 9 are bonded to Al.
After connecting with wires 11 and adhering the case 4 to the side surface of the base plate 1 with an adhesive, silicone 8 and epoxy resin 12 are sequentially sealed inside the case 4.
このようにして、半導体装置を製造することができる。In this way, a semiconductor device can be manufactured.
ところで、従来の半導体装置においては、ＩＣ５の樹脂
部５ａと絶縁層２との間にシリコーン８が介在する構造
であるため、ＩＣ５からベース板１への放熱が良好に行
われず、ＩＣ５に使用されるバヮーチソプを小型化する
ことができなかった。すなわち、小型チップとして例え
ばＩＧＢＴ等のＭＯＳ系パワーチップを使用すると、通
電時の発熱によって規定以上の温度までＩＣ５のジャン
クション温度が上昇してしまい、ＩＣ５が誤動作したり
信頼性が低下したりするからである。この結果、ＩＣ５
全体が大型化し、コストが嵩むという問題があった。By the way, in the conventional semiconductor device, since the silicone 8 is interposed between the resin part 5a of the IC5 and the insulating layer 2, heat dissipation from the IC5 to the base plate 1 is not performed well, and the silicone 8 is not used for the IC5. However, it was not possible to downsize the robot. In other words, if a MOS power chip such as an IGBT is used as a small chip, the junction temperature of IC5 will rise to a temperature higher than the specified temperature due to the heat generated during energization, which may cause IC5 to malfunction or reduce reliability. It is. As a result, IC5
There was a problem in that the overall size increased and the cost increased.
本発明はこのような事情に鑑みてなされたもので、使用
ＩＣの小型化を図ることができ、もってコストの低廉化
を図ることができる半導体装置を提供するものである。The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a semiconductor device that can reduce the size of the IC used and thereby reduce the cost.
本発明に係る半導体装置は、ＩＣの樹脂部とべース板上
のベース板との間にスペーサを介在させたものである。A semiconductor device according to the present invention has a spacer interposed between a resin portion of an IC and a base plate on a base plate.
本発明においては、通電時にスペーサによってＩＣから
ベース板への放熱を良好に行うことができる。In the present invention, heat can be effectively dissipated from the IC to the base plate by the spacer when electricity is applied.
以下、本発明の構或等を図に示す実施例によって詳細に
説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of the present invention will be explained in detail below with reference to embodiments shown in the drawings.
第１図は本発明に係る半導体装置を示す断面図で、同図
以下において第３図と同一の部材については同一の符号
を付し、詳細な説明は省略する。FIG. 1 is a cross-sectional view showing a semiconductor device according to the present invention, and in the following figures, the same members as in FIG. 3 are designated by the same reference numerals, and detailed explanations will be omitted.
同図において、符号２１で示す金属製のベース板には、
前記ＩＣ５の樹脂部５ａに前記絶縁層２を介して対接す
るスペーサとしての複数個の突子２２が一体に設けられ
ている。これら突子２２の高さは、前記リード６が前記
金属パターン７の制御回路用パターンに接続し得るよう
な寸法に設定されている。In the same figure, the metal base plate indicated by the reference numeral 21 includes:
A plurality of protrusions 22 as spacers are integrally provided on the resin portion 5a of the IC 5 and are in contact with each other with the insulating layer 2 interposed therebetween. The heights of these protrusions 22 are set to such a size that the leads 6 can be connected to the control circuit pattern of the metal pattern 7.
このように構威された半導体装置においては、１Ｃ５の
樹脂部５ａに絶縁層２を介して突子２２を対接させるこ
とにより、通電時に突子２２によってＩＣ５からベース
板２ｌへの放熱を良好に行うことができるから、ＩＣ５
の小型化を図ることができる。In the semiconductor device configured in this manner, by bringing the protrusions 22 into contact with the resin portion 5a of the IC5 through the insulating layer 2, the heat dissipation from the IC5 to the base plate 2l is improved by the protrusions 22 when electricity is applied. IC5
can be made smaller.
なお、本実施例においては、ベース板２ｌに突子２２を
一体に設ける構造を示したが、本発明はこれに限定され
るものではなく、第２図に示すようにＩＣ５の樹脂部５
ａとベース板２１上の絶縁層２との間に金属ブロック２
３を介在させても実施例と同様の効果を奏する。この場
合、スペーサとしてエボキシ系樹脂からなるブロックを
ＩＣ５の樹脂部５ａとベース板２１上の絶縁層２との間
に介在させてもＩＣ５からベース板２１への放熱を効果
的に行うことができる。Although this embodiment shows a structure in which the protrusions 22 are integrally provided on the base plate 2l, the present invention is not limited to this, and as shown in FIG.
a and the insulating layer 2 on the base plate 21.
Even if 3 is interposed, the same effects as in the embodiment can be obtained. In this case, even if a block made of epoxy resin is interposed as a spacer between the resin portion 5a of the IC 5 and the insulating layer 2 on the base plate 21, heat can be effectively radiated from the IC 5 to the base plate 21. .
また、本発明において使用されるＩＣは実施例に限定さ
れるものでないことは勿論である。Furthermore, it goes without saying that the IC used in the present invention is not limited to the embodiments.
因に、本発明における半導体装置の製造方法は従来技術
と同様に行うことができるから、その記載については省
略する。Incidentally, since the method for manufacturing a semiconductor device according to the present invention can be performed in the same manner as in the prior art, the description thereof will be omitted.
以上説明したように本発明によれば、ｒｃの樹脂部とベ
ース板上のベース板との間にスベーサを介在させたので
、通電時にスペーサによってＩＣからヘース板への放熱
を良好に行うことができる。したがって、使用ＩＣの小
型化を図ることができるから、コストの低廉化を図るこ
とができる。As explained above, according to the present invention, since the spacer is interposed between the resin part of the RC and the base plate on the base plate, the spacer can effectively dissipate heat from the IC to the base plate when electricity is applied. can. Therefore, since it is possible to reduce the size of the IC used, it is possible to reduce costs.
第１図は本発明に係る半導体装置を示す断面図、第２図
は他の実施例を示す断面図、第３図は従来の半導体装置
を示す断面図である。
２・・・・絶縁層、５・・・・ＩＣ、５ａ・樹脂部、６
・・・・リード、７・・・・金属パターン、２１・・・
・ベース板、２２・・・・突子。
代 理 人′大岩増雄FIG. 1 is a sectional view showing a semiconductor device according to the present invention, FIG. 2 is a sectional view showing another embodiment, and FIG. 3 is a sectional view showing a conventional semiconductor device. 2...Insulating layer, 5...IC, 5a/resin part, 6
...Lead, 7...Metal pattern, 21...
・Base plate, 22...Protrusion. Representative: Masuo Oiwa
Claims (1)
ース板と、このベース板の前記絶縁層上に導電パターン
を介して接続されるリードを有する樹脂封止形のＩＣと
を備えた半導体装置において、前記ＩＣの樹脂部と前記
ベース板との間にスペーサを介在させたことを特徴とす
る半導体装置。A semiconductor comprising a base plate having an insulating layer formed on one side and a heat dissipation surface on the other side, and a resin-sealed IC having leads connected to the insulating layer of the base plate via a conductive pattern. A semiconductor device, characterized in that a spacer is interposed between the resin portion of the IC and the base plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002821A JPH03206690A (en) | 1990-01-09 | 1990-01-09 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002821A JPH03206690A (en) | 1990-01-09 | 1990-01-09 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03206690A true JPH03206690A (en) | 1991-09-10 |
Family
ID=11540080
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002821A Pending JPH03206690A (en) | 1990-01-09 | 1990-01-09 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03206690A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2480428A (en) * | 2010-05-11 | 2011-11-23 | Quanta Light Ind Ltd | PCB with metal core having extended heatsink bosses for mounting LEDs |
-
1990
- 1990-01-09 JP JP2002821A patent/JPH03206690A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2480428A (en) * | 2010-05-11 | 2011-11-23 | Quanta Light Ind Ltd | PCB with metal core having extended heatsink bosses for mounting LEDs |
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