JPH03200394A - Formation of through hole - Google Patents

Formation of through hole

Info

Publication number
JPH03200394A
JPH03200394A JP34016489A JP34016489A JPH03200394A JP H03200394 A JPH03200394 A JP H03200394A JP 34016489 A JP34016489 A JP 34016489A JP 34016489 A JP34016489 A JP 34016489A JP H03200394 A JPH03200394 A JP H03200394A
Authority
JP
Japan
Prior art keywords
hole
film
wall
pattern
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34016489A
Other languages
Japanese (ja)
Inventor
Teruyoshi Kutoku
久徳 照義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP34016489A priority Critical patent/JPH03200394A/en
Publication of JPH03200394A publication Critical patent/JPH03200394A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve reliability of continuity and to reduce cost by previously forming an insulator film which is not eroded by etchant in a through hole, and then etching a conductor film to pattern it. CONSTITUTION:Conductor films 2A are formed on the inner wall of a through lower hole 10A and both the front and rear surfaces of a ceramic board 1, and insulator films 6 of SiO2 or the like are formed to cover the inner wall of the hole 10A and the surface of the film 2A of a land of the peripheral edge. The entire surface of the board 1 including the inner wall of the hole 10A is coated with photoresist 3A, exposed, and developed to form a photoresist pattern 3. Then, the bare film 2A is removed by etching, land and desired pattern of the inner wall and the peripheral edge of the hole 10A remain, the pattern 3 is peeled, and a through hole 10 is provided. Thus, reliability of continuity is improved, and cost can be reduced.

Description

【発明の詳細な説明】 〔概要〕 セラミック回路基板の製造方法にかかわり、特に薄膜の
スルーホール形成方法に関し、導通の信頼度が高く、且
つ低コストのスルーホールを提供することを目的とし、 スルーホール下孔の内壁及びセラミック基板の表裏の両
面に導体膜を形成した後に、該導体膜の該スルーホール
下孔の内壁及びランド部分を、絶縁体膜で被覆し、その
後、ホトリソグラフィ手段により該導体膜をパターニン
グすることで、スルーホールを設ける構成とする。
[Detailed Description of the Invention] [Summary] The present invention relates to a method of manufacturing a ceramic circuit board, and in particular, to a method of forming a through hole in a thin film, and aims to provide a through hole with high conductivity reliability and low cost. After forming a conductive film on the inner wall of the pilot hole and both the front and back surfaces of the ceramic substrate, the inner wall of the pilot hole and the land portion of the conductor film are coated with an insulating film, and then the conductor film is coated with an insulating film by photolithography. Through-holes are provided by patterning the conductor film.

〔産業上の利用分野〕[Industrial application field]

本発明は、セラミック回路基板の製造方法にかかわり、
特に薄膜のスルーホール形成方法に関する。
The present invention relates to a method of manufacturing a ceramic circuit board,
In particular, it relates to a method for forming through holes in thin films.

近年のハイブリッドIC等の回路基板装置は、アルミナ
等のセラミック基板の表裏の両面に、薄膜回路を形成し
パターンの微細化を行い、さらに両面をスルーホールを
介して接続することで、信号の高速化、高密度化をはか
っている。
In recent years, circuit board devices such as hybrid ICs have formed thin film circuits on both the front and back sides of ceramic substrates such as alumina, resulting in finer patterns, and connecting both sides through through holes to achieve high-speed signals. We are trying to increase the density and increase the density.

〔従来の技術〕[Conventional technology]

従来は第3図に示すようにして、セラミック基板にスル
ーホールを設けていた。
Conventionally, through holes were provided in a ceramic substrate as shown in FIG.

まず第3図(a)に示すように、アルミナ等のセラミッ
ク基板lの所望の個所に、レーザー加工、超音波加工等
で゛所望の内径のスルーホール下孔10Aを穿孔し、そ
の後導体金属を蒸着、スパッタリング等して、セラミッ
ク基板lの表裏の両面、及びスルーホール下孔10Aの
内壁に、薄膜よりなる導体膜2Aを形成する。
First, as shown in FIG. 3(a), a through-hole pilot hole 10A with a desired inner diameter is bored at a desired location on a ceramic substrate l made of alumina or the like by laser processing, ultrasonic processing, etc., and then a conductive metal is formed. A conductive film 2A made of a thin film is formed on both the front and back surfaces of the ceramic substrate l and on the inner wall of the prepared through hole 10A by vapor deposition, sputtering, or the like.

そして、スピンコード手段等で、スルーホール下孔10
Aの内壁を含む導体膜2Aの全表面に、ホトレジスト3
Aを塗布する。
Then, by using a spin cord means or the like, the through-hole pilot hole 10 is
A photoresist 3 is applied to the entire surface of the conductive film 2A including the inner wall of A.
Apply A.

次に第3図(b)に示すように、所望のホトマスクを用
いて、ホトレジスト3Aを露光・現像しパターニングし
て、スルーホール下孔10Aの内壁、ランド及び所望の
パターンの表面のみを覆うホトレジストパターン3とす
る。
Next, as shown in FIG. 3(b), using a desired photomask, the photoresist 3A is exposed, developed, and patterned to form a photoresist that covers only the inner wall of the through-hole pilot hole 10A, the land, and the surface of the desired pattern. Let's use pattern 3.

そして、第3図(C)に示すように、スルーホール下孔
10Aの内壁及びスルーホール下孔10Aの周縁のラン
ド部分、及び所望のパターンを残すというエツチングを
行い、セラミック基板1にスルーホール10と導体パタ
ーン2を設けている。
Then, as shown in FIG. 3(C), etching is performed to leave the inner wall of the through-hole pilot hole 10A, the land portion at the periphery of the through-hole pilot hole 10A, and a desired pattern. A conductor pattern 2 is provided.

なお、図示省略したが、スルーホール10を形成した後
に、導体膜上の不要となったホトレジストパターン3を
剥離している。
Although not shown, after the through holes 10 are formed, the unnecessary photoresist pattern 3 on the conductive film is peeled off.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、スルーホール下孔10Aの縁がシャープ
であることに起因して、第3図(b)に図示したように
、ホトレジストが付着し難い。
However, due to the sharp edges of the through-hole preparation hole 10A, it is difficult for the photoresist to adhere to it, as shown in FIG. 3(b).

したがって、導体膜をパターニングする際にエツチング
液が、スルーホールの縁部分の導体膜を侵し一部か腐食
することで、欠陥部Kが発生するという問題点があった
Therefore, when patterning the conductor film, the etching solution corrodes the conductor film at the edges of the through holes, causing partial corrosion, resulting in the formation of defective portions K.

一方、スルーホール下孔の縁を削って、テーパー面とす
ることで、ホトレジストの付着の良好化をはかったもの
もある。
On the other hand, there is also a method in which the edges of the prepared through-holes are shaved to create a tapered surface to improve the adhesion of photoresist.

しかしながら、スルーホール下孔の縁を高精度のテーパ
ー面とすることが困難で、得られるスルーホールがコス
ト高になる恐れがあった。
However, it is difficult to form the edge of the prepared through-hole into a tapered surface with high precision, and the resulting through-hole may be expensive.

本発明はこのような点に鑑みて創作されたちので、導通
の信頼度が高く、且つ低コストのスルーホールを提供す
ることを目的としている。
The present invention was created in view of these points, and an object of the present invention is to provide a through hole with high reliability of conduction and low cost.

い、その後さらにホトレジストパターン3を剥離して、
スルーホール10を設けるものとする。
Then, the photoresist pattern 3 is further peeled off.
A through hole 10 shall be provided.

〔課題を解決するための手段〕[Means to solve the problem]

上記の目的を達成するために本発明は、スルーホール下
孔10Aの内壁及びセラミック基板1の表裏の両面に導
体膜2Aを形成する。
In order to achieve the above object, the present invention forms a conductive film 2A on the inner wall of the through-hole pilot hole 10A and on both the front and back surfaces of the ceramic substrate 1.

そして、スルーホール下孔10Aの内壁及びスルーホー
ル下孔の周縁のランドの、導体膜2Aの表面部分に、S
iO□等の絶縁体膜6を形成して被覆する。
Then, S
An insulator film 6 such as iO□ is formed and covered.

そして、スルーホール下孔10Aの内壁を含むセラミッ
ク基板1の全表面に、ホトレジストを塗布形成し露光・
現像して、第1図(a)の如くに、ホトレジストをパタ
ーニングしてホトレジストパターン3とする。
Then, photoresist is applied and formed on the entire surface of the ceramic substrate 1, including the inner wall of the prepared through hole 10A, and exposed to light.
After development, the photoresist is patterned to form a photoresist pattern 3 as shown in FIG. 1(a).

そして、第1図(b)に図示したように、裸出した導体
膜部分を除去し、スルーホール下孔10Aの内壁及びス
ルーホール下孔10Aの周縁のランド部分、及び所望の
パターンを残すというエツチングを行〔作用〕 本発明方法によれば、スルーホール下孔10A。
Then, as shown in FIG. 1(b), the exposed conductor film portion is removed, leaving the inner wall of the pilot hole 10A, the land portion at the periphery of the pilot hole 10A, and the desired pattern. Etching [Operation] According to the method of the present invention, the through-hole prepared hole 10A is formed.

その縁、及びランド部分の導体膜2Aは、絶縁体膜6で
被覆されている。
The edges and land portions of the conductive film 2A are covered with an insulating film 6.

よって、第1図(a)に図示したように、スルーホール
の縁部分にホトレジストが充分に付着しないことがあっ
ても、この部分が絶縁体膜6で被覆されているので、導
体膜がエツチングされることが阻止される。即ち、スル
ーホールの導通の信頼度が向上する。
Therefore, as shown in FIG. 1(a), even if the photoresist does not adhere sufficiently to the edge of the through hole, since this area is covered with the insulating film 6, the conductive film can be etched. be prevented from being done. That is, the reliability of conduction of the through hole is improved.

また、スルーホール下孔の縁を特別に加工することなく
、広(他のパターニング手段として知られているリフト
オフ法によって、絶縁体膜を容易に形成することができ
るので、得られるスルーホールが低コストである。
In addition, an insulating film can be easily formed using the lift-off method, which is known as another patterning method, without special processing the edge of the prepared through-hole, so the resulting through-hole has a low It's cost.

〔実施例〕〔Example〕

以下第2図を参照しながら、本発明を具体的に説明する
。なお、全図を通じて同一符号は同一対象物を示す。
The present invention will be specifically explained below with reference to FIG. Note that the same reference numerals indicate the same objects throughout the figures.

本発明のスルーホール形成方法は下記の通りである。The through hole forming method of the present invention is as follows.

■ 導1体膜の形成(第2図(a)参照)アルミナ等の
セラミック基板lの所望の個所に、レーザー加工、超音
波加工等で所望の内径のスルーホール下孔10Aを穿孔
し、その後導体金属を蒸着、スパッタリング等して、セ
ラミック基板lの表裏の両面、及びスルーホール下孔1
0Aの内壁に、薄膜よりなる導体膜2Aを形成する。
■ Formation of a conductor film (see Figure 2 (a)) A through-hole pilot hole 10A with a desired inner diameter is bored at a desired location on a ceramic substrate l made of alumina or the like by laser processing, ultrasonic processing, etc., and then Conductive metal is deposited, sputtered, etc. on both the front and back sides of the ceramic substrate l, and through-hole pilot hole 1.
A conductor film 2A made of a thin film is formed on the inner wall of 0A.

■ リフトオフ用レジストの塗布形成(第2図(b)参
照) スルーホール下孔10A及びその周縁のランド部分を除
いたセラミック基板lの表裏の全面に、絶縁体よりなる
リフトオフ用レジスト5をスクリーン印刷して塗布し、
その後プレベークする。
■ Application and formation of lift-off resist (see Fig. 2 (b)) Screen print the lift-off resist 5 made of an insulator on the entire front and back surfaces of the ceramic substrate l, excluding the through-hole pilot hole 10A and the land portion around its periphery. and apply
Then pre-bake.

■ 絶縁体膜の形成(第2図(C)参照)S iOz等
の絶縁体を蒸着して、スルーホール下孔10Aの内壁、
ランド及びリフトオフ用レジスト5の全表面に絶縁体膜
6を形成する。
■ Formation of an insulator film (see Figure 2 (C)) An insulator such as SiOz is deposited on the inner wall of the lower through hole 10A,
An insulating film 6 is formed on the entire surface of the land and lift-off resist 5.

■ 絶縁体膜のパターニング(第2図(d)参照)セラ
ミック基板lを溶剤に浸漬して、リフトオフ用レジスト
5を溶解させることで、リフトオフ用レジスト5の表面
の絶縁体膜6を除去し、スルーホール下孔10Aの内壁
部分及びランド部分の絶縁体膜6を残す。
■ Patterning of the insulator film (see FIG. 2(d)) By immersing the ceramic substrate l in a solvent and dissolving the lift-off resist 5, the insulator film 6 on the surface of the lift-off resist 5 is removed. The insulator film 6 on the inner wall portion and the land portion of the through-hole prepared hole 10A is left.

■ ホトレジストの塗布(第2図(e)参照)スルーホ
ール下孔内壁、ランド部分の絶縁体膜6の全表面、及び
セラミック基板1の表裏の両面に形成された導体膜2A
の全表面に、スピンコード手段等でホトレジスト3Aを
塗布し、その後プレベークする。
■ Application of photoresist (see Fig. 2 (e)) Conductive film 2A formed on the inner wall of the pilot hole, the entire surface of the insulating film 6 at the land portion, and both the front and back surfaces of the ceramic substrate 1
A photoresist 3A is coated on the entire surface using a spin code means or the like, and then prebaked.

■ ホトレジストのパターニング(第2図げ)参照)所
望のホトマスクを用いて、ホトレジスト3Aを露光・現
像しパターニングして、スルーホール下孔10Aの内壁
、ランド及び所望のパターンの表面のみを覆うホトレジ
ストパターン3とする。
■ Patterning of photoresist (see Figure 2)) Using a desired photomask, expose and develop the photoresist 3A and pattern it to form a photoresist pattern that covers only the inner wall of the through-hole pilot hole 10A, the land, and the surface of the desired pattern. Set it to 3.

■ 導体膜のエツチング(第2図(鎖参照)ホトレジス
トパターン3を形成したセラミック基板1を、エツチン
グ液に浸漬して、裸出した部分の導体膜2Aを除去し、
ホトレジストパターン3で覆われた導体膜を残す。
■ Etching of the conductor film (Fig. 2 (see chain)) The ceramic substrate 1 on which the photoresist pattern 3 has been formed is immersed in an etching solution to remove the exposed part of the conductor film 2A.
A conductive film covered with photoresist pattern 3 is left.

即ちスルーホール10 (スルーホール下孔10Aの内
壁及びスルーホール下孔10Aの周縁のランド部分)と
、所望の導体パターン2を設ける。
That is, a through hole 10 (the inner wall of the pilot hole 10A of the through hole and a land portion around the periphery of the pilot hole 10A of the through hole) and a desired conductor pattern 2 are provided.

■ ホトレジストの剥離(第2図(h)参照)その後、
セラミック基板lを溶剤に浸漬して、スルーホール10
.及び導体パターン2上の不要となったホトレジストパ
ターン3を除去する。
■ Peel off the photoresist (see Figure 2 (h)), then
The ceramic substrate l is dipped in a solvent to form through holes 10.
.. Then, the unnecessary photoresist pattern 3 on the conductor pattern 2 is removed.

上述のように本発明方法によれば、導体膜のエツチング
時に、スルーホール下孔10A、その縁。
As described above, according to the method of the present invention, when etching the conductor film, the through-hole prepared hole 10A and its edge are etched.

及びランド部分の導体膜は、絶縁体膜6で被覆されてい
る。
The conductive film at the land portion is covered with an insulating film 6.

したがって、スルーホールの縁部分にホトレジストが充
分に付着しないことがあっても、導体膜がエツチングさ
れることが阻止される。
Therefore, even if the photoresist is not sufficiently attached to the edge portion of the through hole, etching of the conductive film is prevented.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、スルーホール部分に予め
エツチング液によって侵されることのない絶縁体膜を形
成し、その後導体膜をエツチングしてパターニングする
という、スルーホール形成方法であって、スルーホール
の縁部分の導体膜が侵されることがないので、得られる
スルーホールの導通の信頼度が高い。
As explained above, the present invention is a through hole forming method in which an insulating film that will not be attacked by an etching solution is formed in advance in the through hole portion, and then a conductive film is etched and patterned. Since the conductor film at the edge of the hole is not corroded, the reliability of the conduction of the resulting through-hole is high.

一方、スルーホール下孔の縁を特別に加工することな(
、広くパターニング手段として知られているリフトオフ
法によって、絶縁体膜を形成するのであるから、得られ
るスルーホールが低コストである。
On the other hand, the edge of the pilot hole of the through-hole should not be specially processed (
Since the insulating film is formed by the lift-off method, which is widely known as a patterning method, the resulting through-holes are low in cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図の(a)、 (b)は本発明の原理を示す図、第
2図の(a)、 (b)、 (C1,(d)、 (e)
、げ>、 (g)、 (h)は、本発明方法の工程を示
す図、 第3図の(a)、 (b)、 (C)は従来方法を示す
図である。 図において、 lはセラミック基板、 2よ導体パターン、 2Aよ導体膜、 31!ホトレジストパターン、 3Aよホトレジスト、 5よりフトオフ用レジスト、 6は絶縁体膜、 10はスルーホール、 10Aはスルーホール下孔をそれぞれ示す。 ?定明乃汰の工程と爪T図 !閘−52C;z〕(そのイ) $を明の原理1示す図 従来力性と示す図 第3図 杢発明力造の二種E示V図 !F12図(2の2)
(a) and (b) in Fig. 1 are diagrams showing the principle of the present invention, and (a), (b), (C1, (d), (e) in Fig. 2)
, ge>, (g), (h) are diagrams showing the steps of the method of the present invention, and (a), (b), (C) of FIG. 3 are diagrams showing the conventional method. In the figure, l is a ceramic substrate, 2 is a conductor pattern, 2A is a conductor film, 31! 3A is a photoresist pattern, 5 is a foot-off resist, 6 is an insulator film, 10 is a through hole, and 10A is a through hole pilot hole. ? Sadakinota's process and nail T diagram! Lock -52C; Figure F12 (2 of 2)

Claims (1)

【特許請求の範囲】 スルーホール下孔(10A)の内壁及びセラミック基板
(1)の表裏の両面に導体膜(2A)を形成した後に、 該導体膜(2A)の該スルーホール下孔(10A)の内
壁及びランド部分を、絶縁体膜(6)で被覆し、その後
、ホトリソグラフィ手段により該導体膜(2A)をパタ
ーニングすることで、スルーホール(10)を設けるこ
とを特徴とするスルーホール形成方法。
[Scope of Claims] After forming a conductor film (2A) on the inner wall of the through-hole prepared hole (10A) and on both the front and back surfaces of the ceramic substrate (1), the through-hole prepared hole (10A) of the conductor film (2A) is ) is coated with an insulating film (6), and then the conductor film (2A) is patterned by photolithography to provide a through hole (10). Formation method.
JP34016489A 1989-12-27 1989-12-27 Formation of through hole Pending JPH03200394A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34016489A JPH03200394A (en) 1989-12-27 1989-12-27 Formation of through hole

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34016489A JPH03200394A (en) 1989-12-27 1989-12-27 Formation of through hole

Publications (1)

Publication Number Publication Date
JPH03200394A true JPH03200394A (en) 1991-09-02

Family

ID=18334343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34016489A Pending JPH03200394A (en) 1989-12-27 1989-12-27 Formation of through hole

Country Status (1)

Country Link
JP (1) JPH03200394A (en)

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