JPH03196232A - Multiprocessor and its abnormality diagnostic method - Google Patents

Abstract

PURPOSE:To shorten the time required for diagnosis of the abnormality of a multiprocessor by performing the comparison of the processing results among unit processors to the same processing data inputted via an input bus so as to decide an abnormal unit processor. CONSTITUTION:A deciding circuit 4 compares the data given from unit processors 1 - 3 with each other to decide an abnormal processor. When the coincidence is secured among these data, the normal states of all processors 1 - 3 are confirmed. When the coincidence is secured between data on two unit processors and no coincidence is secured with the data of the 3rd processor, the unit processor having the discordant data is decided abnormal. For instance, the processor 3 is decided abnormal when the coincidence is secured between both processors 1 and 2 and no coincidence is secured with the 3rd processor. Furthermore all processors 1 - 3 are decided abnormal when no coincidence is obtained between them. Then, the time required for diagnosis is shortened without the diagnostic processor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multiprocessor used for image signal processing, etc., and an abnormality diagnosis method thereof.

[Conventional technology]

Systems that use digital signal processing to compress television signals and use them for video conferences are being actively developed, and in 1930, the hardware to realize this system was developed.
Collected papers from the National Conference of the Institute of Electronics and Communication Engineers (1986)
There is a signal processing processor described in the separate volume, pages 5.5-69 of the publication (March 2013). This divides one screen into multiple partial screens, assigns a signal processor to each, and divides the allocated partial screens into the sampling period of one screen (
It is a multiprocessor type that processes at a speed of 1/30 seconds), realizes digital signal processing under software control, and can be used in video processing devices.

Conventionally, as one of the abnormality diagnosis methods for multiprocessors,
Self-diagnosis methods are known. In this method, a control processor that controls each signal processing processor provides a program and data for self-diagnosis to each signal processing processor, receives the diagnosis results, and detects an abnormality.

[Problem to be solved by the invention]

In the conventional multiprocessor abnormality diagnosis method described above,
Since a separate processor is required to diagnose each unit processor, the hardware increases, and if this diagnostic processor is abnormal, it not only becomes impossible to diagnose the unit processor, but also the system stops. Furthermore, a one-to-one configuration in which a diagnostic processor monitors each unit processor has the disadvantage that the probability of abnormality detection is low and the time required for diagnosis is long.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multiprocessor and an abnormality diagnosing method therefor, which do not require a diagnostic processor and can perform abnormality determination with a simple circuit.

[Means to solve the problem]

The multiprocessor of the present invention includes an input bus, an output bus, a plurality of unit processors of the same type connected between the input bus and the output bus, and the unit processors for processing the same processing data input from the input bus. and a determination circuit that compares the processing results of the respective processors and determines which unit processor is abnormal.

The abnormality diagnosis method for a multiprocessor according to the present invention includes inputting the same processing data to a plurality of unit processors of the same type, processing the inputted same processing data in each of the unit processors, and The processing results of each are compared to determine which unit processor is abnormal.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

1.2.3 is a unit processor, 4 is a determination circuit, and 5 is an input terminal.

As will be described in detail later, each unit processor 1.2.3 takes in the image signal inputted from the input terminal 5 via the input bus 100 for the area necessary for processing, and processes the signal processing content described in software. It executes one instruction at a time in one clock cycle and outputs the processing results.

The determination circuit 4 determines an abnormal unit processor based on the processing results from each unit processor 1, 2.3, and is composed of a comparison circuit and the like.

The diagnostic operation of the multiprocessor configured in this way will be described below.

Each unit processor 1.2.3 takes in a processed image from the input terminal 5 via the input bus 100. At this time, each unit processor 1, 2.3 takes in the same image area, and the common Perform common processing on images. The 0 determination circuit 4, which transfers the executed processing results to the determination circuit 4 via the output bus 101, compares the data from the unit processors 1, 2.3, respectively, and determines which processor is abnormal. If all data match, it is determined that all processors are normal. If the data from two unit processors match and the data from one unit processor does not match, the inconsistent unit processor is judged to be abnormal.0 For example, unit processor 1
2 match and unit processor 3 does not match, the unit processor with the mismatch is determined to be abnormal. Furthermore, if all unit processors do not match, it is determined that all unit processors are abnormal.

As explained above, the test data given to each unit processor is different each time, and abnormalities that cannot be detected with fixed data can be detected, and abnormality diagnosis with a high abnormality detection rate can be realized.

FIG. 2 shows an example of the configuration of the unit processors 1, 2.3 in FIG.
2 is an output section, and 43 is a control section. The acquisition unit 40 is two sets of memory circuits capable of sequential writing and random reading, and the sequential writing of the input signals 400 and 401 is controlled by the control unit 43, and the randomly read signals 402 and 403 are controlled by the control unit 43. is processed by a processing unit 41 written in software. The output section 42 is a first-in, first-out storage circuit, and the processing result 404 of the processing section 41 is written therein.

The control unit 43 sends a capture command signal 407 to the capture unit 40 when data necessary for its processing exists on the input bus based on a system clock separately supplied to the entire system and a control signal 410 input from the outside. Output.

Furthermore, when the captured data is complete and processing can be started, a processing start command signal 408 is output to the treatment section 41.

Then, based on the control signal 411 inputted from the outside, it identifies the point in time when it must output to the output bus, and transmits the output command signal 409 to the output section 42 .

The processing unit 41 is a signal processing processor that can execute one instruction in one clock cycle for signal processing contents written in software, and is a signal processing processor that can execute one instruction in one clock cycle.
Consists of etc.

〔Effect of the invention〕

As explained above, according to the present invention, since a special monitoring processor is not required, system stoppage due to failure of the monitoring processor itself can be avoided, and there is no need to transfer special diagnostic programs or data. Therefore, the time required for diagnostic processing is short and a decrease in the efficiency of the multiprocessor can be avoided.

Furthermore, since the system processes different diagnostic data each time an abnormality diagnosis is performed, it is possible to detect abnormalities that cannot be detected using fixed data, thereby increasing the failure diagnosis detection probability.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 3 is a block diagram of unit processors 1, 2.3 in the figure. 1.2.3... Unit processor, 4... Judgment circuit,
5...Input terminal, 100...Input bus, 101...
・Output bus.

Claims (1)

[Scope of Claims] 1. An input bus, an output bus, a plurality of unit processors of the same type connected between the input bus and the output bus, and a plurality of unit processors of the same type connected to each other between the input bus and the output bus; A multiprocessor comprising: a determination circuit that compares the processing results of each unit processor and determines which unit processor is abnormal. 2. Input the same processing data to a plurality of unit processors of the same type, process the input same processing data in each of the unit processors, and compare the processing results of each of the unit processors. A method for diagnosing an abnormality in a multiprocessor, characterized in that the unit processor is determined to be abnormal.