JPH0319422A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce the power consumption by installing a virtual power supply to a DCFL part, and stacking a logic circuit composed of a DCFL on and under the power supply. CONSTITUTION:A 1st power supply 11 and a 2nd power supply 12 are supplied externally to form a virtual 3rd power supply 13. A 1st logic circuit 14 comprising an SCFL is formed between the 1st and 2nd power supplies, and a 2nd logic circuit is and a 3rd logic circuit 16 comprising a DCFL respectively are formed respectively between the 1st and 3rd power supplies and between the 3rd and 2nd power supplies. The 1st power supply 11 is a ground power supply and since a standard power supply voltage of ECL IC is supplied to the 2nd power supply 12, the 3rd power supply voltage 13 is nearly equal to the power voltage optimum to the DCFL. Thus, in the 2nd and 3rd logic circuits 15, 16 comprising the DCFL, the power consumption is halved in comparison with a conventional technology and considerable low power consumption is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention is particularly applicable to semiconductor integrated circuits constituted by field effect transistors (hereinafter abbreviated as FETs) formed on compound semiconductor substrates. −． It is used in semiconductor integrated circuits configured in a circuit format called DCFL or SCFL.

Conventional Technology Integrated Circuits (hereinafter abbreviated as FIC) using compound semiconductor substrates Although various ICs have been developed due to improvements in manufacturing technology, especially logic ICs (LSIs such as SRAMs and microprocessors have not been developed). By the way, the circuit format used for these logic LSIs is
Although iDCFL and SCFL are widely used, DCFL i. t, is a circuit in which a load FET and a switching FET are connected in series, and the DCF is shown in Figure 3.
A circuit diagram of an inverter configured with L is shown. The feature of DCFL is that the number of constituent elements is small compared to other circuit types.
Besides that, DCFL is A because of its low power consumption.
SCFL is widely used in combinational circuits such as LU and RAM. A circuit diagram of an inverter is shown below.The feature of SCFL is that it is easy to construct flip-flops with high speed and low power consumption. Although widely used in sequential circuits, SCFL can easily generate correction and complementary signals with small time differences.Although widely used in large buffers, conventional ICI; depending on the characteristics of LIC, either DCFL or SCFL can be used. However, recently, DCFL and S
Even if a circuit with a mixture of CFLs has been proposed, it is only possible to use SCFLs in parts that use flip-flops, such as frequency dividers, or input/output buffers.
Even if the ALU, RAM, and other internal circuits are composed of DCFLs, the circuit block diagram is shown in FIG. I
Even if the first power supply 1 and the second power supply 2 having a lower potential than the first power supply are supplied from the outside of C, the first logic circuit configured by the SCFL between the first power supply and the second power supply Lol!
Even if the second logic circuit composed of Problems to be Solved by the Invention Although ICs using compound semiconductors generally have high operating speeds, they can also be used with Si ECL-ICs.
The power supply voltage of an IC using a compound semiconductor is -5.
2V, -4. 5V eye6l; t-3. 3V
Why is it necessary to use the standard power supply voltage for Si ECL-ICs such as? If a special power supply voltage is used, it is necessary to prepare a new power supply and install extra power supply wiring, which is not practical. By the way, as is well known, DC F L can operate satisfactorily at a power supply voltage much lower than the above power supply voltage.
Figure 6 shows an example of the power supply voltage dependence of the propagation delay time of a DCFL inverter. The DCFL inverter operates above 8V, and the propagation delay time is almost constant above 1.5V. Even if a voltage is applied, the power consumption only increases and the operating speed does not improve.Figure 7 is an example of the dependence of the propagation delay time of an SCFL inverter on the power supply voltage.If the power supply voltage is 2.0V or more, BaS
The CFL inverter is operating; 3. Above 0V, the propagation delay time is almost constant, and in LSCFL (upper), even though the optimal power supply voltage is in the range of 3.0 to 5.0V, this voltage is almost equal to the power supply voltage of the Si ECL/IC. However, even if the SCFL circuit is operated with the power supply voltage of a Si ECL-IC, the increase in power consumption is small (℃By the way, in the conventional technology, SCFL and DCFL are simply mixed, and the power supply voltage of both is Si ECL・
IC power supply voltage is used t4 and △ DCF
In the L part (above), a voltage much higher than the optimum power supply voltage is applied (t4), and its resistance.In ICs with a mixture of SCFL and DCFL, there is waste of power in Lt and DCFL, resulting in low power consumption. The present invention aims to improve the drawbacks of the conventional technology and provide an IC with a mixture of SCFL and DCFL that enables lower power consumption. .The semiconductor integrated circuit according to the present invention is configured using field effect transistors formed on a compound semiconductor substrate, and a first power source and a second power source having a lower potential than the first power source are connected to the outside of the semiconductor integrated circuit. A virtual third power source is formed which is supplied from the first power source and has a voltage between the voltage of the first power source and the voltage of the second power source and is not connected to the outside.
A first circuit of a first circuit type is connected between a power source and a second power source.
A logic circuit of a second circuit type is formed between the first power source and the third power source and between the third power source and the second power source, respectively. 2. Semiconductor integrated circuit according to the present invention (
3. A semiconductor integrated circuit according to the present invention, characterized in that the first circuit format is an SCFL and the second logic format is a DCFL. A first power supply and a second power supply having a lower potential than the first power supply are supplied from outside the semiconductor integrated circuit, and a voltage between the first power supply voltage and the second power supply voltage is supplied. A virtual third power source is formed that is not connected to the outside, and logic circuits are configured between the first power source and the third power source and between the third power source and the second power source, respectively. Said first
A first current bypass circuit is formed between the power supply and the third power supply, and a second current bypass circuit is formed between the third power supply and the second power supply, and between the first power supply and the second power supply. A reference voltage generation circuit for the third power supply is formed, and when the voltage of the third power supply is higher than the reference voltage, the current of the second current bypass circuit increases, and conversely, the voltage of the third power supply is higher than the reference voltage. In addition to the first and second power supplies supplied from outside the semiconductor integrated circuit, a control circuit is provided that increases the current of the first current bypass circuit when the current is low. A virtual third power source is provided, and the voltage of this third power source is a voltage between the voltages of the first and second power sources, and the voltage between the first and third power sources and Even if logic circuits constituted by DCFLs are formed between the third and second power supplies, the second and third logic circuits 1 and 2 are configured as one logic circuit in the conventional technology. The current flowing through each logic circuit composed of 4 DCFLs is half that of the conventional technology.Consequences 1. In the logic circuit section configured with DCFL, there is no wasted power, and lower power consumption can be achieved. Even if the first and second current bypass circuits are formed, there is also a circuit that compares the reference voltage and the third power supply voltage and controls the current flowing through the current bypass circuit based on the magnitude relationship between them. The voltage of the power supply of No. 3 is controlled accurately and stably11, and the characteristics of the IC are further improved. Even if $1, II and the second power supply l2 are supplied from the outside and a virtual third power supply l3 is formed, the first power supply configured by the SCFL between the first power supply and the second power supply A logic circuit l4 is formed with a DCFL between the first and third power supplies and between the third and second power supplies.
Even if a second logic circuit l5 and a third logic circuit l6 are formed, the second logic circuit and the third logic circuit l6 are formed.
Logic circuit (Dai) Even if what was configured as one logic circuit in the conventional technology is divided into two, the current in the second logic circuit and the third logic circuit is equal, and the current in the third logic circuit is equal. The voltage of the first power supply is between the voltage of the first power supply and the voltage of the second power supply. 3.
The standard power supply voltage for ECL/IC of 3V is supplied.The third power supply voltage is -2. 6V, -2. 25
V and -■. 65V, which is almost equal to the optimum power supply voltage for the DCFL.As mentioned above, the DCFL operates normally even at this power supply voltage, and there is no decrease in operating speed.As a result, the second and third logics configured by the DCFL In the circuit, by reducing the current consumption to half that of the conventional technology, electric power can be used effectively, resulting in a significant reduction in power consumption. In this embodiment, a circuit is provided which stably and accurately controls the third power supply voltage.The first power supply l1 and the second power supply l2 are supplied from the outside.
Even if a virtual third power source 13 is formed, the first and third
Even though a fourth logic circuit 2l and a fifth logic circuit 22 are formed between the power supplies of , and between the third and second power supplies, the fourth logic circuit and the fifth logic circuit are
Even if the circuit is divided into two logic circuits, there are resistors Rl and 1 between the first and second power supplies.
．． Even if a reference voltage generation circuit consisting of R2 is provided and generates a reference voltage for the voltage of the third power supply, the difference between this reference voltage and the third power supply voltage is compared and amplified by the differential amplifier 23. and the third power supply
a current bypass circuit 24, a second current bypass circuit 24 between the third and second power supplies;
Even though the current bypass circuit W & 25 is provided, the first and second current bypass circuits are controlled by the correction and compensation outputs of the differential amplifier. If the equivalent resistance of the fourth logic circuit is
is smaller than the equivalent resistance of the logic circuit,
Even if the current in the second current bypass circuit is increased and the current in the first current bypass circuit is decreased, conversely, when the voltage of the third power supply is lower than the reference voltage, the equivalent of the fourth logic circuit This is a case where the resistance is larger than the equivalent resistance of the fifth logic circuit, and the current in the first current bypass circuit can be increased and the current in the second current bypass circuit can be decreased. Although the voltage of the third power supply can be kept equal to the reference voltage, the power supply voltage applied to the fourth and fifth logic circuits is controlled to be about half of the power supply voltage supplied from the outside. The effects of the invention include not only being able to stabilize the characteristics of the IC, but also being able to significantly reduce the current flowing through the fourth and fifth logic circuits compared to conventional technology, thereby reducing the power consumption of the IC. By using the present invention, SCFL by conventional technology
In other words, a virtual power supply can be installed in the DCFL part.
A: By stacking logic circuits composed of DCFLs one above the other, the power supply current flowing through each logic circuit has been reduced.As a result, the power consumption of the DCFL section has been reduced ('. We have provided a circuit that stabilizes the voltage and controls it with high precision.We have been able to improve the characteristics of the IC.In this specification, we have explained a circuit with a mixture of SCFL and DCFL, but it is also effective in other circuit configurations. It is obvious that

[Brief explanation of the drawing]

, FIG. 1 shows a circuit block of a semiconductor integrated circuit according to a first embodiment of the present invention, FIG. 2 shows a circuit block of a semiconductor integrated circuit according to another embodiment of the present invention, and FIG. 3 shows a circuit block constructed by DCFL. Figure 4 shows the circuit of an inverter constructed using SCFL, and Figure 5 shows the circuit block of a semiconductor integrated circuit with a mixture of SCFL and DCFL created by a conventional technique. Figure 6 shows the circuit of a DC-FL inverter. The relationship between propagation delay time and power supply voltage is shown in Figure 7.
This is a diagram showing the relationship between the propagation delay time and the power supply voltage in the L inverter.
・Virtual third electric current 14... Logical circulation configured by SCFL 21... First current bypass circulation
22...Second current bypass circuit 23...Up to differential amplification

Claims (3)

[Claims] (1) In a semiconductor integrated circuit configured using field effect transistors formed on a compound semiconductor substrate,
A first power supply and a second power supply having a lower potential than the first power supply are supplied from outside the semiconductor integrated circuit, and have a voltage between the voltage of the first power supply and the voltage of the second power supply. A virtual third power source that is not connected is formed, a first logic circuit having a first circuit type is formed between the first power source and the second power source, and a first logic circuit having a first circuit type is formed between the first power source and the third power source. between the power supplies and the third
A second circuit of a second circuit type is connected between the power supply of
and a third logic circuit are respectively formed. (2) The semiconductor integrated circuit according to claim 1, wherein the first logic format is SCFL and the second circuit format is DCFL. (3) In a semiconductor integrated circuit configured using field effect transistors formed on a compound semiconductor substrate,
A first power supply and a second power supply having a lower potential than the first power supply are supplied from outside the semiconductor integrated circuit, and have a voltage between the voltage of the first power supply and the voltage of the second power supply. A virtual third power source not connected to the first power source is formed, and logic circuits are configured between the first power source and the third power source and between the third power source and the second power source, respectively. A first current bypass circuit is formed between the first power supply and the third power supply, a second current bypass circuit is formed between the third power supply and the second power supply, and the second current bypass circuit is formed between the first power supply and the second power supply. A reference potential generation circuit for a third power supply is formed in between, and when the voltage of the third power supply is higher than the reference voltage, the current of the second current bypass circuit increases, and conversely, the voltage of the third power supply increases. 1. A semiconductor integrated circuit comprising: a control circuit that increases the current of the first current bypass circuit when the voltage is lower than a reference voltage.