JPH03190260A - Wafer processing device and method of manufacturing semiconductor integrated circuit device using same device - Google Patents

Abstract

PURPOSE:To make it possible to prevent interconnection corrosion induced by the adhesion of moisture after dry etching by installing a purging gas supply mechanism to a part of a carrier means and supplying purging gas to the surface of a semiconductor wafer to be supported to the carrier means. CONSTITUTION:A thin film deposited on the surface of a wafer 9 is dry-etched by way of a photomask resist, and the photomask resist is removed by ashing. After the removal, purging gas supply mechanism 15 and 16 are installed to a carrier means 14, which carries the wafer 9, to which an ashing process is applied, from a dry etching device 5 to a cleaning device 10 and the purging gas is supplied to the surface of the wafer 9 under carriage. As a result, the surface of the wafer 9 can be kept off from the ambient air and accordingly the moisture in the air can be prevented from adhering on the surface of the wafer 9. It is, therefore, possible to prevent the drop in corrosion effect in a wafer cleaning process, which arises from the adhesion of moisture on the surface of the wafer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a technology for manufacturing semiconductor integrated circuit devices, and particularly to a technology that is effective when applied to increase the reliability of wiring.

[Conventional technology]

A is mainly used as a wiring material for semiconductor integrated circuits formed on silicon (Sl) wafers because of its low electrical resistance, good adhesion to silicon oxide films, and ease of processing.
However, due to the miniaturization of interconnects associated with the increasing integration of semiconductor integrated circuits, stress migration (S
Disconnection of Aβ wiring caused by M) and electromigration (EM) has become a serious problem. As a countermeasure, the AJ wiring is alloyed (Cu SP d SS
) or silicide (MoSi2.WS
Laminated wiring technology has been put into practical use that aims to improve migration resistance by laminating conductive films such as TiN5TiW and TiN5TiW. As such a laminated wiring, for example, MoSi2/Al1-Cu-3i
/MoSi, ,TiN/Al-Cu-3i/Ti
N, TiW/Aj! -Cu-3i/TiW and the like are known. Regarding the migration resistance of the above Al laminated wiring, please refer to "Monthly Semiconductor World" published by Press Journal Co., Ltd., November 20, 1989.
There is a description on P40 to P43.

As described in the above-mentioned literature, among the above-mentioned Al laminated wirings, TiW/AI! -(:uSi/Ti
Although W has the advantage of excellent migration resistance and good coverage in stepped portions and contact holes, it has the disadvantage of being susceptible to wiring corrosion. The reason for this is the chlorine gas (BCJ3) used when dry etching the β-Cu-Si film.
Since chlorine in TiW (such as 10Cβ2) tends to remain on the surface of TiW, this residual chlorine combines with moisture in the atmosphere to form hydrochloric acid, which is thought to cause wiring corrosion.

Therefore, in order to prevent the wiring corrosion, it is considered that after forming the Al laminated wiring by dry etching, the surface of the wafer should be immediately cleaned to remove residual chlorine. Specifically, T iW/Aj! deposited on the wafer. −
The Cu-3i/TiW composite film was buttered by dry etching to form an Al laminated wiring, and then the photoresist film remaining on the wafer was removed by ashing.
The wafer may be immediately transferred from the dry etching apparatus to the cleaning apparatus, and the surface of the wafer may be thoroughly cleaned with a large amount of pure water.

[Problem to be solved by the invention]

However, according to the inventor's study, the above-mentioned wiring corrosion prevention method does not allow moisture in the atmosphere to adhere to the surface of the wafer because the wafer is exposed to the atmosphere while being transported from the dry etching equipment to the cleaning equipment. However, it has been found that there is a drawback in that the anticorrosive effect of subsequent wafer cleaning is significantly reduced. In addition, as a countermeasure, it is possible to consider an equipment structure in which a cleaning device that can create a dry gas atmosphere is connected to the dry etching device, and a transfer arm or the like is used to transport the wafer to the cleaning device without exposing it to the atmosphere. This type of equipment structure has the disadvantage that convection is formed within the cleaning equipment when gas is exchanged, so foreign matter adhering to the inner walls of the equipment tends to fly onto the wafer surface. be.

The present invention has been made focusing on the above problems,
The purpose is to provide a technique that can effectively prevent wiring corrosion due to moisture adhesion after dry etching.

Another object of the present invention is to provide a technique that achieves the above objects and can effectively prevent foreign matter from adhering to the wafer surface during wiring anticorrosion treatment.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

One invention of the present application is to dry-etch a thin film deposited on the surface of a wafer through a photoresist mask, then remove the photoresist mask by ashing, and then remove the etching residue remaining on the surface of the wafer by wet cleaning. A purge gas supply mechanism is provided on the transport means for transporting the wafers that have been etched from the dry etching apparatus to the cleaning apparatus, and supplies purge gas to the surface of the wafers being transported.

[Effect]

According to the above-mentioned means, by supplying purge gas to the surface of the wafer being transported, the surface of the wafer can be shielded from the atmosphere, thereby preventing moisture in the atmosphere from adhering to the surface of the wafer. I can do it. Thereby, it is possible to effectively prevent the deterioration of the anticorrosion effect in the wafer cleaning process due to the adhesion of moisture.

〔Example〕

FIG. 3 is a schematic plan view of the wafer processing apparatus 1 used in this embodiment. The wafer processing apparatus 1 includes a first processing chamber 2 and a second processing chamber 3 that are spaced apart from each other, and a load lock chamber 4 that connects these two processing chambers 2 and 3.

A dry etching chamber 5 and an ashing chamber 6 are installed in the first processing chamber 2 whose interior is evacuated to a predetermined degree of vacuum. A cassette chamber 7 is installed at one end of the processing chamber 2, into which a plurality of semiconductor wafers 9 housed in a wafer cassette 8 are carried.

On the other hand, a cleaning chamber 10 and a hot plate 11 are installed in the second processing chamber 3 whose inside pressure is equal to atmospheric pressure. A cassette chamber 7 is installed at one end of the second processing chamber 3, and wafers 9 that have undergone processing steps are accommodated one by one in a wafer cassette 8.

Inside the loader chamber 4, there is a transfer arm (transport mechanism) that transfers the wafer 9 placed on the unloader 12 of the first processing chamber 2 to the positioning stage 13 of the second processing chamber 3.
14 have been installed. FIG. 1 shows the transfer arm 14
FIG. For example, the transfer arm 14 made of stainless steel has a hollow purge gas supply pipe 15 inside thereof, and has a structure in which the purge gas supplied from the outside through the supply pipe 15 is sprayed onto the surface of the wafer 9 through the blowout hole 16a. There is. The purge gas is, for example, an inert gas such as nitrogen or argon from which water has been removed, or dry air.

Next, a wiring anticorrosion treatment process of this embodiment using the wafer processing apparatus 1 described above will be explained.

First, the wafer 9 on which the conductive film deposition process and the photoresist mask formation process prior to the wiring formation process have been completed is placed in the wafer cassette 8 and carried into the cassette chamber 7 of the first processing chamber 2 .

FIG. 4 shows a cross-sectional structure of the wafer 9 after completing the conductive film deposition process and the photoresist mask forming process. In this figure, on the main surface of a substrate 20 made of, for example, p-type silicon single crystal, there is a field insulating film 2 made of, for example, S10°.
1 and a gate insulating film 22 are formed. A p-type channel stopper layer 23 into which, for example, B (boron) ions are implanted is formed under the field insulating film 21 . On the gate insulating film 22, an n-channel MlS −
Gate electrodes 24 of FETs (Q, , Q2) are formed. The gate electrode 24 is made of, for example, a polysilicon film and WSi□ (or MOSi2.Ta) sequentially from the bottom layer.
Si2. It has a polycide structure in which silicide films such as TiSi, ) are laminated. The underlying polysilicon film is
The resistance value is reduced by doping with n-type impurities such as P (phosphorus) or As (arsenic). A sidewall spacer 25 made of, for example, 5102 is formed on the sidewall of the gate electrode 24 . An insulating film 26 made of the same <SiO2 is formed on the gate electrode 24.

An n-channel MIS-FE'r (Ql
, Q2), a low impurity concentration n-semiconductor region 27 and a high impurity concentration n-semiconductor region 28 are formed, forming the source and drain of the so-called LDD (light
It has a doped drain structure.

The n-semiconductor region 27 is formed in a self-aligned manner by ion-implanting P or the like into the surface of the substrate 20 using the gate electrode 24 as a mask. Also, n” semiconductor region 2
8 is formed in a self-aligned manner by ion-implanting As or the like into the surface of the substrate 20 using the gate electrode 24 and the sidewall spacer 25 on its side wall as a mask.

The upper layer of the MIS-FET (Q, , Q2) has a substrate 2.
An insulating film 29 made of, for example, 5 iOa is formed to cover the entire surface of the substrate. Further, on the insulating film 29, for example, BPSG (boro phosphor) is formed.
An interlayer insulating film 30 made of (5ilicate glass) is formed, thereby reducing the level difference on the surface of the substrate 20. A part of the interlayer insulating film 30 includes
A contact hole 31 is opened to reach one n' semiconductor region 28 of the MIS-FET (Q, , Q2'). On the interlayer insulating film 30, for example, a TiW film 32, an Al-Cu-3i alloy film 33, and a Ti
A conductive film 34 in which a W film 32 is laminated is deposited. A photoresist mask 35 is formed on the conductive film 34 above the contact hole 31 .

To pattern the conductive film 34 and form wiring, first, one wafer 9 is taken out of the sea urchin 7% cassette 8 carried into the cassette chamber 7 and placed on the loader 17 in the first processing chamber 2. place Next, this wafer 9 is carried into the dry etching chamber 5 using the robot arm 18a, and the conductive film 34 is etched. At this time, an etching gas such as S Fs + CzC13F3 is used for etching the TiW film 32, and an etching gas such as B CAs + Clx is used for etching the Al-Cu-3i alloy film 33.
Use an etching gas such as

Next, the etched wafer 9 is transferred from the dry etching chamber 5 to the ashing chamber 6 using the robot arm 18b, and the photoresist mask 35 is removed using an ashing gas such as Oz+CFs. 02 Using gas, the resist residue remaining on the stepped portions of the surface of the wafer 9 is removed, and the Af made of the TiW/AR-Cu-3i/TiW composite film as shown in FIG.
A first layer wiring 19 is obtained. Minute foreign matter such as conductive film residues, etching gas residues such as chlorine, and resist decomposition products adhere to the surface and side walls of the AA laminated wiring 190 thus obtained. In particular, chlorine combines with moisture in the atmosphere to form hydrochloric acid, which causes wiring corrosion.
After the ashing is completed, the surface of the wafer 9 must be immediately cleaned to remove these foreign substances.

Therefore, the wafer 9 after ashing is taken out from the ashing chamber 6 using the robot arm 18b and placed on the unloader 12, and then the wafer 9 is transported to the load lock chamber 4 using the transport arm 14. The inside of the load lock chamber 4 is evacuated in advance to approximately the same degree of vacuum as the processing chamber 2, and the inside is returned to atmospheric pressure at the same time as the wafer 9 is carried in. At this time, a purge gas having a dew point of about 180° C., for example, is sprayed onto the surface of the wafer 9 through the blowing hole 16a of the transfer arm 14 to shield the surface of the sea urchin I\9 from the atmosphere. Then, while continuing to supply the purge gas, the wafer 9 is transported to the second processing chamber 2 and placed on the positioning stage 13. In this way, the sea urchin /
While the X9 is being transferred to the second processing chamber 2, purge gas is sprayed onto the wafer 9 to shield its surface from the atmosphere, thereby effectively preventing moisture and foreign matter in the atmosphere from adhering to the surface of the wafer 9. be able to.

Further, in this embodiment, as shown in FIG. 2, a purge gas supply ring 36 is arranged above the positioning stage 13,
By spraying purge gas onto the wafer 9 at the same time as the wafer 9 is placed on the positioning stage 13, the wafer 9 is reliably prevented from being exposed to the atmosphere before being carried into the cleaning chamber 10.

Next, the wafer 9 is carried into the cleaning chamber 10 and subjected to cleaning processing. A spin cup (not shown) is provided inside the cleaning chamber 10, and spins the wafer 9 at a speed of, for example, 1000 rpm.
After washing the surface of the wafer 9 with pure water for about 10 minutes while rotating the wafer 9, the surface of the wafer 9 is rinsed with pure water for about 30 seconds while rotating the wafer 9 at a speed of, for example, 3000 rpm. Note that as the cleaning liquid, in addition to pure water, for example, a weak acid aqueous solution or a weak alkali aqueous solution may be used.

After removing chlorine and other foreign substances remaining on the surface of the wafer 9 in this way, the wafer 9 is placed on the hot plate 11 using the robot arm 18C, and after completely removing moisture, the cassette The wafers are stored in a wafer cassette 8 in the chamber 7.

As above, the invention made by the present inventor has been specifically explained based on Examples, but the present invention is not limited to the above-mentioned Examples, and it is understood that various changes can be made without departing from the gist thereof. Needless to say.

In the embodiment, TiW/Af-Cu-5i/TiW
Although the anti-corrosion treatment of β-layer wiring made of a composite film has been explained, it is not limited to this, for example, MoS
i, /Af-Cu-3i/M.

Si2 composite film and TiN/Aj'-Cu-3i/TiN
It can be applied to all types of wiring that is dry-etched using a chlorine-based etching gas, such as A1 laminated wiring made of composite films.

For example, as shown in FIG. 6, a purge gas supply pipe 15 is connected to the cassette chamber 7 to fill the inside of the cassette chamber 7 with purge gas, and the wafer 9 that has undergone dry etching and ashing is temporarily transferred to the cassette chamber 7. After being accommodated in the container 7, it may be transported to the cleaning step.

In the above explanation, the invention made by the present inventor was mainly applied to the anti-corrosion treatment technology for wiring, which is the field of application that formed the background of the invention, but the present invention is not limited to this, and It can be applied to all wafer processing processes that require shielding the surface of the wafer from oxygen, moisture, foreign matter, etc. in the atmosphere.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

The thin film deposited on the surface of the wafer is dry-etched through a photoresist mask, and then the photoresist mask is removed by ashing, and the etching residue remaining on the surface of the wafer is removed by wet cleaning. According to the present invention, a purge gas supply mechanism is provided in the transport means for transporting the wafer from the etching device to the cleaning device, and the purge gas is supplied to the surface of the wafer being transported, so that the surface of the wafer being transported can be shielded from the atmosphere. It is possible to prevent atmospheric moisture and foreign matter from adhering to the surface of the wafer. As a result, it is possible to effectively prevent a decrease in the anticorrosion effect during the wafer cleaning process due to moisture adhesion, and wafer contamination due to foreign matter adhesion during transportation.

[Brief explanation of drawings]

FIG. 1 is a cutaway sectional view of a main part showing a transfer arm of a wafer processing apparatus which is an embodiment of the present invention, FIG. 2 is a perspective view showing a positioning stage of this wafer processing apparatus, and FIG. A schematic plan view of the wafer processing apparatus, FIGS. 4 and 5 are cross-sectional views of a semiconductor wafer, respectively showing the manufacturing process of a semiconductor integrated circuit device using this wafer processing apparatus, and FIG. FIG. 2 is a schematic perspective view showing a cassette chamber of a wafer processing apparatus according to an embodiment. 1... Semiconductor wafer processing equipment, 2, 3... Processing chamber,
4... Load rotator chamber, 5... Dry etching chamber, 6... Ashing chamber, 7... Cassette chamber, 8...
・Wafer cassette, 9... semiconductor wafer 10...
Cleaning chamber, 11...Hot plate, 12...Unloader, 13...Positioning stage, 14...Transport arm (transport means), 15...Purge gas supply pipe, 16
...Blowout hole, 17...Loader, 18a. 18b, 18C...Robot arm, 19...Af
Laminated wiring, 20... Substrate, 21... Field insulating film, 22... Gate insulating film, 23... Channel stopper layer, 24... Gate electrode, 25... Side wall spacer, 2629. ...Insulating film, 27...n-
Semiconductor region, 28...n semiconductor region, 30... Interlayer insulating film, 31... Contact hole, 32...T
iW membrane, 33...Aj! -Cu-5i alloy film, 34
... Conductive film, 35... Photoresist mask, 6 - Purge gas supply ring.

Claims (1)

[Claims] 1. A first processing chamber that performs a first processing on a semiconductor wafer;
a second processing chamber that performs a second processing on the semiconductor wafer;
A wafer processing apparatus comprising a transport means for transporting the semiconductor wafer from the first processing chamber to the second processing chamber, wherein a purge gas supply mechanism is provided in a part of the transport means,
A wafer processing apparatus characterized in that a purge gas is supplied to the surface of a semiconductor wafer held by the transport means. 2. Wafer processing according to claim 1, characterized in that a purge gas supply mechanism is provided above the positioning stage of the processing chamber, and the purge gas is supplied to the surface of the semiconductor wafer placed on the processing stage. Device. 3. The wafer processing apparatus according to claim 1, wherein a purge gas supply mechanism is provided in the cassette chamber of the processing chamber, and the cassette chamber containing the semiconductor wafer is filled with purge gas. 4. The wafer processing apparatus according to claim 1, 2 or 3, wherein the first processing is dry etching and ashing, and the second processing is wafer cleaning. 5. After dry etching the thin film deposited on the surface of the semiconductor wafer through a photoresist mask, removing the photoresist mask by ashing, and then using the wafer cleaning apparatus according to claim 4 when wet cleaning the surface of the semiconductor wafer. A method of manufacturing a semiconductor integrated circuit device, characterized in that: 6. The method of manufacturing a semiconductor integrated circuit device according to claim 5, wherein the thin film is made of a conductive film mainly made of aluminum, and a chlorine-based gas is used as the etching gas.