JPH03190187A - Multilayer printed wiring board - Google Patents

Multilayer printed wiring board

Info

Publication number
JPH03190187A
JPH03190187A JP1329272A JP32927289A JPH03190187A JP H03190187 A JPH03190187 A JP H03190187A JP 1329272 A JP1329272 A JP 1329272A JP 32927289 A JP32927289 A JP 32927289A JP H03190187 A JPH03190187 A JP H03190187A
Authority
JP
Japan
Prior art keywords
circuit pattern
layer
wiring board
printed wiring
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1329272A
Other languages
Japanese (ja)
Inventor
Hiroshi Ohira
洋 大平
Yukihiro Shinohara
篠原 征洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1329272A priority Critical patent/JPH03190187A/en
Publication of JPH03190187A publication Critical patent/JPH03190187A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable a soldering work to be easily made on the outermost layer and a wiring board to have a required circuit function at all times by a method wherein an inner circuit pattern and an interlaminar conductor are formed of metal powder containing conductive resin composition, and at least the soldered part of the outermost circuit pattern is formed of metal foil. CONSTITUTION:An inner circuit pattern 2 is formed of conductive paste which contains synthetic resin as a binder component and composed of many layers which are arranged in a heat resistant plastic resin layer 1 such as a polysulfone resin layer and electrically insulated from each other. An outermost circuit pattern layer 3 where required electronic components are mounted and their leads are soldered is provided with a soldering part such as a pad, where required electronic components are mounted and their leads are soldered, is formed of a metal foil through a selective etching. An interlaminar conductor 5 is formed of conductive paste which contains synthetic resin as a binder component and electrically connects the inner circuit patterns 2 together, the inner circuit pattern 2 with the outer circuit pattern 3, and the outer circuit patterns 3 together through through-holes or viaholes.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は多層プリント配線板に係り、特に実装回路装置
用の改良された多層プリント配線板に関する。
DETAILED DESCRIPTION OF THE INVENTION OBJECTS OF THE INVENTION (Industrial Field of Application) The present invention relates to multilayer printed wiring boards, and more particularly to improved multilayer printed wiring boards for packaged circuit devices.

(従来の技術) 配線回路の小形化ないし回路部分のコンパクト化などを
目的にして、多層プリント配線板を基体とし、これに所
要の電子部品を搭載・実装した構成の実装回路装置が広
く実用に供されている。
(Prior art) For the purpose of downsizing wiring circuits or compacting circuit parts, mounted circuit devices have been widely put into practical use, with a multilayer printed wiring board as a base and required electronic components mounted and mounted on this board. It is provided.

しかして、上記実装回路用多層プリント配線板の一形式
として、合成樹脂系の多層プリント配線板がある。すな
わち、第1の方式として、絶縁紙やガラスクロスなどを
基材とした樹脂含浸型の絶縁体層面に貼着した金属箔の
選択エツチングにより所要の回路パターンを形成した内
層回路パターン素板と、この内層回路パターン素板に介
在してこれらを一体化するプリプレグ硬化層と、同じく
プリプレグ硬化層を介して一体化された金属箔の選択エ
ツチングによって形成された最外層回路パターン素板と
を具備して成る多層プリント配線板が挙げられる。第2
〜の方式としては、前記内外各層の回路パターンを、た
とえば銀、銅、金、ニッケルなどの金属粉末とバインダ
ーとしての合成樹脂を含む導電性組成物で構成した多層
プリント配線板が挙げられる。なお、上記構成の多層プ
リント配線板においては、内層回路パターン間、内層回
路パターン−外層回路パターン間あるいは外層回路パタ
ーン間についてスルホールやピアホールなどにより所要
の電気的な接続が行われている。
As one type of multilayer printed wiring board for mounted circuits, there is a synthetic resin multilayer printed wiring board. That is, as a first method, an inner layer circuit pattern blank is formed with a desired circuit pattern by selective etching of a metal foil adhered to the surface of a resin-impregnated insulator layer made of insulating paper or glass cloth as a base material; A prepreg hardened layer that interposes on this inner layer circuit pattern blank plate and integrates them, and an outermost layer circuit pattern blank formed by selective etching of metal foil that is also integrated via the prepreg hardened layer. For example, a multilayer printed wiring board consisting of Second
Examples of the method include a multilayer printed wiring board in which the circuit patterns of the inner and outer layers are made of a conductive composition containing a metal powder such as silver, copper, gold, or nickel, and a synthetic resin as a binder. In the multilayer printed wiring board having the above structure, necessary electrical connections are made between inner layer circuit patterns, between inner layer circuit patterns and outer layer circuit patterns, or between outer layer circuit patterns using through holes, peer holes, or the like.

(発明か解決しようとする課題) しかし、上記構成の合成樹脂系多層プリント配線板には
、実用上次のような不都合が認められる。先ず第1の方
式の場合、つまり各層の回路パターンが、金属箔をベー
スにして形成されている多層プリント配線板の場合は、
回路パターン層間の電気的な接続層や回路パターン層と
マトリックスを成す合成樹脂系(絶縁体)との物性、た
とえば熱膨脹率などが大きく相違するため、熱履歴、応
力作用あるいは冷熱サイクルによって、微細な回路パタ
ーンが切断などすることがしばしばあり、所要の回路機
能が損われるなど信頼性の点に問題がある。また、第2
の方式の場合、つまり最外層回路パターンも含めて導電
体領域全体を、いわゆる導電性ペーストで形成した多層
プリント配線板の場合は、最外層回路パターン形成面に
所要の電子部品を搭載・実装するため、半田付けしよう
としても、その半田付けが困難で、ときには半田付は不
能がしばしば起る。
(Problems to be Solved by the Invention) However, the synthetic resin multilayer printed wiring board having the above structure has the following practical disadvantages. First, in the case of the first method, that is, in the case of a multilayer printed wiring board in which the circuit pattern of each layer is formed based on metal foil,
Because the electrical connection layer between the circuit pattern layers and the physical properties of the circuit pattern layer and the synthetic resin (insulator) forming the matrix, such as coefficient of thermal expansion, are significantly different, thermal history, stress action, or cooling/heating cycles may cause microscopic differences. There are problems with reliability, such as circuit patterns often being cut, and required circuit functions being impaired. Also, the second
In the case of the above method, that is, in the case of a multilayer printed wiring board in which the entire conductor area, including the outermost layer circuit pattern, is formed with a so-called conductive paste, the required electronic components are mounted and mounted on the surface on which the outermost layer circuit pattern is formed. Therefore, even if an attempt is made to solder, it is difficult to solder, and sometimes soldering is often impossible.

本発明は上記事情に対処してなされたもので、最外層面
における所要の半田付けが容易に可能で、所要の回路機
能を常に保持する信頼性の高い多層プリント配線板の提
供を目的とする。
The present invention has been made in response to the above-mentioned circumstances, and aims to provide a highly reliable multilayer printed wiring board that can easily perform required soldering on the outermost layer and always maintains required circuit functions. .

[発明の構成] (課題を解決するための手段) 本発明は、電子部品を搭載・半田付けする最外層回路パ
ターン、内層回路パターンおよび回路パターン層間を電
気的に接続する層間導体を備えた多層プリント配線板に
おいて、 前記内層回路パターンおよび層間導体を金属粉末含有の
導電性樹脂組成物で構成しがっ、゛最外層回路パターン
の少くとも被半田付は部を金属箔にて構成して成ること
を特徴とする。
[Structure of the Invention] (Means for Solving the Problems) The present invention provides a multilayer circuit pattern that includes an outermost layer circuit pattern on which electronic components are mounted and soldered, an inner layer circuit pattern, and an interlayer conductor that electrically connects the circuit pattern layers. In the printed wiring board, the inner layer circuit pattern and the interlayer conductor are made of a conductive resin composition containing metal powder, and ``at least the part to be soldered of the outermost layer circuit pattern is made of metal foil. It is characterized by

(作 用) 上記構成によれば、回路パターン層間の電気的な接続層
や回路パターン層とマトリックスを成す合成樹脂系(絶
縁体)との物性、たとえば熱膨脹率など近似しているた
め、熱履歴や使用環境の温度変化などにより、微細な回
路パターンなどが破断することも全面的に回避し得る。
(Function) According to the above configuration, the electrical connection layer between the circuit pattern layers and the physical properties of the circuit pattern layer and the synthetic resin system (insulator) forming the matrix are similar, such as the coefficient of thermal expansion, so that the thermal history is Breakage of minute circuit patterns due to temperature changes in the operating environment can also be completely avoided.

また、最外層回路パターンの少くとも被半田付は部は、
金属箔をベースとして形成されているため、所要の半田
付けも容易かつ、確実に達成し得る。
In addition, at least the part to be soldered of the outermost layer circuit pattern,
Since it is formed based on metal foil, the required soldering can be easily and reliably achieved.

(実施例) 以下第1図を参照して本発明の詳細な説明する。第1図
は本発明に係る多層プリント配線板の構成例を断面的に
示したもので、1はたとえばポリスルホン樹脂のような
耐熱性熱可塑性樹脂層、2は前記耐熱性熱可塑性樹脂層
1中に多層的にかつ、互いに電気的に絶縁されて配設さ
れたいわゆる合成樹脂をバインダー成分とする導電性ペ
ーストから成る内層回路パターン層である。また、3は
所要の電子部品4を搭載・半田付けする最外層(最外表
面)回路パターン層で、少くとも前記電子部品4のマウ
ントないしリードなど半田付けするパッド部などの被半
田付は部は金属箔をベースとして選択エツチングで形成
されている。5は前記内層回路パターン層2間、内層回
路パターン層2−外層回路パターン層3間あるいは外層
回路パターン層3間についてスルホールやピアホールな
どにより、所要の電気的な接続を行ういわゆる合成樹脂
をバインダー成分とする導電性ペーストから成る層間接
続導体部である。
(Example) The present invention will be described in detail below with reference to FIG. FIG. 1 shows a cross-sectional view of an example of the structure of a multilayer printed wiring board according to the present invention, in which 1 is a heat-resistant thermoplastic resin layer such as polysulfone resin, and 2 is a layer of heat-resistant thermoplastic resin in the heat-resistant thermoplastic resin layer 1. This is an inner circuit pattern layer made of a conductive paste containing a so-called synthetic resin as a binder component, which is arranged in multiple layers and electrically insulated from each other. Reference numeral 3 denotes an outermost layer (outermost surface) circuit pattern layer on which the required electronic components 4 are mounted and soldered; is formed by selective etching using metal foil as a base. 5 is a binder component of a so-called synthetic resin that makes necessary electrical connection between the inner circuit pattern layer 2, between the inner circuit pattern layer 2 and the outer circuit pattern layer 3, or between the outer circuit pattern layer 3 through through holes, peer holes, etc. This is an interlayer connection conductor made of conductive paste.

しかして、上記構成の本発明に係る多層プリント配線板
は、次のようにして容易に製造し得る。
Therefore, the multilayer printed wiring board according to the present invention having the above structure can be easily manufactured as follows.

たとえば、厚さ 0.05■l程度のポリスルホン樹脂
フィルムに所要の接続用孔を穿設するとともに、その片
面もしくは両面に、たとえばポリスルホン樹脂をバイン
ダー成分とし銅粉末を分散・含有する導電性ペーストを
スクリーン印刷法により所要の内層回路パターン層2お
よび層間接続導体部5を形成した内層回路バター゛ン素
板を用意する。
For example, a polysulfone resin film with a thickness of about 0.05 μl is punched with the required connection holes, and a conductive paste containing polysulfone resin as a binder and copper powder dispersed therein is applied to one or both sides of the film. An inner layer circuit pattern base plate is prepared on which the required inner layer circuit pattern layer 2 and interlayer connection conductor portion 5 are formed by a screen printing method.

方、同じく厚さ 0.05■l程度のポリスルホン樹脂
フィルムに所要の接続用孔を穿設するとともに、最外層
を成す片方の面に貼着された、たとえば銅箔を選択エツ
チングして所要の最外層回路パターン層3を形成した外
層回路パターン素板を用意し、所要の接続用孔内に前記
導電性ペーストを充填して層間接続導体部5を形成する
On the other hand, in addition to drilling the required connection holes in a polysulfone resin film with a thickness of about 0.05 μl, selectively etching, for example, a copper foil attached to one side of the outermost layer, to form the required holes. An outer circuit pattern blank on which the outermost circuit pattern layer 3 is formed is prepared, and the conductive paste is filled into required connection holes to form interlayer connection conductor portions 5.

しかる後、上記用意した内層回路パターン素板複数枚を
、位置合せして重ね合せ、さらにその少くとも片面側に
外層回路パターン素板を、金属白ベース回路パターンが
最外層として配置されるように位置合せして重ねた後、
加熱・加圧成形処理を施し、前記重ね合せられたポリス
ルホン樹脂フィルムの互いに対接する面同士を溶着一体
化させるとともに、互いに対応する層間接続導体部5を
充填一体化させることにより、所望の多層プリント配線
板を得ることができる。
After that, the plurality of inner layer circuit pattern blank plates prepared above are aligned and stacked, and the outer layer circuit pattern blank plates are placed on at least one side of the inner layer circuit pattern blank plates, and the metal white base circuit pattern is placed as the outermost layer. After aligning and overlapping,
A desired multilayer print is produced by applying heat and pressure molding to weld and integrate the mutually opposing surfaces of the stacked polysulfone resin films, and by filling and integrating the corresponding interlayer connection conductor portions 5. A wiring board can be obtained.

このようにして構成し得る本発明に係る多層プリント配
線板、たとえばIOX Loam、厚さ 0.5■、回
路パターン4層構成で、内層回路パターン層間同士およ
び内層回路パターン層−外層回路パターン層間の層間接
続導体部500箇所、貫通接続導体部100箇所を有す
る多層プリント配線板(実施例)と、前記従来例の第1
の方式で絶縁層をガラスクロス−エポキシ樹脂系として
構成された同一構成を採った多層プリント配線板(比較
例)とについて、熱衝撃テストおよび曲げテストをそれ
ぞれ行ったところ次のごとくであった。
A multilayer printed wiring board according to the present invention that can be constructed in this manner, for example, IOX Loam, has a thickness of 0.5 cm and has a four-layer circuit pattern structure, and has a structure in which the inner circuit pattern layers are interconnected and between the inner circuit pattern layer and the outer circuit pattern layer. A multilayer printed wiring board (embodiment) having 500 interlayer connection conductor parts and 100 through connection conductor parts, and the first conventional example
A thermal shock test and a bending test were conducted on a multilayer printed wiring board (comparative example) having the same structure in which the insulating layer was made of glass cloth and epoxy resin based on the above method, and the results were as follows.

実施例の場合。For example.

熱衝撃テスト 回路を成す導体層に異常なし、曲げテス
ト  回路を成す導体層に異常なし、比較例の場合。
Thermal shock test: No abnormality in the conductor layer forming the circuit. Bending test: No abnormality in the conductor layer forming the circuit. Comparative example.

熱衝撃テ、スト 回路を成す導体層にオープンが多発し
測定不能、 曲げテスト  曲げ回数1回で回路を成す導体層にオー
ブン発生、 なお、熱衝撃テストは、−60”030分、+125℃
30分を1サイクルとして500サイクル繰り返した場
合であり、また曲げテストは、曲げ率20%として10
00回繰り返した場合である。
Thermal shock test: The conductor layer that makes up the circuit has many opens and cannot be measured.Bending test: The conductor layer that makes up the circuit has an oven after one bend.Thermal shock test: -60"030 minutes, +125℃
This is the case where 500 cycles are repeated with 30 minutes as one cycle, and the bending test is performed at 10% with a bending rate of 20%.
This is a case of repeating 00 times.

さらに、上記構成された本発明に係る多層プリント配線
板について、外層回路パターンの被半田付は部に対する
半田付は性の評価を行ったところ、容易かつ、各自な半
田付けが可能であった。
Furthermore, when the multilayer printed wiring board according to the present invention having the above structure was evaluated for solderability of the outer layer circuit pattern to be soldered, it was found that soldering was easy and possible in each individual's manner.

上記では多層プリント配線板の絶縁体層をポリスルホン
樹脂で構成したが、たとえばポリフェニレンサルファイ
ド樹脂、ポリエーテル樹脂、ポリエーテルイミド樹脂ポ
リエーテルエーテルケトン樹脂など他の熱可塑性樹脂や
たとえば絶縁紙ないし絶縁クロス類を基材としたもので
もよい。
In the above example, the insulating layer of the multilayer printed wiring board is made of polysulfone resin, but other thermoplastic resins such as polyphenylene sulfide resin, polyether resin, polyetherimide resin, polyether ether ketone resin, etc., or insulating paper or insulating cloth may be used. It may be based on.

また、回路パターン層間の電気的な接続導体部および内
層回路パターン層の形成も、前記例示の導電性ペースト
に限らず、合成樹脂をバインダーとした他の導電性ペー
ストで構成してもよい。
Further, the formation of the electrical connection conductor portion between the circuit pattern layers and the inner circuit pattern layer is not limited to the above-mentioned conductive paste, but may be formed using another conductive paste using a synthetic resin as a binder.

[発明の効果コ 上記本発明によれば、回路パターン層間の電気的な接続
導体部や回路パターン層とマトリックスを成す合成樹脂
系(絶縁体)との物性が近似しているため、熱履歴や使
用環境の温度変化などによって、微細な回路パターンな
どが破断することも全面的に回避され、所要の回路機能
を常な保持し得る。しかも、最外層回路パターンの少く
とも被半田付は部は、金属箔をベースとして形成されて
いるため、所要の半田付けも容易かつ、確実に達成し得
る。かくして、本発明に係る多層プリント配線板は、機
能的にも信頼性の高い実装回路装置の構成に適するもの
といえる。
[Effects of the Invention] According to the present invention, the electrical connection conductor between the circuit pattern layers and the physical properties of the circuit pattern layer and the synthetic resin system (insulator) forming the matrix are similar, so thermal history and Breakage of minute circuit patterns due to temperature changes in the usage environment is completely avoided, and the required circuit functions can be maintained at all times. Moreover, since at least the portion of the outermost layer circuit pattern to be soldered is formed based on metal foil, the required soldering can be easily and reliably achieved. Thus, it can be said that the multilayer printed wiring board according to the present invention is suitable for the construction of a functionally reliable mounted circuit device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る多層プリント配線板の構成例を示
す断面図である。 1・・・・・・耐熱性熱可塑性樹脂層 2・・・・・・内層回路パターン層 3・・・・・・最外層回路パターン層 4・・・・・・電子部品
FIG. 1 is a sectional view showing an example of the structure of a multilayer printed wiring board according to the present invention. 1...Heat-resistant thermoplastic resin layer 2...Inner circuit pattern layer 3...Outermost circuit pattern layer 4...Electronic component

Claims (1)

【特許請求の範囲】  電子部品を搭載・半田付けする最外層回路パターン、
内層回路パターンおよび回路パターン層間を電気的に接
続する層間導体を備えた多層プリント配線板において、 前記内層回路パターンおよび層間導体を金属粉末含有の
導電性樹脂組成物で構成しかつ、最外層回路パターンの
少くとも被半田付け部を金属箔にて構成して成ることを
特徴とする多層プリント配線板。
[Claims] An outermost layer circuit pattern on which electronic components are mounted and soldered;
A multilayer printed wiring board comprising an inner layer circuit pattern and an interlayer conductor that electrically connects the circuit pattern layers, wherein the inner layer circuit pattern and the interlayer conductor are made of a conductive resin composition containing metal powder, and the outermost layer circuit pattern A multilayer printed wiring board, characterized in that at least the part to be soldered is made of metal foil.
JP1329272A 1989-12-19 1989-12-19 Multilayer printed wiring board Pending JPH03190187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1329272A JPH03190187A (en) 1989-12-19 1989-12-19 Multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1329272A JPH03190187A (en) 1989-12-19 1989-12-19 Multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPH03190187A true JPH03190187A (en) 1991-08-20

Family

ID=18219594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1329272A Pending JPH03190187A (en) 1989-12-19 1989-12-19 Multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH03190187A (en)

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