JPH03186914A - Connection device for ic card - Google Patents

Abstract

PURPOSE:To prevent the runaway of a system and the like by generating the reset signal of the system of a device mainbody at every time at the time of putting in and pulling out an IC card (memory card). CONSTITUTION:When a detection terminal with a shortest lead wire and the terminal of the memory card 1 are connected at the time of putting in and pulling out the memory card 1 on a device mainbody 2-side or when the terminals are set to an interruption state, the reset signal of a main controller (CPU and the like) in the device mainbody 2 is generated. When the memory card 1 is pulled out or it is inserted, the system provided with the device is reset without fail by the generated reset signal. Thus, the system is prevented from running away at the time of putting in and pulling out the memory card 1.

Description

[Detailed Description of the Invention] Industrial Application Field] This invention relates to an IC used in a personal computer, etc.
The present invention relates to a card connecting device, and more particularly to an IC card connecting device that resets the system when an IC card is inserted or removed to prevent a program from running out of control.

[Conventional Examples] In recent years, advances in LSI technology have led to the development of large-capacity memory elements, and IC cards have been proposed to replace magnetic cards. I have a memory card.

A personal computer or the like using such a card is equipped with an IC card connecting device shown in FIGS. 5 and 6, for example.

In this case, there are a plurality of terminals 3 on the main body side of the device 2 into which the memory card 1 can be inserted and removed. ．． 3. ．． 33...
A connector 4 having terminals 3 . g 3 n is provided on the memory cart 1 . .

3□, 33. ..., a plurality of terminals 51 that can be connected to 3n,
5□.

53. ..., 5n are provided. Also, from the point of view of system malfunction prevention +t, the leads of terminals 3i, 32 of the power supply line (earth and power supply lines) should be connected to the terminals of other signal lines (data, I-res, and control lines). 3
3゜..., it is longer than 3n, so when inserting the memory card, the power supply line is connected first,
After that, the signal line is connected,
Also, when the memory cart ↓ is removed, those power supply lines are finally turned off.

In addition, as a connection device for the IC card, the above-mentioned ground terminal 3. is the longest lead, the ground is connected first when memory card 13 is inserted, and the ground is disconnected last when memory card 1 is removed.
There is a device that allows the memory card 1 to be better protected.

[Problems to be Solved by the Invention] By the way, in a system equipped with the IC cart connection device described in "2", the insertion and removal of the memory card 1 is detected,
After that, if the memory card 1 is inserted, various processes are executed by the program of the memory card 1''2, and if the memory card 1 is not inserted, various processes are executed by the built-in program of the system unit 2. There are things to do. In such systems, the memory card
If the memory card 1 is removed while various processes are being executed by the above program, there is a problem that the system will run out of control because the program being executed will disappear.

This invention was made in view of the above-mentioned problems, and its purpose is to prevent the system device from being damaged when a memory card is inserted or removed.
An object of the present invention is to provide an IC card system device capable of generating ~ and preventing system runaway.

[Means for Solving the Problems] In order to achieve the above object 1), this invention writes data to an IC card as a memory or the like, or
The system device side that reads data from the C card is equipped with a connector equipped with multiple terminals that allow connection of power, ground, and signal lines between the C card and the iC card. In an IC card connecting device, which is equipped with a plurality of terminals to be connected to the above-mentioned terminals, -
The device main body side has a detection terminal that detects the insertion and removal of the IC card, and a signal from the detection terminal generates a reset signal to the CPU (main controller of the system), etc. in the device main body. A reset generation 1 μi path is provided, and a /J1 power circuit is provided on the IC cart side for outputting a signal for detecting insertion/removal of the IC car I through the terminal connectable to the detection terminal. The gist is:

[Function] 1': Since the RQ configuration is adopted, when the memory card is inserted or removed, on the device main body side, when the detection terminal of the short lead and the terminal of the memory card are connected, When the power is turned off, the main control device (
(CPU, etc.) A glue set signal is generated. In other words, when a memory card is removed or inserted, the system equipped with the device is always reset by the signal generated or by the signal. No more running out of control.

[Example] Hereinafter, an example of the present invention will be described based on FIGS. 1 to 4. In the figure, the same parts and corresponding parts as in FIG. 5 are given the same reference numerals, and will be explained repeatedly.

In FIGS. 1 and 2, there is a terminal 7 connected to the power supply (Vcc,
and a terminal 8 connected to ground, and a reset generation circuit that generates a system reseller l~ signal based on a signal from the detection terminal 7. On the other hand, the memory card 1 is provided with a terminal 9 and an IC that can be connected to the terminals 7 and 8. Note that some memory cars 1 are equipped with terminals that function in the same way as these terminals, such as pull-up resistors or pull-down resistors, and are also equipped with terminals that output control signals from these terminals. In this case, you can use that terminal.

]-, the reset generation circuit will be explained in detail with reference to FIG.
A first F-1=' (for example, D type) circuit 11 that latches the signal from the card (card detection signal) with the system tally signal, and a second circuit 11 that latches this latch signal at the timing of the next tally signal. I-pa/I-pa (for example, type 1)) +! 41st road 12 and the first and second 1・゛・
EOR (111 path 13) that takes the exclusive OR of the Q7iS forces of I.'' circuits 11 and 1.2, and a third 1. Circuit (for example, ] k1・゛・I path IC1 path)
14, and the signal from the Q output terminal of the first and third 1.I.I='lIJ circuits 13 is made into a system reset 1- signal.

Furthermore, although not shown in Figure 5, the terminals on the system unit 2 side and the memory card 1 side have the same
There are power supply lines (power supply and ground) and signal lines (data, address, control).

Next, 1. The operation of the C card system device will be explained based on time charts 1 to 1 in FIG.

First, assuming that the memory card J is inserted into the main body of the device 2, the detection terminal 7 is connected to the terminal 9 of the memory card 1. Grounding of the relevant terminal 8 via the IC ("
L”) signal (card detection signal) is output (see figure (
b)). Then, the ↓th FF circuit 11 has that r
Since the r L I+ level is latched at the rising timing of the clock signal, the card detection signal is held at the King's Todo LL L IT level while it is at the IIL'' level (as shown in (,) in the same figure).

Here, when the memory cart 1 is handled, the detection terminal 7 becomes II J (II level) due to the pull-up resistor 6, so the car 1~detection signal becomes rr H II,
This II H TT level is latched into the first Todo circuit 11 at the rising timing of the clock signal (see FIG.
c). At this time, the second F/D circuit 12 is in a reset state, that is, the "I-I" level is not latched, so the output of the ■□OR circuit 13 becomes "H" level (see (8) in the same figure). This "H" level is stored in the third F-F circuit 14 at the falling timing of the -1- clock signal (as shown in (f) in the figure).
. That is, since the Q output (system device 1-) of the third FF (01 path 14) becomes the IIL'' level, the system including the device 2 is reset.

Subsequently, since the detection terminal 7 remains at the "H" level, the first F-FIiil path 11 has no tr.
The "H" level is held, and this "H" level is latched into the second FF circuit 12 at the next rising timing of the clock signal (as shown in FIG. 3(d)).

Then, the first de-F circuit 11 and the second F-F circuit
Since the Q output of circuit I2 is at the rr H n level, F
The output of the OR circuit 13 is set to "L" level ((e) in the same figure).
), this "J," level is stored in the third FF circuit 14 at the rising edge of the tarok signal (shown in the same figure).
f)).

That is, the Q output of the third FF circuit I4 is IIH
To go from I+ level to D, ``level,'' 2 device 2
The system reset is released.

On the other hand, when memory card 1 is inserted, J-.

As described above, the card detection signal goes to the II LIT level (as shown in FIG. 2(b)), and the first FF circuit 11
The "L II level is latched at the rising timing of the clock signal (as shown in the figure (c)). At this time, the II H II level is latched in the second F-F' circuit. Therefore, the output of the FOR circuit I3 is set to the "H" level (as shown in FIG. (same figure (f)
). That is, the Q of the third F.I-' circuit 14
Since the output changes from the "H" level to the "H" level, the system device 2 is reset.

Subsequently, since the detection terminal 7 remains at the u L +t level, the first FF circuit 1] has a “L H
The I+ level will be held, and this "L I+" level will change to the second one at the next rising timing of the clock signal.
? - It is latched by the four M12 (shown in (d) of the same figure).

Then, the Q outputs of the first F-F circuit 12 and the ↓-th F-F circuit 12 become II L" level, so E O
The output of the R circuit 13 is set to the 1L" level (as shown in FIG. (shown in figure (f)).

That is, since the Q and Is forces of the third F.1.circle 14 go from the "TI" level to the LLLI+II level, the reset of the system including the device 2 is released.

In this way, on the system device 2 side, when the memory card 1 is inserted or removed, the clock period width reset 1- signal is generated and the system is reset each time, so it is possible to prevent the system from running out of control. .

Although the memory card 1 is explained in the embodiment described in -1-, the same effect can be obtained even when using other IC cards.

[Effects of the Invention] 11 As explained above, according to the IC card connection device of the present invention, each time an IC card (memory card) is inserted or removed, the system of the device itself generates a sensor l- signal. Since the system is reset each time the memory card is inserted or removed, it is possible to reliably prevent the system from running out of control.

[Brief explanation of drawings]

1 and 2 are a schematic partial block diagram and a side view of an IC card connecting device showing an embodiment of the present invention,
No. 31i21 is a schematic block diagram of the control circuit of the connection device for the iC card, No. 4 is a time chart 1 diagram explaining the operation of the connection device n for the iC card, and FIGS. 5 and 6 are conventional diagrams. FIG. 2 is a schematic partial block diagram and side view of an IC card connection device of FIG. In the figure, ] is the memory cart, 2 is the device, 3113213
3 + 34 +..., 3n, 7.8 is a terminal (on the device main body side), 4 is a connector, 6 is a pull-up resistor, 5115
2153154,..., 5n, 9. IC is a terminal (on the memory card side), 11 is the first 1... de circuit, 12 is the second F-1 circuit, 13 is the 2-OR circuit, and 14 is the third F-1 circuit. be.

Claims (2)

[Claims] (1) A system device that writes data to an IC card such as a memory or reads data from the IC card is equipped with a plurality of terminals that allow connection of power, ground, and signal lines with the IC card. In the IC card connecting device, the IC card side is equipped with a plurality of terminals for connecting to the terminals, and the device main body side includes a detection terminal for detecting insertion/removal of the IC card. , a reset generation circuit that generates a reset signal to a CPU (main controller of the system), etc. in the main body of the device in response to a signal from the detection terminal, and
An IC card connection device, characterized in that the card side is provided with an output circuit that outputs a signal for detecting insertion/removal of the IC card via the terminal connectable to the detection terminal. (2) On the device main body side, if the IC card is not inserted, the detection terminal is set to “H” level;
When inserting or removing the IC card, a ground "L" level is inputted from the detection terminal via the IC card, and the system reset signal is generated at the rising and falling timings of the signal at the detection terminal. An IC card connecting device according to claim (1).