JPH03183368A - Inverter circuit - Google Patents

Inverter circuit

Info

Publication number
JPH03183368A
JPH03183368A JP1323531A JP32353189A JPH03183368A JP H03183368 A JPH03183368 A JP H03183368A JP 1323531 A JP1323531 A JP 1323531A JP 32353189 A JP32353189 A JP 32353189A JP H03183368 A JPH03183368 A JP H03183368A
Authority
JP
Japan
Prior art keywords
reactor
short circuit
circuit current
circuit
circulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1323531A
Other languages
Japanese (ja)
Inventor
Mitsuru Matsukawa
満 松川
Tomoshi Tada
多田 知史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to JP1323531A priority Critical patent/JPH03183368A/en
Publication of JPH03183368A publication Critical patent/JPH03183368A/en
Pending legal-status Critical Current

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  • Protection Of Static Devices (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To suppress the magnitude and the rising rate of temporary source short circuit current due to reverse recovery function of a circulation diode in an inverter circuit by connecting a series circuit of the circulation diode and a saturable reactor in parallel with a short circuit current suppressing reactor. CONSTITUTION:A saturable reactor 4 and a circulation diode D0 are connected in series to the plus side of a DC power supply 1 and also connected in parallel with a short circuit current suppressing reactor 2, and a switching circuit is connected to the other end thereof. The saturable reactor 4 exhibits reactor effect upon short circuit of power supply during reverse recovery time interval of circulation diodes D0-D4. At a time point when the saturable reactor 4 exhibits no reactor effect, all circulation diodes D0-D4 have been reversely recovered and provided with reverse block capability, and thereby no short circuit current flow. By such arrangement, short circuit current can be suppressed during an interval after reverse voltage is applied onto the circulation diodes D0-D4 before they are reversely recovered and provided with reverse block capability.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は電圧型インバータ回路において用いられている
還流ダイオードの逆回復時に発生する電源短絡の状態を
防止するための回路を備えるインバータ回路に関するも
のである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an inverter circuit equipped with a circuit for preventing a power supply short circuit that occurs during reverse recovery of a freewheeling diode used in a voltage-type inverter circuit. It is.

[従来の技術] 第3図に単相ブリッジの電圧型インバータ回路を示す。[Conventional technology] Figure 3 shows a single-phase bridge voltage type inverter circuit.

図示のように、直流電源1に短絡抑制用リアクトル(直
流リアクトル)2と直流電源1のプラス側にカソード側
を向けて還流ダイオードDoが並列に接続される。前記
リアクトル2は電流の上昇率及び電流値を抑制する機能
を有するものである。前記リアクトル2、これと並列な
還流ダイオードD。を介し、直流電源1に並列に、順方
向直列にスイッチング素子Sl、52よりなるアームと
、S3.S4よりなるアームの並列回路が接続され、直
列にあるスイッチング素子51とS2.S!Jと54と
の接続間に負荷3が接続され、各スイッチング素子S、
、S2.S3.S4とそれぞれ逆並列に還流ダイオード
D、、D2.D3.D4が接続される。(ダイオード、
スイッチング素子はいずれも半導体)前記ダイオードD
。は短絡抑制用リアクトル2のエネルギーを還流させ、
負荷3から電源1611への回生電力の通路として備え
られるものであり、また前記リアクトル2はスイッチン
グ素子S8とS2、又はS3とS4よりなるアームの短
絡時、短絡電流の電流上昇率を抑える機能をもたせたも
のである。
As shown in the figure, a short-circuit suppression reactor (DC reactor) 2 and a freewheeling diode Do are connected in parallel to the DC power supply 1 with the cathode facing the positive side of the DC power supply 1. The reactor 2 has a function of suppressing the current increase rate and current value. The reactor 2 and a free wheel diode D in parallel with the reactor 2. An arm consisting of switching elements Sl, 52 is connected in parallel to the DC power supply 1 in forward series via S3. The parallel circuit of the arm consisting of S4 is connected, and the switching element 51 and S2.S4 are connected in series. S! A load 3 is connected between the connection between J and 54, and each switching element S,
, S2. S3. Freewheeling diodes D, , D2 . D3. D4 is connected. (diode,
(all switching elements are semiconductors) the diode D
. refluxes the energy of the short circuit suppression reactor 2,
The reactor 2 is provided as a path for regenerative power from the load 3 to the power source 1611, and the reactor 2 has a function of suppressing the current increase rate of the short circuit current when the arm consisting of switching elements S8 and S2 or S3 and S4 is short-circuited. It is something that has been maintained.

前記インバータ回路は例えばPWM制御で運転する。The inverter circuit is operated under PWM control, for example.

負荷3をL負荷とした場合、これをPWM制御で運転す
ると、前記インバータ回路には、第4図(イ)に示すと
おり、還流ダイオードに電流が還流しているモードAと
(0に示すとおり、L負荷3のエネルギー回生時の回生
電流が還流ダイオードを流れるモードBが存在する。
When the load 3 is an L load, when it is operated under PWM control, the inverter circuit has modes A and (as shown in 0), in which current flows through the freewheeling diode, as shown in Figure 4 (a). , Mode B exists in which the regenerative current during energy regeneration of the L load 3 flows through the freewheeling diode.

モードAの場合、Slがオフし、DIに矢印で示すよう
に還流電流が流れ、Doにも矢印で示すように還流電流
が流れている。このモードのとき、s2がオフからオン
状態に移行すると、DOIDIは順方向電流が流れてい
たため、DOIDIはその逆回復時間の間、逆阻止能力
を失い、S2が完全にオン状態となれば、第4図(ハ)
に示すモードCのとおり、E−Do−J−52−Eのル
ートで短絡電流Isが流れる。
In the case of mode A, Sl is turned off, a return current flows through DI as shown by the arrow, and a return current also flows through Do as shown by the arrow. In this mode, when s2 transitions from off to on state, DOIDI loses its reverse blocking ability during its reverse recovery time because forward current was flowing through it, and when S2 becomes completely on state, Figure 4 (c)
As shown in mode C, a short circuit current Is flows through the route E-Do-J-52-E.

また、モードBの場合、DI+D4に矢印で示すように
L負荷の回生電流が流れている状態でs2がオフからオ
ン状態に移行するとN DOIDIは順方向電流が流れ
ていたため、DOIDIはその逆回復時間の間、逆阻止
能力を失いS2が完全にオン状態となれば(ハ)図のモ
ードCのとおり、E−D、−D。
In addition, in the case of mode B, when s2 transitions from off to on with the regenerative current of the L load flowing as shown by the arrow in DI+D4, the forward current was flowing through N DOIDI, so DOIDI recovers in reverse. If the reverse blocking ability is lost for a period of time and S2 is completely turned on, (c) E-D, -D as in mode C in the figure.

52−Eのルートで短絡電流Isが流れる。A short circuit current Is flows through the route 52-E.

またモードBでは、S3がオフからオンに移行するとき
も同様の理由でE−D、−53−D4−Eのルートで短
絡電流Isが流れる。
Further, in mode B, when S3 shifts from off to on, short circuit current Is flows through the routes ED and -53-D4-E for the same reason.

[発明が解決しようとする課題] 上記のように短絡電流1sが各素子のスイッチングごと
に流れるため、各スイッチング素子のスイッチング損失
が増大し、素子等の冷却能力をアップしなければならな
い。
[Problems to be Solved by the Invention] As described above, since the short circuit current 1 s flows every time each element switches, the switching loss of each switching element increases, and the cooling capacity of the elements etc. must be increased.

上記現象はアーム短絡の現象と同現象のため、実際のア
ーム短絡電流との区別がむつかしく、DCCTによる保
護が不十分となる。そして、この逆回復時間の間では前
記リアクトル2の効果もない。
Since the above phenomenon is the same as the arm short circuit phenomenon, it is difficult to distinguish it from the actual arm short circuit current, resulting in insufficient protection by DCCT. During this reverse recovery time, the reactor 2 has no effect.

[発明の構成コ 本発明は上記課題を解決する目的でなされたもので、前
記還流ダイオードの逆回復時に生じる短絡電流を抑制す
るため、電源とブリッジ接続されたスイッチング回路の
間で直列関係にあり、互に並列関係にある短絡電流抑制
用リアクトル(直流リアクトル)と還流ダイオードより
なる並列回路において、還流ダイオードに直列に可飽和
リアクトルを接続して、前記短絡電流抑制用リアクトル
と並列とした構成を採る。
[Structure of the Invention] The present invention has been made for the purpose of solving the above-mentioned problems, and in order to suppress the short-circuit current that occurs during reverse recovery of the freewheeling diode, the power supply and the switching circuit connected in a bridge are connected in series. In a parallel circuit consisting of a short-circuit current suppressing reactor (DC reactor) and a freewheeling diode, which are in a parallel relationship with each other, a saturable reactor is connected in series with the freewheeling diode, and the saturable reactor is connected in parallel with the short-circuit current suppressing reactor. take.

第1図は本発明の実施例を示すが、第3図と同一部分は
同一符号で示す。第3図で示した回路と異なるところは
、直流電源1とブリッジ型に構成されるスイッチング回
路の間で、直列に接続された短絡電流抑制用リアクトル
2に対して、並列に、還流ダイオードD。と可飽和リア
クトル4の直列回路が接続されている点である。
FIG. 1 shows an embodiment of the present invention, in which the same parts as in FIG. 3 are designated by the same reference numerals. The difference from the circuit shown in FIG. 3 is that between the DC power supply 1 and the bridge-type switching circuit, a freewheeling diode D is connected in parallel to the short-circuit current suppression reactor 2 connected in series. This is the point where the series circuit of the saturable reactor 4 and the saturable reactor 4 are connected.

ここで可飽和リアクトル(以下SLという)は次の機能
を有するものである。
Here, the saturable reactor (hereinafter referred to as SL) has the following functions.

第2図(イ)に示すように、可飽和リアクトルSL1 
とダイオードD。のカソードを直流電源1のプラス側に
向けて直列に接続し、これを短絡電流抑制用リアクトル
2と並列に接続し、この接続他端がスイッチング回路に
接続されている。
As shown in Fig. 2 (a), saturable reactor SL1
and diode D. The cathodes of the DC power supply 1 are connected in series with their cathodes facing the positive side of the DC power supply 1, and this is connected in parallel with the short-circuit current suppressing reactor 2, and the other end of this connection is connected to a switching circuit.

直流電源電圧をE。し、短絡電流抑制用リアクトルをり
。として、上記SLに次のV−を積(N圧・時間積)を
もたせたものとする。
DC power supply voltage is E. and a reactor for short circuit current suppression. Assume that the above SL is multiplied by the following V- (N pressure/time product).

V −t = E、−t、 −・・■ ここで、t、はり。、又はD I(D2〜D4)の逆回
復時間のうち、短かい方をt、−とする。
V -t = E, -t, -...■ Here, t, beam. , or the reverse recovery time of DI (D2 to D4), whichever is shorter is t, -.

前記のようなり。、DI(D2〜D4)の逆回復時間の
間の短絡時、SLはりアクドル効果を示し、第2図(ロ
)図で示すように直流電圧E。は全てSLに印加される
。SLで生じる逆起電力をEsLとすると、1 0<1<1.の間、  L8L    :EO”Est
t 1、<1になれば、SLは前記■よりLSL=0(+1
)となり、第2図(ハ)と等価となる。
As above. , during the reverse recovery time of DI (D2-D4), the SL beam exhibits an acdle effect, and the DC voltage E as shown in FIG. are all applied to SL. If the back electromotive force generated at SL is EsL, then 1 0<1<1. During, L8L:EO”Est
If t1, <1, SL becomes LSL=0(+1
), which is equivalent to Fig. 2 (c).

しかし、このとき、すでにDo、またはDI(D2〜D
4)は全て逆回復し、逆阻止能力を有しており、LBL
=0でも短絡電流は流れない。
However, at this time, Do or DI (D2 to D
4) all have reverse recovery and reverse blocking ability, and LBL
Even if = 0, no short circuit current will flow.

このように、還流ダイオードが、自身に逆電圧が印加さ
れた後に、逆回復し、逆阻止能力をもつまでの間、電源
とダイオードに直列に限流効果をもたせる可飽和リアク
トルを挿入することにより、短絡電流を抑制することが
できる。
In this way, by inserting a saturable reactor that has a current limiting effect in series with the power supply and the diode until the freewheeling diode recovers and has reverse blocking ability after a reverse voltage is applied to itself. , short circuit current can be suppressed.

[発明の効果コ 以上説明したように、本発明によれば、インバータ回路
における還流ダイオードの逆回復作用による一時的電源
短絡による短絡電流の上昇率及び電流値を可飽和リアク
トルによって抑制することができる。
[Effects of the Invention] As explained above, according to the present invention, it is possible to suppress the increase rate and current value of short circuit current due to a temporary power supply short circuit due to the reverse recovery action of the freewheeling diode in the inverter circuit by using the saturable reactor. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示す。 第2図(イ)、(ロ)、(ハ)は本発明の動作説明図で
ある。 第3図は従来の単相ブリッジ形の電圧型インバータ回路
を示す。 第4図(イ)、(0)、(ハ)は第3図に示すインバー
タ回路の動作説明図である。 1・・・電源、2・・・短絡電流抑制用リアクトル、3
・・・負荷、4・・・可飽和リアクトル、DO+DI+
D2+D3+D4・・・還流ダイオード、 S l +S2 、S3 、S4 ・・・半導体スイ チング素子。
FIG. 1 shows an embodiment of the invention. FIGS. 2(a), 2(b), and 2(c) are explanatory diagrams of the operation of the present invention. FIG. 3 shows a conventional single-phase bridge type voltage type inverter circuit. 4(a), (0), and (c) are explanatory diagrams of the operation of the inverter circuit shown in FIG. 3. FIG. 1... Power supply, 2... Short circuit current suppression reactor, 3
...Load, 4...Saturable reactor, DO+DI+
D2+D3+D4...Freewheeling diode, S1+S2, S3, S4...Semiconductor switching element.

Claims (1)

【特許請求の範囲】[Claims] (1)電圧型インバータ回路における短絡電流抑制用リ
アクトルと並列に、還流ダイオードと可飽和リアクトル
の直列回路を接続し、前記インバータ回路のスイッチン
グ素子と逆並列接続されている還流ダイオード及び前記
短絡電流抑制用リアクトルと並列に接続されている還流
ダイオードの逆回復作用による一時的電源短絡による短
絡電流の上昇率及び電流値抑制を前記可飽和リアクトル
で行うことを特徴とするインバータ回路。
(1) A series circuit of a freewheeling diode and a saturable reactor is connected in parallel with the short-circuit current suppression reactor in the voltage type inverter circuit, and the freewheeling diode and the short-circuit current suppression are connected in antiparallel to the switching elements of the inverter circuit. An inverter circuit characterized in that the saturable reactor suppresses the increase rate and current value of a short-circuit current caused by a temporary power supply short circuit caused by a reverse recovery action of a free-wheeling diode connected in parallel with the saturable reactor.
JP1323531A 1989-12-12 1989-12-12 Inverter circuit Pending JPH03183368A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1323531A JPH03183368A (en) 1989-12-12 1989-12-12 Inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1323531A JPH03183368A (en) 1989-12-12 1989-12-12 Inverter circuit

Publications (1)

Publication Number Publication Date
JPH03183368A true JPH03183368A (en) 1991-08-09

Family

ID=18155739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1323531A Pending JPH03183368A (en) 1989-12-12 1989-12-12 Inverter circuit

Country Status (1)

Country Link
JP (1) JPH03183368A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008093429A1 (en) * 2007-01-30 2008-08-07 Toshiba Mitsubishi-Electric Industrial Systems Corporation Forced commutated inverter apparatus
JP2010200401A (en) * 2009-02-23 2010-09-09 Nissan Motor Co Ltd Switching circuit
JP2016087066A (en) * 2014-11-04 2016-05-23 三菱電機株式会社 Motor drive device, electric blower, and vacuum cleaner

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008093429A1 (en) * 2007-01-30 2008-08-07 Toshiba Mitsubishi-Electric Industrial Systems Corporation Forced commutated inverter apparatus
JP2009512403A (en) * 2007-01-30 2009-03-19 三菱電機株式会社 Self-excited inverter device
AU2007345826B2 (en) * 2007-01-30 2010-10-21 Toshiba Mitsubishi-Electric Industrial Systems Corporation Forced commutated inverter apparatus
AU2007345826C1 (en) * 2007-01-30 2011-04-28 Toshiba Mitsubishi-Electric Industrial Systems Corporation Forced commutated inverter apparatus
JP2010200401A (en) * 2009-02-23 2010-09-09 Nissan Motor Co Ltd Switching circuit
JP2016087066A (en) * 2014-11-04 2016-05-23 三菱電機株式会社 Motor drive device, electric blower, and vacuum cleaner

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