JPH03175719A - Voltage comparator - Google Patents

Abstract

PURPOSE:To maintain a complete low power consumptive state without consuming a power due to a current on an internal inversion circuit by the conversion of an analog input voltage by providing a function to stop the comparison operation of an inversion circuit and a function to fix the output of the inversion circuit at prescribed potential at the inversion circuit to perform voltage comparison. CONSTITUTION:When a control signal from a control signal input terminal 330 is set at an awaiting state i.e., logic (1), transistors 306, 309 comprising the inversion circuit and a switch 305 are always turned off, then, the function of the inversion circuit 310 is stopped. Also, by setting a gate circuit 340 at an inactive state, no bias current Ib flows on the inversion circuit 310. In such a way, it is possible to set the voltage comparator at the complete low power consumptive state.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a sampling type voltage comparison circuit using a coupling capacitor.

[Conventional technology]

Conventionally, this type of sampling-type voltage comparison circuit using a coupling capacitor has a relatively simple configuration and requires a small number of elements, so it has been used in parallel analog/digital converters that require many comparison circuits. It is being

FIG. 4 shows an example of a conventional sampling type voltage comparison circuit, which includes switches 301, 302, 303, 304, inverting circuits 310, 311, 312, a coupling capacitor 320, and a voltage dividing circuit 10 that generates a reference voltage. Consists of.

The opening and closing of the switches 301, 302, 303, and 304 are controlled by two-phase clocks φ and A shown in FIG.

During the clock period T shown in FIG.
, 303 are turned on, and switches 302 and 304 are turned off. By turning on the switch 303, the reversal port FI!
Input/output points A and B of r310 are biased to the same potential vb (not shown). At this time, since the switch 301 is turned on at the same time, the capacitor 320 is connected to the voltage divider circuit 10.
output voltage Vrn and bias potential vb of the inversion circuit 310
The difference between the two voltages is applied and the battery is charged.

Next, during clock period T2, switches 301, 303
is turned off, and switches 302 and 304 are turned on. Since the switch 302 is turned on, the analog input voltage Vs is applied to the capacitor 320. At this time, the analog input voltage Vs is the output voltage V r n of the voltage divider circuit 10
When Vrn is larger, the potential at point A increases from the bias potential vb, and conversely, when it is smaller than Vrn, the potential at point A decreases from the bias potential vb. At the same time, since the switch 303 is off, the inversion circuit 310 is in an active state, and therefore the output point B of the inversion circuit 310 changes in response to the rise or fall of the potential at the point A.

The output of the inverting gate ff1310 is amplified to a logic level by the inverting circuit 311. Switch 304 and reversal port N312
constitutes a latch circuit and holds the output result of the inversion circuit 311 until the next comparison result is obtained.

Therefore, the output of the inversion circuit 312, which is the output of the comparison circuit, is
The analog input voltage Vs is the output voltage V of the voltage divider circuit 10
When it is larger than rn, the logic level is "0", and when it is smaller than the analog input voltage Vrn, it is the logic level "1".

[Problem to be solved by the invention]

In the above-mentioned conventional sampling type voltage comparison circuit using a coupling capacitor, the input/output points A and B of the inverting circuit are short-circuited every half cycle of the clock.
A bias current Ib (not shown) flows so that point B has the same potential. In addition, since the inverting circuit 311 receives the output of the inverting circuit 310, the inverting circuit 311 receives the output of the inverting circuit 310.
A current comparable to the bias current Ib flowing through the transistor 10 flows. Therefore, even if a complementary MO8 circuit is used as the inversion circuit, current flows through the inversion circuits 310 and 311 during a half period of the clock, consuming power. In particular, when a large number of comparison circuits are used, such as in a parallel comparison type analog/digital converter that requires 2N-1 comparison circuits with a resolution of N bits, the overall power consumption becomes large. Therefore, when an analog/digital conversion operation is not required, that is, in a standby state, it is desirable to fix the comparator circuit to a low power consumption state. In order to fix the sampling type comparison circuit using a coupling capacitor in a low power consumption state, fix the two-phase clocks φ and T shown in Fig. 3 so that φ is logic 'OJ' and IIs is logic '1'. By turning off the switch 303 all the time,
The input and output points A and B of the inversion circuit 310 are opened, and no bias current flows, allowing a low power consumption state. However, when the clock φ is fixed to logic “0” and φ is fixed to logic “1”, the switch 302 is always on, and the analog input voltage Vs is always connected to the coupling capacitor 320. Therefore, the analog input voltage Vs
This change causes the potential at point A to change via the coupling capacitor 320, and when the potential at point A reaches a value close to the bias potential Vs of the inverting circuit 310, the inverting circuit 310 receives a voltage equal to the bias current Ib. A certain amount of current will flow and power will be consumed.

Therefore, in a conventional sampling type comparator circuit using a coupling capacitor, even if the clock φ is set to logic "O" and the clock T is set to logic "1" in order to achieve a low power consumption state, depending on the value of the analog input voltage Vs, the comparator circuit Since current flows through the inverting circuit that makes up the circuit and consumes power, it has the disadvantage that it is not possible to maintain a completely low power consumption state.

The purpose of the present invention is to maintain a low power consumption state regardless of the analog input voltage Vs value, and furthermore, it is an MO
S) It is an object of the present invention to provide a sampling type comparator circuit which is composed of only a transistor structure and is suitable for monolithic integration.

[Means to solve the problem]

6. The semiconductor memory circuit of the present invention has a first . and a second switch, a coupling capacitor that holds the voltage sampled by the first and second switches, and a control signal that operates upon a comparison instruction to output a change in the holding potential of the coupling capacitor, and operates upon a standby instruction. a first inverting circuit that stops, a second inverting circuit that amplifies and outputs the output of the first inverting circuit, and a fourth inverting circuit that operates in conjunction with the second switch and outputs the output of the second inverting circuit as a switch. a third switch that operates in conjunction with the first switch and operates when the control signal is logic "0" to short-circuit the first inverting circuit; '', the fifth switch operates to fix the input potential of the second inversion circuit to a predetermined potential.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

1 and 2 are block diagrams showing one embodiment of the present invention, and FIG. 3 is a diagram showing two-phase clock signals used in one embodiment of the present invention.

FIG. 1 shows switches 301, 302, 303304,
Controls the opening and closing of an inverting circuit 310 consisting of transistors 306, 307, 308309, a switch 305 for connecting the output of the inverting circuit 310 to a predetermined potential, a coupling capacitor 320 for holding the sampled voltage, and a switch 303. and a voltage divider circuit that generates a reference voltage for the comparison circuit.

The opening and closing of switches 301, 302, 303, and 304 are controlled by two-phase clocks φ and φ shown in FIG.
The opening and closing of the switch 9 and the switch 305 are controlled by a control signal input from a control signal input terminal 330. Also, inversion circuit 3
The transistor 306 and switch 305 on one side and the transistor 309 on the other side of the transistor 10 are controlled to open and close in opposite phases to each other.

When the control signal input from the control signal input terminal 330 is logic rQJ, the comparison circuit enters a normal operating state, and the transistors 306 and 30 forming the inversion circuit 310
9 is always on. Further, the gate circuit 340 is in an active state, and the switch 305 is always off.

In this way, the comparison operation is performed according to the two-phase clock φ, 7) shown in FIG. That is, the period T of the clock
1, switches 301 and 303 are turned on and switches 302 and 304 are turned off.

On the other hand, the transistor 306.3 forming the inverting circuit 310
09 is always on because the control signal input from the control signal input terminal 330 is logic "0". switch 30
3 is turned on, input/output points A and B of the inverting circuit 310 are short-circuited, and a bias current Ib (not shown) flows through the inverting circuit 310 so that points A and B have the same potential, and the inverting port ii4
! , 310 points A and B are bias potential vb (not shown)
Take. At this time, by turning on the switch 301, the difference potential between the output=9− voltage Vrn of the voltage dividing circuit 10 and the bias potential vb of the inverting circuit 310 is applied to the capacitor 320.

Next, during the clock period T2, the switch 30] 303 is turned off and the switches 302 and 304 are turned on. switch 3
02 is turned on, the analog input voltage Vs is applied to the capacitor 320. At this time, when the analog input voltage Vs is greater than the output voltage Vrn of the voltage divider circuit 10, the potential at point A increases, and when it is smaller than the output voltage Vrn, the potential at point A decreases. By setting the control signal that instructs the comparison from the control signal input terminal 330 to, for example, logic "0" and performing the comparison operation, the switch 303 is turned off, and the transistors 306 and 309 forming the inverting circuit 310 are turned on, so that the inverting circuit is turned off. The other transistors 307 and 308 constituting 310 become active. Therefore, the output of the inversion circuit 310 changes in response to the change in the potential at point A. The change in the output voltage of this inversion circuit 310 is
It is amplified to the logic level by the inverting circuit 31-1 and then the inverting circuit 3
Output to 04. The switch 304 and the inversion circuit 312 constitute a latch circuit, which holds the output of the inversion circuit 311 until the next comparison result is obtained. Therefore, the output of the inverting circuit 312, which is the output of the comparison circuit, becomes logic "0" when the analog input voltage Vs is greater than the output voltage Vrn of the voltage divider circuit 10; When the voltage is smaller than Vrn, it becomes logic rlJ.

Next, when the control signal from the control signal input terminal 330 is set to a standby state, that is, logic "1", the transistors 306, 309 and the switch 305 constituting the inverting circuit are always turned off, and the gate circuit 340 becomes inactive.

Transistors 306 and 309 forming the inversion circuit 310
When the inverting circuit 310 turns off, the inverting circuit 310 stops its function.

Furthermore, since the gate circuit 340 is inactive, the switch 303 is always turned off, and the bias current Ib does not flow through the inversion circuit 310. Furthermore, as the switch 302 repeats on and off according to the clock φ, even if the analog input voltage Vs is applied to the capacitor 320 and the potential at point A changes, the inverting circuit 310 is in a non-functional state and will not be affected in any way. There isn't. On the other hand switch 3
05 turns on, the output point B of the inverting circuit 310 is connected to the ground potential. Therefore, the reversal port 1i'L310
The input voltage of the inverting circuit 31.1 which inputs the output of the inverting circuit 31.1 is fixed to the ground potential, and it is possible to prevent the bias current from flowing through the inverting circuit 311 as well.

By setting the control signal received by the control signal input terminal 330 to logic "1-" as described above, the voltage comparison circuit can be brought into a completely low power consumption state. Further, since the gate circuit 340 is inactive, the switch 303 is always on, and the noise generated when the switch 303 is turned on and off does not affect the analog input system via the capacitor 320.

FIG. 2 is the same as FIG. 1 except that the transistor constituting the switch 305 is changed from N type to P type.

In the method of FIG. 2, when the control signal applied to the control signal input terminal 330 is logic "1", the inverting circuit 310 stops its function and the gate circuit 340 becomes inactive. Therefore, the switch 303 remains off at all times, and the bias current 1b does not flow through the inversion circuit 310. In addition, as the switch 302 is repeatedly turned on and off according to the clock 7, the analog input terminal Vs is connected to the capacitor 3.
20 and the potential at point A changes, the inversion port 1i
Since 18310 has stopped its functions, it is not affected in any way. Also, by turning on the switch 305,
The output point B of the inverting circuit 310 is connected to the power supply potential. Therefore, the input voltage of the inverting circuit 311 is fixed to the power supply potential, and the bias current Ib can also be prevented from flowing to the inverting circuit 311, so that the same effect as in FIG. 1 can be obtained.

〔Effect of the invention〕

As explained above, the present invention provides an inverting circuit for voltage comparison with a function of stopping the comparison operation and a function of fixing the output of the inverting circuit at a predetermined potential, and uses a conventional coupling capacitor. Even if it is in a low power consumption state like the Sunbree 13-type comparison circuit, current will not flow through the internal inversion circuit due to changes in the analog input voltage and consume no power, allowing it to maintain a completely low power consumption state. . In addition, by separating the input and output terminals of the inverting circuit, the analog input system is not affected by the noise generated by the comparator circuit, and by omitting the control element at the input terminal of the inverting circuit, it can be used as a comparator circuit. The present invention has the effect of realizing a sampling type voltage comparator circuit that can easily be constructed as a monolithic integrated circuit with a simple configuration, without impairing the input sensitivity of the circuit and without requiring a special type of circuit.

[Brief explanation of drawings]

1 and 2 are block diagrams showing one embodiment of the present invention, FIG. 3 is a diagram showing two-phase clock signals used in one embodiment of the present invention, and FIG. 4 is a conventional voltage comparator circuit. FIG. 10... Voltage divider circuit, 301, 302, 303.3
C)'4.305...Switch, 306,307...
4 P-type transistor, 308.309...N-type transistor, 310...Inversion circuit, 3:]-1, 31,2
... Inversion circuit, 320 ... Coupling capacitor, 330
...Control signal input terminal, 340...Gate circuit, V
r...Reference power supply, Vs...Analog input voltage, Vr
n...Reference voltage, φ, φ...Clock.

Claims (1)

[Claims] a first and second switch that alternately samples a reference voltage and an analog input voltage; a coupling capacitor that holds the sampled voltages of the first and second switches; and a control signal activated by a comparison instruction that connects the coupling capacitor. a first inverting circuit that outputs a change in the holding potential of and stops operating upon a standby instruction; a second inverting circuit that amplifies and outputs the output of the first inverting circuit; a fourth switch that outputs the output of the second inversion circuit as a switch;
a third switch that operates in conjunction with the first switch and operates when the control signal is logic "0" to short-circuit the first inverting circuit; and a third switch that operates when the control signal is logic "1". A voltage comparison circuit comprising a fifth switch that fixes the input potential of the second inversion circuit to a predetermined potential.