JPH03175718A - Voltage comparator - Google Patents

Abstract

PURPOSE:To set a comparator at a state with completely low power consumption by providing a function to stop the operation of an inversion circuit with a control signal at the inversion circuit, and providing a function to fix the output of the inversion circuit at prescribed potential. CONSTITUTION:Assuming the control signal 330 as logic '1', the comparator is set at a low power consumption state. ln other words, it follows that transistors 305 and 308 comprising the inversion circuit 310 are always turned off. The inversion circuit 310 stops its function by turning off the transistors 305 and 309, and no bias current IB flows on the inversion circuit 310 even when a switch 303 repeats on/off operations according to a clock phi. Therefore, the inversion circuit 310 stops its function even when an analog input voltage Vs is applied to a capacitor 320 and potential at a point A is varied, therefore, no influence is given.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a voltage comparison circuit, and more particularly to a sampling type voltage comparison circuit using a coupling capacitor.

[Conventional technology]

A sampling type voltage comparison circuit using a coupling capacitor has a relatively simple configuration and requires a small number of elements, and is therefore used in parallel comparison type analog-to-digital converters that require many comparators.

Figure 5 shows an example of a conventional sampling type voltage comparison circuit.
Switches 30] to 3041 Inverting circuits 310 to 321. It is composed of a capacitor 320. Also, the voltage dividing circuit 1i'8
10 creates a reference voltage for the comparator, and switches 301 to 30
4 is controlled to open and close by two-phase clocks φ and T as shown in FIG.

The operation will be explained below according to FIG. First, in feedback T1, since the clock φ is at a high level, the switch 301 and the switch 303 are turned on, and the switch 302 is turned on.
and 304 turns off.

By turning on the switch 303, the input and output terminals of the inversion circuit 310 are biased to the same potential VB. At this time, since the switch 301 is turned on at the same time, the capacitor 320 is connected to the output voltage VFLII of the voltage divider circuit 10.
The difference between the voltage and the bias potential VB of the inversion circuit 310 is applied, and the voltage is charged.

Next, in period T2, the clock master is at a high level, so
Switches 301 and 303 are turned off, and switch 302 and switch 304 are turned on. Since the switch 302 is turned on, the analog input voltage V is applied to the capacitor 320.
5 is applied.

At this time, if the analog input voltage VS is larger than the output voltage VFLII of the voltage divider circuit 10, the potential at point A increases from the bias potential Va, and conversely, if it is smaller than VRfi, the potential at point A increases
The potential at the point decreases from the bias potential VB. At the same time, since the switch 303 is off, the inverting circuit 310 is in an active state, and therefore the output of the inverting circuit 310 changes in accordance with the rise or fall of the potential at point A. Inversion circuit 3
The output of 10 is amplified to a logic level by an inverting circuit 311. Further, the switch 304 and the inverting circuit 312 constitute a latch circuit, which holds the output result of the inverting circuit 311 until the next comparison result is obtained.

Therefore, when the analog input voltage Vs is larger than the output voltage VRn of the voltage divider circuit 10 during period T2, the output of the inverting circuit 312, which is the output of the comparator, becomes a low level, that is, logic II OII, and the analog input voltage V becomes VR.
When it is smaller than n, it is high level, that is, logic ``1'''
becomes.

[Problem to be solved by the invention]

In the above-mentioned conventional sampling type comparison circuit using a coupling capacitor, the input and output of the inversion circuit 310 are short-circuited every half cycle of the clock, so each time the input and output terminals of the inversion circuit 310 have the same potential. Bias current IB flows through. In addition, since the inverting circuit 311 receives the output of the inverting circuit 310 as an input, the inverting circuit 311 has the inverting circuit 310 as its input.
A current comparable to the bias current 10 flowing through the bias current 8 will flow. Therefore, even if a complementary MO8 circuit is used for the inverting circuit, the inverting circuit 3
Current flows through 10 and 311, consuming power. If the resolution is N bits, when a large number of comparators are used, such as in a parallel comparison type analog-to-digital converter that requires 2N-1 comparators, the overall power consumption becomes large. Therefore, it is desirable to fix the comparator to a low power consumption state when no analog-to-digital conversion operation is required.

In order to fix the sampling type comparator using a coupling capacitor in a low power consumption state, it is sufficient to fix it so that it becomes a two-phase connection, and when the switch 303 is turned off, the input and output terminals of the inverting circuit 310 are opened. As a result, bias current IQ no longer flows, and therefore the comparator can be placed in a low power consumption state. However, the clock φ is logic “
When I Q 11°φ is fixed at logic “1′, the switch 302 is always on, so the analog input terminal is always connected to the coupling capacitor 320. Therefore, a change in the analog input voltage VS causes a change in the potential at point A via the coupling capacitor 320, and when the potential at point A becomes close to the bias potential VB of the inverting circuit 310, A current comparable to the bias current IB flows through the circuit 310, which also consumes power.

As explained above, the conventional sampling type comparator using a coupling capacitor converts the clock φ to a logic II Q 11. in order to achieve a low power consumption state. Even if the clock φ is set to logic "'1"', there is a drawback that depending on the value of the analog input voltage Vs, current flows into the inverting circuit that constitutes the comparator and consumes power, so a completely low power consumption state cannot be achieved. Ta.

An object of the present invention is to provide a voltage comparison circuit that can consume low power.

[Means to solve the problem]

The voltage comparator circuit of the present invention has a capacitor whose potential at one end becomes a reference voltage or an input voltage in response to a clock signal, and an inverter whose operation is controlled in response to a control signal with the other end of the capacitor as an input. circuit, means for connecting the input and output of the inverting circuit in response to the clock signal, holding means for holding the output level of the inverting circuit, and positive feedback of the output of the holding means to control the inverting circuit. and means for fixing the output level of.

〔Example〕

The details of the present invention will be explained below with reference to the drawings.

FIG. 1 is a circuit diagram for explaining one embodiment of a voltage comparison circuit according to the present invention. As shown in the figure, this embodiment includes switches 301 to 304 and transistors 305 to 308.
An inversion circuit 310 and inversion circuits 311 to 31 consisting of
3, switches 36] and 362 for connecting the output of the inverting circuit 310 to a predetermined potential, and gates 340 and 350 for controlling opening and closing of the switches 36] and 362.
and a capacitor 302 for holding the sampled voltage. Further, the voltage divider circuit 10 creates a reference voltage for the comparator circuit, and the switches 301 to 304
The opening and closing of transistors 305 and 308, which are controlled by the two-phase clocks φ and φ shown in the figure and constitute the inverting circuit 310, is controlled by a control signal 330.

The operation will be explained below according to FIG. First, control signal 3
When 30 is set to logic "o", the comparator circuit is in a normal operating state. That is, the transistors 305 and 308 forming the inverting circuit 310 are always on and operate as a normal inverting circuit. Furthermore, the switch 361 is connected to the gate 3
Since the output of gate 40 is logic "1", it is always off, and switch 362 is always off, like switch 361, because the output of gate 1-350 is logic "0". Therefore, the comparator circuit uses the two-phase clock φ shown in FIG.
A comparison operation is performed according to and φ.

That is, since the clock φ is at a high level during the period TI, the switches 301 and 303 are in the on state.
Switches 302 and 304 are turned off. When switch 303 is turned on, and because transistors 305 and 308 constituting inverting circuit 310 are always on, the input/output terminals of inverting circuit 310 are short-circuited, and there is no input/output to inverting circuit 31.0. A bias current IR flows so that the terminals are at the same potential, and the input and output terminals of the inverting circuit 310 are at the bias potential ■8. At this time switch 3
01 is turned on at the same time, the capacitor 320
A differential voltage between the output voltage VRn of the voltage dividing circuit 10 and the bias potential Va is applied to the voltage dividing circuit 10.

Next, in period T2, switches 301 and 303 are turned off,
Switches 302 and 304 are turned on.

When the switch 302 is turned on, the capacitor 320
An analog input voltage VS is applied to.

At this time, if the analog input voltage 5 is larger than the output voltage VRn of the voltage dividing circuit 10, the potential at point A increases, and if it is smaller than the output voltage VRn, the potential at point A decreases. Since the switch 303 is off and the transistors 305 and 308- forming the inverting circuits 31 and 0 are on, the other transistors 306 and 307 forming the inverting circuit 310 are in an active state.
Therefore, the output of the inverting circuit 310 changes according to the rise or fall of the potential at point A. This change in the output voltage of the inverting circuit 310 is amplified to a logic level by the inverting circuits 31,1. Further, the switch 304 and the inverting circuit 312 constitute a holding circuit 370, which holds the output of the inverting circuit 311 until the next comparison result is obtained.

Therefore, the output of the inverting circuit 312, which is the output of the comparator, is that the analog input voltage VS is the output voltage of the voltage dividing circuit 10 ■R
When it is larger than Il, it is low level, that is, the logic level is 0.
On the other hand, when the analog input voltage Vs is smaller than the output voltage VRn, it becomes a high level, that is, the logic level becomes 1°'.

Next, when the control signal 330 is set to logic "1", the comparator circuit enters a low power consumption state. That is, the inverting circuit 31
The transistors 1 to 305 and 308 that constitute 0 are always turned off. When the transistors 305 and 3090- constituting the inverting circuit 310 are turned off, the inverting circuit 310 stops its function, and even if the switch 303 is repeatedly turned on and off according to the clock φ, the bias current IB remains in the inverting circuit 310.
never flows. Therefore, when the switch 302 is repeatedly turned on and off according to the clock φ, the analog input voltage VS is applied to the capacitor 320, and the analog input voltage VS is applied to the capacitor 320.
Even if the potential at the point changes, since the inversion circuit 310 has stopped its function, it will not have any effect.

By the way, the control signal 330 is also connected to the logic gate 340 and the inversion circuit 313, and the output of the inversion circuit 313 is connected to the logic gate 350. Also logic gate 3
The other input terminals 40 and 350 are connected to the outputs of the inverting circuit 312 constituting the holding circuit, respectively. Therefore, when the control signal 330 is at logic "O", that is, during normal operation, the output values of the logic gates 340 and 350 are determined by the output value of the holding circuit 370. When the output of the logic gates 340 and 350 is logic "0", the transistor 361 is turned on. Conversely, when the output of the holding port 1i" 8370 is logic "o", the outputs of the logic gates 340 and 350 are logic "0", and the transistor 361 is turned on. Both outputs become logic "1" and transistor 362 is turned on. Therefore, since the input of the inverting circuit 311 which receives the output of the inverting circuit 310 as an input is fixed at a logic level, it is possible to prevent the bias current from flowing in the inverting circuit 311 as well, and the control signal 3
By setting 30 to logic "1", the voltage comparator circuit can be brought into a completely low power consumption state.

Furthermore, depending on the output value of the holding circuit 370, the inverting circuit 31
1 can be selectively connected to ground potential or power supply potential, and the output value of the holding circuit 370 is set to the logic If I I so that the output value of the holding circuit 370 is not lost.
If I, the input of the inverting circuit 311 is connected to the power supply potential, and conversely, if the output of the holding circuit 370 is logic II O+1, the input of the inverting circuit 311 is connected to the ground potential. When the power consumption state is reached, the previous comparison result can be retained.

FIG. 3 is a circuit diagram for explaining a second embodiment of the present invention. As shown in the figure, in this embodiment, an inverting circuit 311
Transistors 361 and 36 connected to the input terminals of
2 and the method of controlling transistors 363 and 364 has been changed, but the rest is the same as in FIG.

In this embodiment, when the control signal 330 is set to logic "'1", the inverting circuit 310 stops its function and the switch 303
Even if the inversion circuit 310 is repeatedly turned on and off, the bias current In does not flow through the inversion circuit 310. On the other hand, the control signal 33o
When is set to logic ``1'', transistors 361 and 362 connected to the input terminal of the inverter 1i18311 are turned on, respectively. Since the output of the inverting circuit 312 constituting the holding port 1S370 is connected to the transistors 363 and 364 via the inverting circuit 360, the holding circuit 37
If the output of the holding circuit is a logic "1", the transistor 363 is turned on, and the input terminal of the inverting circuit 311 is connected to the power supply potential 3. Conversely, if the output of the holding circuit is a logic "O", the transistor 364 is turned on. As a result, the input terminal of the inverting circuit 311 is connected to the ground potential.

In this embodiment, the control circuit for selectively connecting the input of the inversion circuit 311 to the ground potential or the power supply potential according to the output value of the holding circuit 370 is simplified, so that the comparison circuit can be configured with fewer elements. It has the advantage of
This advantage brings about a great effect when constructing a parallel comparison type analog-to-digital converter that requires many comparators.

FIG. 4 is a circuit diagram for explaining a third embodiment of the present invention. As shown in the figure, this embodiment is the same as the second embodiment shown in FIG. 3, except that the output of an inversion circuit 360 and the input of an inversion circuit 312 constituting a holding circuit are connected by a switch 365. The opening and closing of the switch 365 is controlled by the clock φ shown in FIG.

In this embodiment, since the output of the inverting circuit 360 is connected to the input of the inverting circuit 312 via the switch 365, the clock φ becomes logic "0°" and the switch 30
4 turns off, at the same time clock φ goes to logic II.
Since the switch 365 is turned on when the voltage becomes I11, positive feedback is applied, which has the advantage of being robust against noise.

〔Effect of the invention〕

As explained above, the present invention provides an inverting circuit for voltage comparison with a function of stopping its operation by a control signal, and a function of fixing the output of the inverting circuit at a predetermined potential. Even in a low power consumption state like a sampling type comparison circuit using a coupling capacitor, current does not flow through the internal inverting circuit due to changes in the analog input voltage, which eliminates the power consumption by the inverting circuit. The circuit can be put into a completely low power consumption state.

Furthermore, since a function is provided to positively feed back the output of the holding circuit that holds the comparison result, even if the inverting circuit stops functioning, it is possible to continue holding the comparison result immediately before the function stopped.

Furthermore, since no control element is provided at the input terminal of the inversion circuit for voltage comparison, the input sensitivity as a comparison circuit is not impaired, and since no special circuit is required, the configuration is relatively simple. It is possible to provide a sampling type voltage comparator that is easy to configure as a simple monolithic integrated circuit.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram for explaining the first embodiment of the present invention, FIG. 2 is a timing diagram showing the waveform of the clock that drives the voltage comparator, and FIG. 3 is a circuit diagram for explaining the first embodiment of the present invention. FIG. 4 is a circuit diagram for explaining the third embodiment of the present invention, and FIG. 5 is a circuit diagram showing the configuration of a conventional voltage comparator. 10... Voltage divider circuit, 301 to 304, 366...
Switch, 310-313, 360... Inversion circuit, 3
20... Capacitor, 330... Control signal input terminal. 17

Claims (1)

[Claims] a capacitor whose potential at one end becomes a reference voltage or an input voltage in response to a clock signal; an inverting circuit whose operation is controlled in response to a control signal with the other end of the capacitor as an input; and an input of the inverting circuit. and means for connecting an output in response to the clock signal; holding means for holding the output level of the inverting circuit; and means for fixing the output level of the inverting circuit by positively feeding back the output of the holding means. A voltage comparison circuit characterized by having: