JPH03174780A - Light emitting diode - Google Patents

Light emitting diode

Info

Publication number
JPH03174780A
JPH03174780A JP1313454A JP31345489A JPH03174780A JP H03174780 A JPH03174780 A JP H03174780A JP 1313454 A JP1313454 A JP 1313454A JP 31345489 A JP31345489 A JP 31345489A JP H03174780 A JPH03174780 A JP H03174780A
Authority
JP
Japan
Prior art keywords
electrode
layer
resin
conductive resin
powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1313454A
Other languages
Japanese (ja)
Other versions
JP2658446B2 (en
Inventor
Hisafumi Tate
尚史 楯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
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Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP31345489A priority Critical patent/JP2658446B2/en
Publication of JPH03174780A publication Critical patent/JPH03174780A/en
Application granted granted Critical
Publication of JP2658446B2 publication Critical patent/JP2658446B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To omit a strength reinforcing GaAlAs substrate by providing a surface electrode and a rear-surface-part electrode on the upper surface and the rear surface of a double-heterojunction structure comprising a clad layer, an active layer and a window layer, and lining the entire rear surface with a conductive resin. CONSTITUTION:A surface electrode 1 and a rear electrode 7 are provided on the upper surface and the rear surface of a double-heterojunction structure comprising a clad layer 4, an active layer 3 and a window layer 2. A reinforcing conductive resin film 9 is formed on the rear surface. As the reinforcing conductive resin, a heat resisting resin paste containing noble metal powder can be used. As the resin paste, epoxy resin and polyimide based resin can be used. As the noble metal powder, silver powder, gold powder or the powder of alloy containing the silver powder and the gold powder can be utilized. Thus a strength reinforcing GaAlAs substrate can be omitted.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は発光ダイオード(1,ED)、特に高輝度の発
光ダイオードに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a light emitting diode (1, ED), particularly a high brightness light emitting diode.

[従来の技術] 従来のタプル/\テロ構造(D I−f )のL E 
Dチップを第4図、第5図に示す。図中、1は表面電極
、2はGaAJ!Asウィンドウ層、3はGaAfJA
s活性層、4はGaAfJAsクラッド層、5はGaA
jA、s基板、6はGaAs基板、7は裏面部分電極、
8は裏面電極である。
[Prior art] L E of conventional tuple/\terror structure (D I-f)
The D chip is shown in FIGS. 4 and 5. In the figure, 1 is a surface electrode, 2 is GaAJ! As window layer, 3 is GaAfJA
s active layer, 4 is GaAfJAs cladding layer, 5 is GaA
jA, s substrate, 6 is GaAs substrate, 7 is back partial electrode,
8 is a back electrode.

第4図の裏面反射型GaA、Q AsLEDは、活性層
から発光した光のうち基板間へ放射された光が裏面で反
則されるため、第5図のG a A s基板付り、 B
 Dに比べ2(?i以−Lの高輝度か達成できるため、
屋外用などに用途は広い。
In the back reflection type GaA, Q As LED shown in Fig. 4, the light emitted from the active layer between the substrates is reflected by the back surface, so the back reflection type GaA, Q As LED shown in Fig.
Compared to D, it is possible to achieve a high luminance of 2 (?i or more -L),
It has a wide range of uses including outdoor use.

しかし、電極形成工程、)A1〜リソ工程、ダイシンク
工程、ステムへのダイボンディング工程などで、L E
 D用エピタキシャルウェハ又はこれを用いて製造した
L E Dチップを取り扱うためには、ウェハ、チップ
共に、ある程度の機械的強度が必要である。このため、
裏面反射型G a A j A s LED用エビタキ
シャルウヱハでは、第4図に示す如く、ウィンドウ層2
.活性層3.クラッド層4など直接発光に寄与する部位
の他に、厚さ200μm程度の強度補強用G a AJ
! A s基板5を形成し、全厚を300μIIl程度
にする必要がある6GaAJ!Asの結晶成長では、A
Jの偏析計数が大きいため、一般に大きく均一な結晶を
成長することができない。このため、GaAJIAs基
板は一般に入手困難である。
However, L E
In order to handle a D epitaxial wafer or an LED chip manufactured using the same, both the wafer and the chip require a certain degree of mechanical strength. For this reason,
In the back reflection type G a A j A s LED ebitaxial wafer, as shown in FIG.
.. Active layer 3. In addition to the parts that directly contribute to light emission, such as the cladding layer 4, there is a G a AJ for strength reinforcement with a thickness of about 200 μm.
! 6GaAJ that requires forming the As substrate 5 and making the total thickness about 300 μII! In As crystal growth, A
Since the segregation coefficient of J is large, it is generally not possible to grow large and uniform crystals. For this reason, GaAJIAs substrates are generally difficult to obtain.

裏面反射型GaA、Q AsLEDの代表的な製造方法
としては、次の2つかある。
There are two typical manufacturing methods for back-reflection type GaA, Q As LEDs:

(1)エピタキシャルウェハの成長は、発光素子に実績
のある液相エピタキシャル成長法が用いられる。GaA
s基板上に、、約200μIIlのGaAJIAs層5
を成長じた後、連続してクラッド層4、活性層3.ウィ
ンド層2のDH槽構造成長する。その後、GaAs基板
を研磨、エツチングなどで除去する。
(1) For the growth of the epitaxial wafer, a liquid phase epitaxial growth method, which has a proven track record for light emitting devices, is used. GaA
GaAJIAs layer 5 of approximately 200 μIIl on the s substrate.
After growing the cladding layer 4, the active layer 3. The DH tank structure of the wind layer 2 is grown. Thereafter, the GaAs substrate is removed by polishing, etching, or the like.

(2)GaAs基板上に、約200tzTnのGaA、
ffAs層5を成長した後、−度つエバを取り出し、G
aAs基板の除去、GaAjAs層5の表面鏡面仕上げ
を行う。この後、このGaAJAs基板5を用いてクラ
ッド層4.活性層3.ウィンド層2のDHI造成長を行
う。
(2) GaA of about 200tzTn on a GaAs substrate,
After growing the ffAs layer 5, the evaporator is taken out and the G
The aAs substrate is removed and the surface of the GaAjAs layer 5 is mirror-finished. Thereafter, this GaAJAs substrate 5 is used to form a cladding layer 4. Active layer 3. DHI growth of the window layer 2 is performed.

[発明が解決しようとする課題] しかし、従来技術で製造した裏面反射型GaAJfAs
LED用エピタキシャルウェハでは、強度補強のため厚
さ200μm程度の強度補強用GaA、OAs層が必要
となる。
[Problem to be solved by the invention] However, the back reflection type GaAJfAs manufactured using the conventional technology
In an epitaxial wafer for LED, a GaA or OAs layer for strength reinforcement with a thickness of about 200 μm is required for strength reinforcement.

このため、前述の製造方法(1)では、■降温開始温度
1ooo℃という高温の成長が必要となる。このため、
エピタキシャル炉の消耗が激しく設備償却費が高額とな
る。また200μmの厚膜を均一に成長することか難し
く、特性バラツキが大きく、量産化も困難である。
Therefore, in the above-mentioned manufacturing method (1), it is necessary to perform growth at a high temperature such as (1) a cooling start temperature of 100°C. For this reason,
The epitaxial furnace wears out rapidly, resulting in high equipment depreciation costs. Furthermore, it is difficult to uniformly grow a 200 μm thick film, the characteristics vary widely, and mass production is difficult.

■Ga溶液に温度勾配を持たせた温度差法では、ドーパ
ントの気相輸送、基板の輸送機構等が必要で、設備が高
価となる。
(2) The temperature difference method in which the Ga solution has a temperature gradient requires gas phase transport of the dopant, a transport mechanism for the substrate, etc., and the equipment becomes expensive.

また、前述の製造方法(2)では、 ■GaAJIAs層を成長した後、−度取り出し、Ga
As基板の除去1表面鏡面仕上げを行うため工程数がか
かる。またGaA、QAsは脆く割れ易いなめ、この工
程の歩留りは低い。
In addition, in the above-mentioned manufacturing method (2), (1) after growing the GaAJIAs layer, −30% is removed and the GaAJIAs layer is grown.
Removal of the As substrate requires a number of steps to mirror-finish the surface. Furthermore, since GaA and QAs are brittle and easily cracked, the yield of this process is low.

■−度取り出したGaAJIAs表面は酸化され、通常
の方法では正常なエピタキシャル成長ができない。また
、GaA、QAS基板中でも光吸収が起こるため、光出
力が低下する。
(2) The surface of the GaAJIAs taken out is oxidized, and normal epitaxial growth cannot be performed by normal methods. Furthermore, since light absorption occurs even in the GaA and QAS substrates, the light output decreases.

本発明の目的は、前記した従来技術の欠点を解消し、強
度補強用GaA、QAs基板が不用な裏面反射型GaA
、II AsLEDを提供することにある。
The purpose of the present invention is to solve the above-mentioned drawbacks of the prior art and to provide a back-reflection type GaA that does not require a GaA or QAs substrate for strength reinforcement.
, II AsLED.

[課題を解決するための手段] 本発明は、裏面反射型GaA、OAs発光ダイオードに
おいて、クラッド層、活性層、ウィンドウ層から成るダ
ブルへテロ構造の表面、裏面に、表面電極、裏面部分電
極を設け、その裏面全体を導電性樹脂で裏打ちしたもの
である。上記導電性樹脂で裏打ちする代りに、裏面電極
を形成した裏面に金属板を貼付けた構成とすることもで
きる。
[Means for Solving the Problems] The present invention provides a back reflection type GaA, OAs light emitting diode in which a front electrode and a back partial electrode are provided on the front and back surfaces of a double heterostructure consisting of a cladding layer, an active layer, and a window layer. The entire back surface is lined with conductive resin. Instead of lining with the conductive resin described above, a metal plate may be attached to the back surface on which the back electrode is formed.

[作用] 従来の強度補強用GaAJIAs基板をなくし、ダブル
へテロ構造の裏面全体を導電性樹脂で裏打ち又は金属板
を貼付けて補強したものであるため、150μm程度の
ウェハで取扱うことが可能であり、ウェハ価格を大幅に
低減し、特性バラツキを低減することができる。また、
導電性樹脂或いは金属板はGaAJIAs基板の場合に
比べ光吸収が少ないため、光出力も高輝度化できる。
[Function] Since the conventional GaAJIAs substrate for strength reinforcement is eliminated, and the entire back side of the double heterostructure is reinforced with conductive resin or pasted with a metal plate, it is possible to handle wafers of about 150 μm. , it is possible to significantly reduce wafer prices and reduce characteristic variations. Also,
Since the conductive resin or metal plate absorbs less light than the GaAJIAs substrate, the light output can also be made brighter.

補強用導電性樹脂としては、貴金属粉を含有した耐熱性
樹脂ペーストを用いることができる。その樹脂ペースト
には、エポキシ樹脂、ポリイシド系樹脂を用いることが
でき、貴金属粉としては、銀粉、金粉またはこれらを含
む合金の粉末を利用できる。
As the reinforcing conductive resin, a heat-resistant resin paste containing noble metal powder can be used. An epoxy resin or a polyide resin can be used for the resin paste, and a silver powder, a gold powder, or an alloy powder containing these can be used as the noble metal powder.

樹脂膜の厚さとしては、50μmから300μmが適当
である。半導体ウェハとしては、化合物半導体ウェハを
用いることができる。
The appropriate thickness of the resin film is 50 μm to 300 μm. A compound semiconductor wafer can be used as the semiconductor wafer.

貼付は用金属板としては、鉄、アルミニウム。Paste is suitable for metal plates such as iron and aluminum.

銅、真鍮の導電性金属板を利用できる。Copper and brass conductive metal plates can be used.

[実施例] 本発明の実施例を図を参照しながら説明する。[Example] Embodiments of the present invention will be described with reference to the drawings.

第1図は導電性樹脂で補強したLEDチップの実施例を
示す。発光波長は660μmである。ここては、通常の
クラッド層4.活性層3.ウィンドウ層2のダブルへテ
ロ構造(DH)の表面、裏面に、表面電極1.裏面部分
電#17を設け、裏面に補強用の導電性樹脂9の膜を形
成している。
FIG. 1 shows an example of an LED chip reinforced with conductive resin. The emission wavelength is 660 μm. Here, the normal cladding layer 4. Active layer 3. On the front and back surfaces of the double heterostructure (DH) of the window layer 2, surface electrodes 1. A back surface partial voltage #17 is provided, and a reinforcing conductive resin film 9 is formed on the back surface.

製造方法としては、液相エピタキシャル成長法により、
GaAs基板より膜厚100μ印のクラッド層4.1μ
mの活性層3.50μmのウィンドウ層2からなるDH
s造を形成する。この後、表面に直径150μmの金電
極1を、それら電極中心間の間隔が350μmになるよ
うに形成する。
The manufacturing method is liquid phase epitaxial growth method.
A 4.1μ cladding layer with a film thickness of 100μ is formed from a GaAs substrate.
DH consisting of an active layer of 3.50 μm and a window layer 2 of
Form a s structure. Thereafter, gold electrodes 1 with a diameter of 150 μm are formed on the surface such that the distance between the electrode centers is 350 μm.

電極の形成は、予めフォトリソ工程で電極パターンを形
成した上に電極を蒸着し、リフトオフ工程で形成した。
The electrodes were formed by forming an electrode pattern in advance in a photolithography process, depositing the electrodes on top, and then forming them in a lift-off process.

この後、400℃で3分間、N2雰囲気でアロイを行い
合金化した。
Thereafter, alloying was performed at 400° C. for 3 minutes in a N2 atmosphere.

表面電#11を形成したウェハは、表面を下に向は石英
トレイにセットする。この後、ウェハをトレイごとGa
Asの選択エツチング液に入れ、GaAs基板を除去す
る。エツチング液には、N202 : NH40H=1
0 : 1の混合溶液を室温で用いた。
The wafer on which the surface electrode #11 was formed was set on a quartz tray with the surface facing downward. After this, the wafer and the tray are
The GaAs substrate is removed by placing it in an As selective etching solution. The etching solution contains N202:NH40H=1
A 0:1 mixed solution was used at room temperature.

GaAs基板を除去したGaA、QAsウェハは、石英
トレイに乗せたまま乾燥し、金属マスクを上に乗せ固定
する。金属マスクには、直径30μmの孔がそれら孔中
心間の間隔が100μl11mになるように開けられて
いる。この状態のウェハ蒸着装置にセットし、金属マス
ク上がら全電極7を蒸着し、表面電@1と同様アロイを
行い合金化する。
The GaA, QAs wafer from which the GaAs substrate has been removed is dried while being placed on a quartz tray, and a metal mask is placed on top and fixed. Holes with a diameter of 30 μm were formed in the metal mask such that the distance between the centers of the holes was 100 μl and 11 m. The wafer is set in the wafer evaporation apparatus in this state, and all the electrodes 7 are evaporated from above the metal mask, and alloyed as in the surface electrode@1.

これにより、裏面には直径30μ川の部分電極7か10
0μm間隔で形成される。
As a result, a partial electrode 7 or 10 with a diameter of 30μ is placed on the back side.
They are formed at intervals of 0 μm.

これらの工程は石英トレイに乗せたまま行えるため、全
厚150μmのウェハでもウェハ割れを防止できる。従
って、歩留りが向上する。
Since these steps can be performed while the wafer is placed on the quartz tray, wafer cracking can be prevented even with a wafer having a total thickness of 150 μm. Therefore, the yield is improved.

金属マスクを取り外した後、裏面に銀−エポキシ導電性
樹脂9を厚さが200μmになるように塗る。この後、
170℃に30分加熱し樹脂を硬化させる。
After removing the metal mask, silver-epoxy conductive resin 9 is applied to the back surface to a thickness of 200 μm. After this,
Heat to 170°C for 30 minutes to harden the resin.

樹脂硬化後のウェハは、通常のプロセス工程にて素子に
分離された後、タイシングによりフルカットされチップ
に分離される。即ち、導電性樹脂層9の形成により、全
厚150μmのウェハでも、後工程での処理が可能にな
る。
After the resin has been cured, the wafer is separated into elements in a normal process step, and then fully cut by tying and separated into chips. That is, by forming the conductive resin layer 9, even a wafer with a total thickness of 150 μm can be processed in the post-process.

第2図は導電性樹脂9の代りに金属板1oで補強したL
 E Dチップの一実施例を示す。
Figure 2 shows L reinforced with metal plate 1o instead of conductive resin 9.
An example of an ED chip is shown.

上記実濾例と同様、裏面に全室@7を形成し、金属マス
クを取り外した後、裏面に銀−エポキシ導電性樹脂9で
アルミ板(金属板10)を貼付けた。アルミ板の厚さは
200μmである。この後、170℃に30分加熱し樹
脂を硬化させる。樹脂を硬化後のウェハは、通常の工程
でチップに分離される。
As in the above actual filter example, all chambers @7 were formed on the back surface, and after removing the metal mask, an aluminum plate (metal plate 10) was pasted on the back surface with silver-epoxy conductive resin 9. The thickness of the aluminum plate is 200 μm. Thereafter, the resin is cured by heating at 170° C. for 30 minutes. After the resin has been cured, the wafer is separated into chips in a normal process.

前述の如く製造したチップは、エポキシダイボンディン
グによりステム上ヘボンディングされ、ワイヤーボンデ
ィング、樹脂モールドを経てLBDを製造した。
The chip manufactured as described above was bonded onto the stem by epoxy die bonding, and an LBD was manufactured through wire bonding and resin molding.

第3図に、このLEDの発光出力を測定し、GaAJI
As基板使用及びGaAs基板使用のしEDと比較した
結果を示す。本LEDの発光出力特性(曲線A)は、G
aAjAs基板使用のLED(曲線B)、GaAs基板
使用のLED (曲線C)よりも、高輝度が得られるこ
とが分かる。これはGaAρAs基板中での光吸収がな
いためであり、発光光度が約20%向上できることを意
味している。
Figure 3 shows the measurement of the light emission output of this LED and the GaAJI
The results are shown in comparison with ED using an As substrate and a GaAs substrate. The light emission output characteristic (curve A) of this LED is G
It can be seen that higher brightness can be obtained than the LED using the aAjAs substrate (curve B) and the LED using the GaAs substrate (curve C). This is because there is no light absorption in the GaAρAs substrate, and means that the luminous intensity can be improved by about 20%.

上記実施例の特徴をまとめると、次のようになる。The features of the above embodiment can be summarized as follows.

(i)zピタキシャル成長において、通常のDH楕遣と
同様、900 ’C以下がらの成長条件が用いられるた
め、一般に均一なウェハが製造できる。
(i) In the z-pitaxial growth, growth conditions of 900'C or less are used, similar to the normal DH ellipse, so that generally uniform wafers can be manufactured.

(2) G a AJ) A s基板中での光吸収がな
いため、発光光度か約20%向上できた。
(2) Since there is no light absorption in the G a AJ) A s substrate, the luminous intensity of the emitted light could be improved by about 20%.

(3)通常のプロセス工程、素子製造が利用できるため
、特殊な装置を必要としない。
(3) Since normal process steps and device manufacturing can be used, no special equipment is required.

(4)ウェハ割れ等が減少し、歩留りか向上した。(4) Wafer cracking, etc. has decreased, and yield has improved.

上記実施例では、波長660μmの赤色LEDに関して
記載したか、本発明は、赤外LEDなど、GaAJlA
s層を補強するため厚く成長している発光素子一般に広
く利用できる。
In the above embodiments, the red LED with a wavelength of 660 μm was described, but the present invention is also applicable to GaAJlA LEDs such as infrared LEDs.
It can be widely used in general light emitting devices in which the S layer is grown thick to reinforce it.

[発明の結果] 以上述べたように、本発明によれは、以下の顕著な効果
を奏することができる。
[Results of the Invention] As described above, the present invention can produce the following remarkable effects.

(1)従来の強度補強用GaAJIAs基板をなくし、
ダブルへテロm造の裏面全体を導電性樹脂で裏 0 打ち又は金属板を貼付けて補強したものであるため、1
50μm程度のウェハで取扱うことか可能であり、ウェ
ハ価格を大幅に低減し、特性バラツキを低減することか
できる。ウェハ割れ等が減少し、歩留りも向上すると共
に、通常のプロセスエ稈、素子製造か利用できるため、
特殊な装置を必要としない。
(1) Eliminating the conventional GaAJIAs substrate for strength reinforcement,
The entire back side of the double-hetero structure is lined with conductive resin or reinforced with a metal plate, so 1.
It is possible to handle wafers with a diameter of about 50 μm, and the wafer price can be significantly reduced and variations in characteristics can be reduced. This reduces wafer cracking, improves yield, and allows use of conventional process techniques and device manufacturing.
No special equipment required.

(2)また、強度補強用GaAlAs基板が存在せず、
該GaAJIAs基板中での光吸収かないため、発光光
度を向上できる。
(2) Also, there is no GaAlAs substrate for strength reinforcement,
Since no light is absorbed in the GaAJIAs substrate, the luminous intensity of light emission can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示ずLEDチップの断面図
、第2図は本発明の他の実方也例を示ずLEDチップの
断面図、第3図は本発明LEDの発光特性の測定例を示
す図、第4図は従来の裏面反射型GaAjA、5LED
チップの断面図、第5図はG a A s基板を用いた
従来のL EDチップの断面図である。 図中、1は表面電極、2はGaA、QAsウィンドウ層
、3はGa、A、QAs活性層、4はGa1 A、ClAsクラッド層、5はGaA、f!As基板、
6はGaAs基板、7は裏面部分電極、8は裏面電極、
9は導電性樹脂、10は金属板を示す。
FIG. 1 is a cross-sectional view of an LED chip, not showing one embodiment of the present invention, FIG. 2 is a cross-sectional view of an LED chip, not showing another example of the present invention, and FIG. A diagram showing an example of measuring characteristics, Figure 4 is a conventional back reflection type GaAjA, 5LED.
Cross-sectional view of the chip. FIG. 5 is a cross-sectional view of a conventional LED chip using a GaAs substrate. In the figure, 1 is a surface electrode, 2 is a GaA, QAs window layer, 3 is a Ga, A, QAs active layer, 4 is a Ga1A, ClAs cladding layer, 5 is a GaA, f! As substrate,
6 is a GaAs substrate, 7 is a back partial electrode, 8 is a back electrode,
9 indicates a conductive resin, and 10 indicates a metal plate.

Claims (1)

【特許請求の範囲】 1、裏面反射型GaAlAs発光ダイオードにおいて、
クラッド層、活性層、ウィンドウ層から成るダブルヘテ
ロ構造の表面、裏面に、表面電極、裏面部分電極を設け
、その裏面全体を導電性樹脂で裏打ちしたことを特徴と
する発光ダイオード。 2、上記導電性樹脂で裏打ちする代りに、裏面電極を形
成した裏面に金属板を貼付けたことを特徴とする請求項
1記載の発光ダイオード。
[Claims] 1. In a back reflection type GaAlAs light emitting diode,
A light emitting diode characterized in that a front electrode and a back partial electrode are provided on the front and back surfaces of a double heterostructure consisting of a cladding layer, an active layer, and a window layer, and the entire back surface is lined with a conductive resin. 2. The light emitting diode according to claim 1, characterized in that instead of being lined with the conductive resin, a metal plate is attached to the back surface on which the back electrode is formed.
JP31345489A 1989-12-04 1989-12-04 Light emitting diode manufacturing method Expired - Lifetime JP2658446B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31345489A JP2658446B2 (en) 1989-12-04 1989-12-04 Light emitting diode manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31345489A JP2658446B2 (en) 1989-12-04 1989-12-04 Light emitting diode manufacturing method

Publications (2)

Publication Number Publication Date
JPH03174780A true JPH03174780A (en) 1991-07-29
JP2658446B2 JP2658446B2 (en) 1997-09-30

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Country Status (1)

Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003052838A3 (en) * 2001-12-13 2004-05-27 Rensselaer Polytech Inst Light-emitting diode with planar omni-directional reflector
JP2005259910A (en) * 2004-03-10 2005-09-22 Shin Etsu Handotai Co Ltd Light emitting element and its manufacturing method
JP2009272656A (en) * 2009-08-20 2009-11-19 Sumitomo Electric Ind Ltd Semiconductor light-emitting element, and manufacturing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5664481A (en) * 1979-10-30 1981-06-01 Toshiba Corp Led device
JPS59112668A (en) * 1982-12-20 1984-06-29 Fujitsu Ltd Light emitting diode

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5664481A (en) * 1979-10-30 1981-06-01 Toshiba Corp Led device
JPS59112668A (en) * 1982-12-20 1984-06-29 Fujitsu Ltd Light emitting diode

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003052838A3 (en) * 2001-12-13 2004-05-27 Rensselaer Polytech Inst Light-emitting diode with planar omni-directional reflector
US6784462B2 (en) 2001-12-13 2004-08-31 Rensselaer Polytechnic Institute Light-emitting diode with planar omni-directional reflector
JP2005259910A (en) * 2004-03-10 2005-09-22 Shin Etsu Handotai Co Ltd Light emitting element and its manufacturing method
JP4505794B2 (en) * 2004-03-10 2010-07-21 信越半導体株式会社 Method for manufacturing light emitting device
JP2009272656A (en) * 2009-08-20 2009-11-19 Sumitomo Electric Ind Ltd Semiconductor light-emitting element, and manufacturing method thereof

Also Published As

Publication number Publication date
JP2658446B2 (en) 1997-09-30

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