JPH03173437A - Manufacture of bipolar transistor - Google Patents

Abstract

PURPOSE:To obtain a high-performance semiconductor by depositing an Si semiconductor film on a semiconductor film deposited on the collector area of the semiconductor and dispersing impurities at a high concentration after cleaning the surface of the Si semiconductor film, and then, depositing another Si semiconductor film on a window section surrounded by an oxide film. CONSTITUTION:A collector area 2 is formed on the upper surface of a semiconductor substrate 1 made of silicon. This area 2 has a laminated structure of the N<+> type first N<+> layer 3 and N type second layer 4. The N<+> type first layer 3 contains an N type impurity dispersed into the layer 3 at a high concentration in order to reduce the collector series resistance of a bipolar transistor TR. The N type second layer 4 is the area used for forming a p-n junction. After cleaning the surface of the area 2, a semiconductor film 6 made of silicon is deposited on the area 2. The film 6 is cleaned so as to expose an activated surface and disperse adsorbed impurities into the film 6. Then the part other than an element area is coated with an oxide film 9 and a silicon semiconductor film 10 is deposited on a window section surrounded by the film 9. Finally, an emitter area is formed by introducing N type impurities into the film 10.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a bipolar transistor,
In particular, it relates to a method of forming a base region.

[Conventional technology]

2. Description of the Related Art Conventionally, a method of manufacturing a bipolar transistor is known in which a collector region, a base region, and an emitter region are successively formed on a semiconductor substrate. In this case, the base region is formed by depositing a semiconductor film layer of a predetermined thickness on the collector region and introducing impurities at a predetermined concentration. Ion implantation and conventional diffusion techniques are used to introduce impurities.

[Problem that the invention seeks to solve]

In recent years, with advances in integrated circuit technology, the size of bipolar transistors has become smaller and smaller. In addition, in order to increase the operating speed of bipolar transistors, the thickness of the base region is becoming thinner and thinner. When introducing impurities into the semiconductor film layer constituting such a thin base region using ion implantation, the problem is that it is not easy to obtain a steep impurity concentration distribution because the impurity distribution becomes a normal distribution. there were. Furthermore, when conventional diffusion techniques are used to introduce impurities, it is difficult to precisely control the amount of impurities introduced, making it difficult to obtain a base region with desired characteristics.

[Means for solving problems]

In view of the above-mentioned conventional problems, it is an object of the present invention to provide a method for manufacturing a bipolar transistor using a doping method that can accurately control the introduction of impurities into a thin semiconductor film layer.

In order to achieve the above object, the method for manufacturing a bipolar transistor according to the present invention includes a deposition step of depositing a semiconductor film layer on a collector region, and a cleaning step of cleaning the surface of the semiconductor film layer to expose an active surface. an adsorption step in which a gas containing an impurity component is supplied to the active surface while heating the substrate to form an impurity adsorption film; and a diffusion step in which a base region is formed by diffusing impurities into the semiconductor film layer. It is characterized by having the following.

Preferably, the adsorption step is a step of supplying gaseous diborane containing an impurity component made of boron to the semiconductor film layer made of silicon to form a boron adsorption film. The semiconductor film layer obtained by carrying out this adsorption step and then performing a diffusion step contains P-type impurity boron, so it can be used as a base region of an NPN bipolar transistor.

[For production]

According to the present invention, an impurity gas is supplied to the surface of the activated semiconductor film layer to form an impurity adsorption film. The amount of impurities adsorbed can be appropriately set depending on the vapor pressure of the impurity gas to be introduced, the introduction time, etc. A base region is formed by performing solid phase diffusion of the semiconductor film layer using this impurity adsorption layer as a diffusion source. The impurity concentration and diffusion depth in the base region can be controlled extremely accurately by appropriately setting the adsorption amount of the impurity adsorption film and the conditions for diffusion (substrate temperature and heating time).

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the method for manufacturing a bipolar transistor according to the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a diagram showing the manufacturing process of a bipolar transistor.

In the step shown in FIG. 1<A), a collector region 2 is formed on the upper surface of a semiconductor substrate 1 made of silicon. The collector region 2 has a laminated structure of an N-type negative layer 3 and an N-type second layer 4.

In the N+ type -th layer 3, N type impurities are diffused at a high concentration in order to lower the collector series resistance of the bipolar transistor. The N-type second layer 4 is a region for forming a so-called PN junction. Further, a field oxide film 5 is formed on the base region 2 to isolate each bipolar transistor from each other. Field oxide film 5 can be formed, for example, by selective thermal oxidation. The region surrounded by field oxide film 5 is a so-called element region, where individual bipolar transistors are formed.

In the step shown in FIG. 1B, after cleaning the surface of the collector region 2, a semiconductor film layer 6 made of silicon is deposited. Since the semiconductor film layer 6 is a portion that will later become a base region, it is preferable that its film thickness be as thin as possible. For this reason, the semiconductor film layer 6 is deposited using, for example, a molecular layer epitaxial growth method. By this method, a semiconductor film layer 6 made of silicon single crystal is formed on the collector region 2.

In the step shown in FIG. 1C, the surface of the semiconductor film layer 6 is cleaned to expose the active surface.

Thereafter, a gas containing an impurity component such as boron, such as diborane, is supplied to the substrate 1 to form an impurity adsorption film 7 made of boron or a boron compound.

In order to appropriately set the adsorption amount of the adsorption film 7, the vapor pressure of diborane, the supply time, and the heating temperature of the substrate are adjusted.

In the step shown in FIG. 1(D), the adsorbed impurities are diffused into the semiconductor film layer 6. Diffusion is performed by heating the substrate. By appropriately setting the heating temperature and heating time of the substrate, the impurity boron can be diffused and activated substantially uniformly in the base region 8. Note that this step can also be performed in the step of providing an emitter formation region, which will be described later.

In the step shown in FIG. 1(E), the portion other than the element region is covered with an oxide film 9. This oxide film 9 coating can be formed by chemical vapor deposition and etching of silicon dioxide. Subsequently, a silicon semiconductor film layer 1O is deposited on the window portion surrounded by the oxide film 9. This silicon semiconductor film layer 10 can be formed by epitaxial growth or chemical vapor deposition.

Finally, in the step shown in FIG. 1(P), N-type impurities are introduced into the silicon semiconductor film layer 10 to form an emitter region. For example, arsenic may be introduced by ion implantation to introduce the N-type impurity. Alternatively, in the same way as the method of introducing P-type impurities into the base region in this example, a gas containing an N-type impurity component was supplied to the active surface of the silicon semiconductor film layer 10 to form an N-type impurity adsorption film. Afterwards, a diffusion treatment may be performed.

FIG. 2 is a block diagram showing a manufacturing apparatus for consistently performing a series of processes including a deposition step, a cleaning step, an adsorption step, and a diffusion step, which are the main parts of the manufacturing method according to the present invention. As shown in the figure, a silicon semiconductor substrate 1 on which a collector region and a field oxide film are formed is set near the center inside a chamber 12 made of quartz. The temperature of the substrate 1 is controlled by a heating system 13 using an infrared lamp heating method or a resistance heating method.
The temperature is maintained at a predetermined level by controlling the temperature.

The interior of the chamber 12 is evacuated to a high vacuum using a high vacuum evacuation system 14 composed of a plurality of pumps including a turbo molecular pump as the main evacuation pump.

The degree of vacuum inside the chamber 12 is constantly monitored using a pressure gauge 15. The silicon substrate 1 is transferred between the chamber 12 and a load chamber 17 connected to the chamber 12 via a gate valve lea.
This is carried out using the transport mechanism 18 in an open state. Note that the load chamber 17 is normally evacuated to a high vacuum by the load chamber exhaust system 19 with the gate valve 18b open, except when the silicon semiconductor substrate 1 is taken in and out of the load chamber 17 and when transferred. .

Gas supplies 'ti, 2+ are connected to the vacuum chamber 12 via a gas introduction control system 20. The gas supply source 21 has a plurality of gas cylinders that store raw material gases such as hydrogen gas, diborane gas, dichlorosilane gas, etc. necessary for a series of treatments. The type, introduction pressure, introduction time, etc. of the gas introduced into the chamber 12 from the gas supply Fi, 21 are controlled using the gas introduction control system 20.

FIG. 3 is a sequence chart of an actual process corresponding to the steps of performing the series of processes described above. The horizontal axis shows time and the vertical axis shows substrate temperature. As shown in the figure, after the substrate temperature is raised and stabilized, the surface of the collector region is cleaned as necessary. Thereafter, the substrate temperature is lowered slightly and a semiconductor film layer is deposited on the collector region by epitaxial growth. Next, the surface of the deposited semiconductor film layer is cleaned to expose the active surface, an impurity adsorption film is formed, and finally annealing is performed to diffuse the impurities into the semiconductor film layer to form a base region. do. The silicon substrate on which the base region has been formed is returned to room temperature and then taken out from the vacuum chamber. Then it is moved to the next process. Note that if the formation of the epitaxial growth layer and the formation of the impurity adsorption layer are performed continuously in this step, cleaning before introducing the impurity is not necessarily necessary. This is because the surface of the epitaxial growth layer is an active surface, and no natural oxide film is formed in a high vacuum.

The deposition process, cleaning process, adsorption process, and diffusion process, which are the main parts of the manufacturing method according to the present invention, will be explained in detail with reference to FIGS. 2 and 3. First, in the deposition step, the substrate temperature is raised to 850.degree. C., the surface of the collector region is cleaned as necessary, and the temperature is lowered to 825.degree. C., after which a silicon semiconductor film is deposited by epitaxial growth. As the epitaxial growth method, for example, so-called molecular layer epitaxial growth in which dichlorosilane (S iH 2 CN 2 ) is introduced as a raw material gas into a vacuum chamber can be used. Thereby, the thickness of the semiconductor film deposited layer can be adjusted at the molecular layer level, and the desired film thickness can be set with extreme precision as needed. Regarding the molecular layer epitaxial growth method, for example, Japanese Patent Application No. 1987-
153978, the method is described in detail. Alternatively, in addition to the molecular layer epitaxial growth method, it is also possible to deposit a silicon single crystal film using, for example, a molecular beam epitaxial growth method or a chemical vapor deposition method.

Next, the surface of the deposited semiconductor film layer is cleaned. This cleaning reduces the background pressure of the vacuum chamber to I
Set the substrate temperature to 1O-4Pa or less, e.g. 825℃.
This is done by introducing hydrogen gas into the vacuum chamber while maintaining the temperature. For example, hydrogen gas has a pressure inside the chamber of 1
．． It is introduced for a certain period of time under conditions such that the pressure becomes 3X 1o-2Pa. Note that cleaning does not necessarily require the introduction of hydrogen gas, and may also be carried out by simply holding the silicon substrate 1 in a heated state in a chamber maintained at high vacuum. Alternatively, as in this example, when an impurity adsorption film is formed in the same chamber immediately after epitaxial growth of a semiconductor film layer, the surface of the semiconductor film layer is considered to be in a substantially active state. There is no need to perform any particular cleaning treatment.

Next, an adsorption film of boron or a compound containing boron is formed on the surface of the silicon semiconductor film having an active surface. For example, while keeping the substrate temperature at 825°C, the surface of the silicon substrate 1 is coated with diborane (B2H6
) will be introduced. For example, the chamber pressure is L3X 1O-
By introducing a raw material gas prepared by diluting diborane to 5% with nitrogen gas for a certain period of time under conditions such that the pressure becomes 2 Pa, an adsorption film of boron or a compound containing boron is formed.

Finally, in the diffusion step, after forming the impurity adsorption film, the introduction of diborane gas is stopped and annealing is performed in vacuum, thereby performing impurity diffusion using the adsorption film as a diffusion source. At the same time, impurity atoms are activated.

FIG. 4 is a diagram showing the impurity diffusion concentration profile in the base region obtained in this manner. This profile was obtained using a secondary ion mass spectrometer. In order to improve the accuracy of analysis on the substrate surface, the surface of the sample is coated with an amorphous silicon layer. Therefore, in FIG. 4, the original surface of the semiconductor film layer into which impurities have been diffused is shown in contact with the amorphous silicon layer. As shown in the figure, the impurity boron is almost uniformly diffused into the semiconductor film layer, that is, the epitaxially grown layer. The impurity concentration profile shows a steep drop at the junction in contact with the lower collector region. As described above, according to the present invention, it is possible to perform diffusion in an extremely thin epitaxial growth layer while controlling the impurity concentration profile in the depth direction.

FIG. 5 shows the relationship between the peak concentration of boron diffused into the base region and the introduction pressure and introduction time of diborane gas.

As shown in the figure, the higher the introduction pressure of diborane gas, the higher the boron peak concentration, and the longer the introduction time, the higher the boron peak concentration. In this way, by appropriately setting the boron gas introduction conditions, it is possible to adjust the concentration of the impurity boron implanted into the base region.

In the embodiment of the present invention described above, by diffusing P-type impurity boron into the silicon semiconductor film layer, NP
The case of forming the base region of an N bipolar transistor has been described. However, in addition to diborane, raw material gases for doping with P-type impurities include trimethyl gallium (TMG), boron trichloride (
It goes without saying that compound gases of group Ⅰ elements such as 80g3) are also effective. Similarly, when N-type impurities are introduced into the silicon semiconductor film layer to form the base region of a PNP-type bipolar transistor, examples of impurity gases such as arsine (A s Ha ), phosphorus trichloride (20g3), antimony chloride (SbC15),
Phosphine (PH3) etc. can be used. Furthermore, in the embodiments described above, the substrate temperature is set to 82°C, for example.
It was set at 5°C. However, according to the inventor's previous research, the substrate temperature for surface cleaning treatment, including the relationship with background pressure and atmospheric gas, is 8.
A range of 00°C to 1200°C is suitable.

In addition, the substrate temperature in forming the impurity adsorption film was 400°C.
A temperature range of 0.degree. C. to 950.degree. C. is suitable. Further, in epitaxial growth of a semiconductor film layer, a temperature range of 800° C. to 11.00° C. is appropriate as the substrate temperature.

〔Effect of the invention〕

As explained above, according to the present invention, an impurity adsorption film is deposited directly on the semiconductor film layer deposited on the collector region, and solid-phase diffusion is performed using this adsorption film as a diffusion source to form a semiconductor film. This has the effect that impurities can be diffused into the layer at a high concentration and in a limited manner. As a result, the thickness of the base region can be significantly reduced compared to the conventional method, and the speed of the bipolar transistor can be increased.

[Brief explanation of the drawing]

Figure 1 is a manufacturing process diagram of a bipolar transistor, Figure 2 is a block diagram of a bipolar transistor manufacturing apparatus, Figure 3 is a process sequence chart for manufacturing a bipolar transistor, Figure 4 is an impurity concentration profile of the base region, and Figure 5 is a diagram of the manufacturing process of a bipolar transistor. The figure is a graph showing the relationship between boron beak concentration and impurity gas introduction conditions. 1... Semiconductor substrate 3... N+ region... Field oxide film 7... Impurity adsorption film 9... Oxide film 10... Silicon semiconductor film layer 2... Collector region 4... N region 6...Semiconductor film layer 8...Base region 1...Emitter region Applicant Agent: Seiko Electronics Co., Ltd.

Claims (1)

[Claims] 1. A method for manufacturing a bipolar transistor obtained by sequentially forming a collector region, a base region, and an emitter region on a semiconductor substrate, comprising: a deposition step of depositing a semiconductor film layer on the collector region; a cleaning step of cleaning the surface of the semiconductor film layer to expose the active surface; an adsorption step of supplying a gas containing an impurity component to the active surface while heating the substrate to form an impurity adsorption film; A method for manufacturing a bipolar transistor, comprising the step of forming a base region by diffusing a base region into the semiconductor film layer. 2. Manufacturing the NPN bipolar transistor according to claim 1, wherein the adsorption step includes supplying gaseous diborane containing an impurity component made of boron to the semiconductor film layer made of silicon to form a boron adsorption film. Method.