JPH03167984A - Picture information transmitter - Google Patents

Abstract

PURPOSE:To save memory capacity by storing a portion used by its own DSP only and an overlapped portion possibly in common use with the DSP in charge of adjacent areas in one preceding frame into separate memories. CONSTITUTION:Input data in an area in charge of a DSP 5a is written in an input memory 11a among data by one frame converted into a digital signal and the input data in an area in charge by a DSP 5b is written in an input memory 11b. The data is decoded locally to apply coding of a succeeding frame to the coding data and the data of an area B not in use in the DSP 5a is written in a local memory 12b and the data in an area (b) possibly in use is written in an overlap memory 13. Thus, the number of times of data transfer is remarkably reduced and the memory capacity and the number of DSPs in use are reduced.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to an image information transmission apparatus that encodes and transmits image information using a plurality of digital signal processors (hereinafter referred to as DSPs).

[Conventional technology]

Figure 4 shows, for example, the Picture Coding Symposium 88.
P. osium8 8 ). 15.2-2 is a block diagram showing the conventional image information transmission device shown in FIG. In the figure, 1 is a camera for inputting image information, and 2 is a camera for inputting image information.
is an analog-to-digital converter (hereinafter referred to as A/D converter) that converts manually generated image information from analog signals to digital signals.
It is called a D converter). , 3 are video paths to which this A/D converter 2 is connected, and 4 is a frame store that stores data from this video bus 3. DSPs 5a to 5h are provided corresponding to each of a plurality of regions obtained by dividing one frame of image information, and encode the data according to a predetermined encoding algorithm. 6a to 6h are this DSP5a to 5h
This is a local memory that is provided corresponding to the local memory and stores data used in the process of processing. 7 is a processor (hereinafter referred to as CPU) that controls the entire image information transmission device, 8 is a VME bus that connects this CPU 7, frame store 4 and DSPs 5a to 5h, and 9 is a processor that connects frame store 4 and local memories 68 to 6h. It is a memory bus that connects 10 is transmission data sent from the CPU 7. Next, we will explain the operation. Image information input from the camera 1 is converted into a digital signal by the A/D converter 2, and one frame is written into the frame store 4 via the video bus. And CPU7 has 8 DS
The data transfer is sequentially instructed to P5a to P5h. Each DS
P5a to 5h transfer the data of the area in their own charge from the frame store 4 via the memory bus 9 and the feedback data that has already been encoded in the past of the area necessary for encoding the area in their own charge to their own local memory 6a. ~Transfer to 6h. Here, the area in charge of each DSP 5a to 5h is determined, for example, as follows. DSP 5a~DSPE
5f is a DSP in charge of luminance signals, and the screen is vertically divided equally into 6 to be the area in charge of each DSP 5a to 5f.
5g and DSP 5h are two types of color difference signal DSP
As a result, each DSP performs encoding processing for its own area. After the transfer has been completed, the DSPs 5a to 5h then divide their first area of responsibility into blocks of processing units, sequentially execute multiple types of processing tasks for each block in an agreed order, and encode the data. The encoded data is transferred to the CPU 7 via the VME bus 8. The CPU 7 first performs variable length encoding of the received data, and then performs flaking according to a predetermined transmission format. Then, it is sent out to the transmission path as transmission data 10. Furthermore, the data encoded by each DSP 5a to 5h is transferred to each corresponding DSP 5 for encoding the next frame.
After being locally decoded in steps a to 5h, the data are transferred to the frame store 4 via the memory bus 9 and stored therein. In addition to the above, the CPU 7 monitors the processing status of the processing area in charge of each DSP 5a to 5h, and when all DSPs 5a to 5h finish processing a block in the processing unit of the processing area in their responsibility, it starts processing the block in the next processing unit. Let. In this manner, when each DSP 5a to 5h finishes processing one frame of processing unit blocks, it moves on to processing the next frame.

[Problem to be solved by the invention]

Since the conventional image information transmission device is configured as described above, each DSP 5a to 5h is connected to other adjacent DSPs 5a to 5h.
DS in charge of the adjacent area, which is necessary when processing such as motion compensation at the boundary with the 5h area in charge.
．． It is necessary to load the data of the part necessary for processing the next frame among the processing results by P5a to 5h from the frame store 4 to the own local memories 6a to 6h, and for this purpose, the local memories 6a to 6h and the frame store 4
There was a problem that the number of data transfers between 0 and 0 increased, and the proportion of data transfer time in the overall processing time increased. This invention was made to solve the above-mentioned problems, and it is possible to reduce the number of data transfers, reduce the memory capacity and the number of DSPs used, and obtain an inexpensive and compact image information transmission device. With the goal.

[Means to resolve issues]

The image information transmission device according to the present invention stores a portion of data processed by a DSP that is used only by the DSP in processing the next frame in a local memory prepared for each DSP, A portion that may be used by an adjacent DSP is stored in an overlap memory so that it can be shared with the adjacent DSP.

[Effect]

In this invention, when each DSP finishes processing data in the area it is in charge of, it uses other DSPs to process the next frame.
By storing parts that are never used by P in its own local memory, and storing overlapped parts that may be used in adjacent DSPs in overlap memory, the number of data transfers can be greatly reduced. reduced to
To realize an image information transmission device capable of reducing memory capacity and the number of DSPs used.

【Example】

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, ■ is a camera, 2 is an A/D converter, 5a, 5
b is a DSP, 7 is a CPU, and 10 is transmission data, which are the same or equivalent parts to those in the conventional system denoted by the same reference numerals in FIG. 4, and detailed explanations thereof will be omitted. 11a. 1lb is connected to A/D converter 2, and each DSP
This is an input memory in which data of the areas in charge of 5a and 5b are stored. 12a and 12b are provided corresponding to each DSP 5a and 5b, and are used by other DSPs 5b and 5b in processing the next frame in the area processed by the DSP 5a and 5b.
13 is a local memory in which locally decoded data of a portion not required for processing of the next frame is stored; 13 is a locally decoded data of an overlapped portion that may be shared by both DSPs 5b and 5a in processing the next frame. This is an overlap memory where data is stored. 14a and 14b are variable length encoders (hereinafter referred to as VL) for passing the data decoded by the DSPs 5a and 5b to the CPU 7.
C) memory. 15a. 15b is input memory lla, llb, local memory 12a, 12b, overlap memory 13, and VLC memory 14a, 1
This is a local bus that connects the DSP 4b and the DSPs 5a and 5b. 16 is a transmission buffer for converting the speed of data variable-length encoded by the CPU 7 to the speed of transmission data; 17 is a VLC memory 14a, 14b, a transmission buffer l;
This is a VLC bus that connects the CPU 6 and the CPU 7. Next, the operation will be explained. Image information input from the camera 1 is converted from an analog signal to a digital signal by an A/D converter 2. Of the data for one frame converted into a digital signal, the human memory lla contains the DSP5
The input data of the area handled by a is written, and the input data of the area handled by the DSP 5b is written into the input memory llb. For example, if the areas in charge of the DSP 5a in FIG. 1 are area A and area a as shown in FIG.
Data of area A and area a are written to the input memory lla. Furthermore, if the areas in charge of the DSP 5b are area B and area b as shown in FIG.
Data of area B and area b are written to area b. The DSP 5a has an input memory Ila and a local memory 12.
Information source encoding such as motion compensation, interframe encoding, and filter processing is performed on the data read out from a or the overlap memory 13, and these encoded data are converted to VLC.
Write to memory 14a. Further, the coded data is locally decoded to perform interframe coding of the next frame, and among the decoded data, data in area A that is not used by the DSP 5b is written to the local memory 2a. Area a that may also be used in DSP5b
data is written to the overlap memory 13. Similarly, the DSP 5b performs the aforementioned information source encoding on the data read from the input memory Ilb and the local memory 12b or the overlap memory 13, and writes these encoded data to the VLC memory 14b. Also,
Encoded data is locally decoded to encode the next frame, and out of the decoded data, data in area B that is not used by the DSP 5a is stored in the local memory 1.
2b, data of area b that may be used is written to the overlap memory 13. In the overlap memory 13, the data of the overlap area of area a and area b shown in FIG. When it is ±15 pixels, the number of pixels in the horizontal direction of each area a and area b is 15 pixels, and the overlap memory 13 has 1
If the number of lines in the vertical direction of a frame is N, data for 30 × N pixels will be stored.In order to perform motion compensation in the DSP 5a, data from one frame before is required, but the When the data in the vector search range is in area A, the data of the previous frame is read from the local memory 12a, and the data in the search range is in area a.
Or, when it is in area b, a similar operation is performed in the DSP 5b, which reads the data of the previous frame from the overlap memory 13. CPU7 is encoded by DSP5a and DSP5b,
The encoded data stored in the VLC memory 14a or the VLC memory 14b is read out via the VLC bus 17 in the order in which it is sent to the transmission path, and variable length encoding is performed according to a predetermined variable length code. The variable-length coded data is framed in a predetermined transmission format and sent to the transmission buffer 16 via the VLC bus 17.
will be written to. The transmission buffer 16 converts the received data from the encoding processing speed to the transmission path speed, and sends it out to the transmission path as transmission data 10. In the above embodiment, each local memory 12a, 12b has its own DSP 5.
The overlap memory area 3 stores only the data used in the DSP 5a and 5b, and the overlap memory 3 stores data used in the DSP 5a and 5b.
, 5b, but the local memory 12a. 12b stores data of the area in charge of itself, and overlap memory 13
may store data used by the DSPs 5a and 5b in charge of adjacent areas. Furthermore, although the above embodiments have been described using motion compensation as an example, the present invention can also be applied to processing that uses data that spans between blocks, such as filter processing.

【Effect of the invention】

As described above, according to the present invention, in the data one frame before, a part used only by the own DSP and an overlapping part that may be shared by a DSP in charge of an adjacent area are separated into separate parts. Because it is stored in memory, it is possible to reduce memory capacity, and data transfer between memories is also significantly reduced, reducing the load on each processor, reducing the number of processors used. This has the effect of providing an inexpensive and compact image information transmission device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an image information transmission device according to an embodiment of the present invention, FIG. 2 is an explanatory diagram showing the area in charge of the DSP, and FIG. 3 is the relationship between the motion vector search range and the overlap area. FIG. 4 is a block diagram showing a conventional image information transmission device. 2 is an A/D converter, 5a, 5b are DSPs, 12a, 12
b is local memory, 13 is overlap memory. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Q↑ Figure 2 Figure 3 Zuhei Orsho (published in his own year) 2. 5. 2 March Day 2. Name of the invention Image information transmission device 3. Relationship with the case of the person making the amendment Patent Applicant Address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name (601) Mitsubishi Electric Corporation Representative Moriya Shiki 4-4-10 Nishi-Shinbashi, Minato-ku, Tokyo 6. 7. Details of the correction Figure 1 will be corrected as shown in the attached sheet. Document hall showing Figure 1 after the revised list of attached documents ↑

Claims (1)

[Claims] an analog-to-digital converter that converts input image information from an analog signal to a digital signal; a plurality of digital signal processors that encode data in the associated areas in data converted into digital signals according to a predetermined algorithm; and a plurality of digital signal processors provided corresponding to each of the digital signal processors, Between a local memory in which a portion of data processed one frame ago by the associated digital signal processor and used only by the digital signal processor in processing the next frame is stored, and the adjacent digital signal processor. arranged and said 1
Image information transmission comprising an overlap memory in which a portion of data processed before a frame that may be used by both the digital signal processor and the adjacent digital signal processor in processing the next frame is stored. Device.