JPH03164084A - Rotation controller for motor - Google Patents

Abstract

PURPOSE:To perform phase control of rotation of a motor with high resolution by comparing the count of a first counting means with the count of a second counting means and producing a phase control signal corresponding to the difference, if any. CONSTITUTION:Pulses produced from a frequency generator 20 and a reference signal generating circuit 24 are counted through first and second counting means 31, 32 while being reset by pulses generated from a phase generator 21 and a reference signal generating circuit 24 respectively. Count of the second counting means 32 is latched in a latching means 33 and compared, through a comparing means 34, with the count of the first counting means 31 every time when the count of the first counting means 31 makes an increment, and a phase control signal corresponding to the difference, if any, is generated. By such arrangement, phase control of rotation of a motor 18 can be carried out with high resolution corresponding to the number of pulses generated per single rotation of the motor 18.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a motor rotation speed control device.

[Conventional technology]

Conventionally, a motor rotation speed control device in a video tape recorder etc. includes a frequency generator for detecting the rotation speed,
A phase generator for detecting the phase of rotation is provided, and a frequency error and a phase error with respect to a reference frequency and a reference phase according to a set rotation speed are determined to perform feedback control.

Hereinafter, referring to FIG. 3, the motor 1 has a frequency generator (hereinafter referred to as
A phase generator (hereinafter referred to as PG) 3 that generates one pulse per rotation is provided.

Further, this rotation speed control device includes a reference frequency generator (hereinafter referred to as reference FC) 4 that generates a reference frequency and a reference phase generator (hereinafter referred to as reference PC) 5 that generates a reference phase. It is provided. Now, assuming that motor 1 is controlled to rotate at a constant speed of 3600 rpm, the reference FG
4 is 1440Hz, reference PG5 is 60H
Pulse at z.

In the speed system loop, the frequency discriminator 6 selects F
The frequency corresponding to the actual rotation speed of the motor 1 supplied from G2 via the FG amplifier 7 and the reference FG4
The speed deviation signal obtained is compared with the frequency corresponding to the reference rotation speed supplied from the frequency discriminator 6 and is sent to the adder 8 from the frequency discriminator 6.

On the other hand, in the phase system loop, the phase comparator 9 compares the signal corresponding to the actual rotational phase of the motor 1 supplied from the PC 3 via the PC amplifier 10 with the reference phase supplied from the reference PG 5. The obtained phase deviation signal is sent from the phase comparator 9 to the adder 8.

Adder 8 adds the speed deviation signal and phase deviation signal, and the output signal is sent via compensation circuit 11 to motor driver 12 that drives motor 1, causing motor 1 to rotate at a set rotation speed. controlled to do so.

[Problem to be solved by the invention]

However, according to the above-mentioned rotational speed control method, the phase deviation can only be obtained once per 1 rotation of the motor 1, so the resolution is low and highly accurate phase control becomes difficult.

[Means to solve the problem]

In order to solve the above-mentioned problems, the motor rotation control device according to the present invention includes a frequency generator that generates a predetermined number of pulses, for example, 24 pulses per rotation of the motor, in order to detect the number of rotations of the motor. , a phase generator that generates a smaller number of pulses than the above-mentioned frequency generator, for example, one pulse per rotation of the motor, in order to detect the phase of rotation of the motor, and a reference frequency that generates pulses to provide a reference rotation speed. In a motor rotation speed control device equipped with a generator and a reference phase generator that generates pulses for providing a reference phase, the pulses generated by the reference frequency generator are replaced by the pulses generated by the reference phase generator. A first counting means, for example, a first n-bit counter, counts while resetting, and a second counting means, for example, counts while resetting the pulses generated by the frequency generator with the pulses generated by the phase generator. A second n-bit counter, a latch means for latching the value counted by the second counting means, for example, an n bino latch circuit, and a value counted by the first counting means and a value latched by the launch means. A comparison means for comparing, and a phase control means for generating a phase control signal corresponding to the magnitude relationship when the values of the first counting means and the latch means compared by the comparison means are different, for example, the value of the first counting means. is large, and therefore the phase of the motor is behind, the phase control means generates a high-level DC voltage, while when the value of the latch means is larger, and therefore the motor phase is ahead, the phase control means generates a low-level DC voltage. It is characterized by having the following.

(Function) According to the above structure, the pulses generated by the frequency generator and the pulses generated by the reference frequency generator are respectively the pulses generated by the phase generator and the pulses generated by the reference phase generator. The first and second counting means count while resetting with a pulse, and the value of the second counting means is launched by the latch means, and each time the value of the first counting means increases, the value of the first counting means is increased. The comparison means compares the value and the value of the second counting means latched by the latch means, and when there is a difference between these values, a phase control signal is generated according to the magnitude relationship, so that the motor The phase of rotation can be controlled with a high resolution corresponding to the number of pulses generated per rotation of the motor by the frequency generator.

〔Example〕

An embodiment of the present invention will be described below based on FIGS. 1 and 2.

As shown in FIG. 2, the rotation speed control device of this embodiment includes a frequency generator (hereinafter referred to as FC) 20 and a phase generator (hereinafter referred to as PC) 21 provided in the motor 18. We are prepared. FC2 0 generates 24 pulses per revolution of motor 18, and PG2 1 generates 1 pulse per revolution of motor 18.
It is designed to generate one pulse per revolution.

However, the number of pulses generated in the FG20 and PC21 can be changed as appropriate. Note that the pulses generated by FG20 and PG21 are amplified by FC amplifier 22 and PC amplifier 23, respectively.

Further, this rotation speed control device has a reference signal generation circuit 24,
Although not specifically shown, the reference signal generation circuit 24 includes a reference frequency generator (hereinafter referred to as reference FC) and a reference phase generator (hereinafter referred to as reference PC).
). Now motor 18 is 360O
When controlling to rotate at a constant speed at r p m, if the number of pulses generated by FC20 is 24 and the number of pulses generated by PC21 is 1 per rotation of motor l8, the reference FG is 1440Hz, the reference PC is 60
Pulses are generated at Hz.

The speed control system in this rotation speed control device is the frequency discriminator 2.
5 and a D/A (digital/analog) converter 26. Then, the pulses supplied from the FG20 via the FG amplifier 22 and the pulses supplied from the reference FC of the reference signal generation circuit 24 are compared by the frequency discriminator 25, and the speed deviation signal obtained here is The A converter 26 converts it into an analog value and sends it to the adder 30.

On the other hand, the phase control system includes an n-bit counter 3l as a first counting means, an n-bit counter 32 as a second counting means, an n-bit latch circuit 33 as a latch means, a comparator 34 as a comparison means, and a phase/ It includes a voltage converter 35 and an analog switch 36 that serves as a phase control means. The n-bint counter 31 counts the pulses representing the reference frequency (see FIG. 1 (g)) generated by the reference FC in the reference signal generation circuit 24, and also counts the pulses generated by the reference PC in the reference signal generation circuit 24. The reset pulse is reset each time a reset pulse (see FIG. 10F) is generated in synchronization with the rising edge of the pulse (see FIG. 10E).

Also, the nbisoto counter 32 is generated by the FC20, and the
Pulses supplied via the C amplifier 23 (Fig. 1(c)
), and is reset every time a reset pulse (see (b) in the same figure), which is generated in synchronization with the rising edge of the pulse generated by PG21 (see (a) in the same figure), is input. It has become.

The first shift of the n-bint counter 32 is launched by the n-bit latch circuit 33 at the timing when the reference FC pulse is generated. Further, in the comparator 34, the value of the n-bit counter 31 and the value launched by the n-bit counter 32 are compared every cycle of the reference FG, and a signal corresponding to the magnitude relationship is sent to the analog switch 36.
is being supplied to. Specifically, if the value of the n-bit latch circuit 33 is greater than the value of the n-bit counter 31, and therefore the phase of rotation of the motor 18 is ahead of the phase indicated by the reference FC, the advance signal 3
7 is supplied, and the value of the n-bit latch circuit 33 is smaller than the value of the n-bint counter 31, and therefore the phase of rotation of the motor l8 lags behind the phase indicated by the reference FC, a delay signal of 3 days is supplied. , the value of the n-bit latch circuit 33 is equal to the value of the n-bit counter 31, and if the rotational phase of the motor l8 and the phase indicated by the reference FC are in phase within the l divided slot of FC20, the in-phase signal 39 is It is now being supplied.

A first input terminal of the analog switch 36 is connected via a variable resistor 41 to a low-level DC power source (not shown) for delaying the rotation phase of the motor 18.

The second input terminal of the analog switch 36 is connected via a variable resistor 42 to a high-speed DC power source (not shown) for advancing the phase of rotation of the motor 18. Furthermore, the third input terminal of analog switch 36 is connected to phase/voltage converter 35 .

The phase/voltage converter 35 includes a phase comparator 43 and a D/A converter 44. The comparison result is converted into an analog value by the D/A converter 44 and supplied to the third input terminal of the analog switch 36.

When the advance signal 37 is supplied from the comparator 34, the voltage of the low level DC power supply is outputted as a phase control signal from the analog switch 36 to the adder 30 via the variable resistor 4l, and from the comparator 34. When the delay signal 38 is supplied, the voltage of the high level DC power supply is supplied as a phase control signal from the analog switch 36 to the adder 30 via the variable resistor 42, and the in-phase signal 39 is supplied from the comparator 34. When supplied, the phase deviation voltage supplied from the D/A converter 44 is outputted from the analog switch 36 to the adder 30 as a phase control signal.

The adder 30 adds the phase control signal and the speed deviation signal supplied from the F/V converter 27, and the output signal of the adder 30 is sent to the motor driver 46 via the compensation circuit 45. The rotation of motor l8 is controlled by.

In the above configuration, the n-bit counter 32 is reset by the reset pulse (see FIG. 1(b)) generated in synchronization with the rise of the pulse of PG2l shown in FIG. As a reference, the n-bit counter 32 counts which pulse of the FC20 ((C) in the same figure) is currently generated during one rotation of the motor 18 ((D) in the same figure).
.

Similarly, a reset pulse (
The n-bit counter 3l is reset by (f>) in the same figure, and the n-bint counter 3l is set at which pulse of the reference FG ((g) in the same figure) is currently generated based on the rising edge of the pulse of the reference PC. The number of items that are present is counted ((h) in the same figure).

Then, each time the reference FC pulse rises, the value counted by the n-bit counter 32 is reset by the n-bit latch circuit 33, and in the comparator 34, the value of the n-bit counter 3l and the value of the n-bit latch circuit 33 are be compared.

Here, if the value of the n-bit latch circuit 33 is larger than the value of the n-bit counter 3l and the rotation phase of the motor 18 is ahead of the phase indicated by the reference FG, the comparator 34 sends a signal 37 to the analog switch 36. Based on this, the analog switch 36 supplies the adder 30 with the aforementioned low-level DC power voltage, that is, the phase control signal for delaying the phase of the motor 18 via the variable resistor 4l.

On the other hand, if the value of the n-bit latch circuit 33 is smaller than the value of the n-bit counter 31 and the rotation phase of the motor 18 lags behind the phase indicated by the reference FC, a delay signal 3 is sent from the comparator 34 to the analog switch 36. Based on this, the analog switch 36 supplies the adder 30 with the above-mentioned high-level DC power voltage, that is, a phase control signal for advancing the phase of the motor l8, via the variable resistor 42. Ru.

Also, the value of the n-bit latch circuit 33 and the n-bit counter 3
If the values of l are equal and the phase of the rotation of the motor l8 and the phase indicated by the reference FC are in phase within one divided slot of the FG20, an in-phase signal 39 is supplied, in which case the analog switch 36 sends the signal to the adder 30. The voltage of the phase/voltage converter 35 is supplied to . It should be noted that the phase comparator 43 in the phase/voltage converter 35 detects the FC. A phase deviation pressure is generated according to the phase lead or lag of the pulses of the reference FC and the reference FC.

As described above, according to this embodiment, the number of pulses generated by the FG20 and the reference FG is counted by the n-bit counters 32 and 3l, respectively, and by comparing the two, the phase delay of the rotation of the motor 18 is determined. Since the advance is determined, the phase control of the rotation of the motor 18 can be performed with higher precision. Thereby, for example, the rotation speed of the motor 18 in a VTR or the like can be controlled more accurately.

In addition, in order to arbitrarily set the phase relationship between PC21 and the reference PC, a reset pulse (see Fig. 1 (f)) corresponding to the rising edge of the pulse of the reference PC is required.
It is only necessary to generate the signal from the reference PC via a phase shift circuit.

In addition, in the comparator 34, a latch signal for determining whether the rotation phase of the motor 18 is delayed or advanced is launched based on the pulses generated by the reference PC except when the phase is in phase.
If the phase becomes the same, latching may be performed based on a pulse generated by the reference FC.

〔Effect of the invention〕

As described above, the motor rotation speed control device according to the present invention includes: a first counting means that counts pulses generated by the reference frequency generator while resetting them with pulses generated by the reference phase generator; a second counting means for counting while resetting the pulses generated by the generator with pulses generated by the phase generator; a launch means for counting the value counted by the second counting means; and a first counting means. a comparison means for comparing the value counted by the means and the value latched by the latch means; The structure is equipped with a phase control means for generating.

In this way, the pulses generated by the frequency generator and the pulses generated by the reference frequency generator are reset by the pulses generated by the phase generator and the pulses generated by the reference phase generator, respectively. and counting by the second counting means, and launching the value of the second counting means by the lunching means, and every time the value of the first counting means increases, the first counting means is counted.
The comparison means compares the value of the second counting means and the value of the second counting means latched by the latch means, and when there is a difference between these values, a phase control signal corresponding to the magnitude relationship is generated. Therefore, phase control of the rotation of the motor can be performed with high resolution corresponding to the number of pulses generated per one rotation of the motor by the frequency generator.

[Brief explanation of the drawing]

1 and 2 show one embodiment of the present invention. FIG. 1 is a time chart showing the operation timing of each part of the rotation speed control device. FIG. 2 is a block diagram showing the structure of the rotation speed control device. FIG. 3 is a bronch diagram showing the configuration of a conventional rotation speed control device. 18 is a motor, 20 is a frequency generator, 21 is a phase generator, 3l is an n-bit counter (first counting means), 32 is an n-bit counter (second counting means), 33 is an n-bit launch circuit (latch). means) 34 is a comparator (comparison means);
36 is an analog switch (phase control means).

Claims (1)

[Claims] 1. A frequency generator that generates a predetermined number of pulses per rotation of the motor in order to detect the rotation speed of the motor, and a frequency generator that generates a predetermined number of pulses per rotation of the motor to detect the phase of rotation of the motor. Equipped with a phase generator that generates a smaller number of pulses than the frequency generator, a reference frequency generator that generates pulses for providing a reference rotation speed, and a reference phase generator that generates pulses for providing a reference phase. In the motor rotation speed control device, the first counting means counts the pulses generated by the reference frequency generator while resetting them with the pulses generated by the reference phase generator; a second counting means that counts while being reset by a pulse generated by the phase generator; a latch means that latches the value counted by the second counting means; and a latch means that latches the value counted by the first counting means. Comparing means for comparing the values latched by the means, and phase control means for generating a phase control signal according to the magnitude relationship when the values of the first counting means and the latching means compared by the comparing means differ. A motor rotation speed control device characterized by: