JPH0316176A - Electrode structure of iii-v compound semiconductor element and formation thereof - Google Patents

Abstract

PURPOSE:To obtain an electrode structure having a low ohmic-contact resistance by forming the following one after another: a specific Au alloy layer formed on a p-type III-V compound semiconductor; a stopper layer composed of Ti or Cr; and an Au layer. CONSTITUTION:An Au alloy layer 2 containing one out of Zn, Cd, Mg and Be is formed on a p-type III-V compound semiconductor 1; a stopper layer 3 is formed on the Au alloy layer 2; the stopper layer 3 is composed of Ti or Cr. An Au layer 4 is formed on the stopper layer 3. For example, GaAs, GaP or the like is used as the III-V compound semiconductor. Consequently, a part near the semiconductor is doped with Zn, Cd, Mg or Be by the Au alloy layer; a high-concentration p-type conductive layer is formed. Thereby, a low ohmic-contact resistance is guaranteed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrode structure formed on a p-type III-V compound semiconductor and a method for forming the same.

[Conventional technology]

When forming an electrode structure formed on a p-type III-V compound semiconductor, Au-Zn-based materials have conventionally been used as electrode materials because they provide low contact resistance and are non-toxic. In this case, if ■Au Zn alloy is used as the vapor deposition material, ■Aυ and Zn alone may be vapor-deposited, respectively.

When using an AuZn alloy, since the vapor pressures of Au and Zn are different, it is difficult to control the structure of the metal film deposited on the semiconductor, resulting in insufficient adhesion to the semiconductor.

Therefore, a sandwich structure of Au/Zn/Au is generally formed (FIG. 10(a)) to improve the adhesion with the semiconductor.

By the way, in order to electrically connect a semiconductor element to the outside by wire bonding, a wire bond pad is required.

In this case, it is desirable to integrate wire bond pads onto the electrode structure to reduce stray capacitance of the device. Therefore, as a wire bond pad, the thickness of 0.5 μm or more and 2 μm
There is an electrode structure (FIG. 10(b)) having the following thick Au-Zn alloy layer (Japanese Patent Laid-Open No. 54-69979).

Furthermore, in order to alleviate the deterioration caused by irregular alloy reactions that occur during high-temperature operation of semiconductor devices using Au as the electrode base material,
There is an electrode structure (FIG. 10C) in which at least one layer each of Ti and PT is alternately laminated on Au Zu, and Au is further laminated thereon (Japanese Patent Laid-Open No. 155562/1982).

[Problem to be solved by the invention]

However, according to the conventional techniques shown in FIGS. 10(a) and 10(b), the stray capacitance of the device can be reduced, but the Au/Zn/Au layer or the Au
When a thick film of Au for wire bonding is laminated on a Zn alloy layer, an alloy reaction occurs between the semiconductor and the thick PIA Au, resulting in a problem that the characteristics of the device and the strength of the wire bond deteriorate.

Incidentally, the thickness of the Au layer provided directly above the semiconductor affects the contact resistance. Taking this into consideration, the thickness of the Au layer was made as thin as possible (eg, 10 to 60 nm).

On the other hand, the thickness of the Au layer stacked on the zn layer and the Au
It was thought that the thickness of the Zn alloy layer did not affect the contact resistance.

However, experiments have revealed that the resistance of the electrode changes depending on the thickness of the Au layer laminated on the Zn layer or the thickness of the Au-Zn alloy layer, which has not been considered a problem so far.

FIG. 11 shows experimental results showing the relationship between the thickness of the Au layer formed on Zn and the specific contact resistance in an electrode with a three-layer structure of Au/Zn/Au.

According to this experiment, it can be seen that the resistance increases as the thickness of the Au layer becomes thinner.

Moreover, according to the prior art related to FIG. 10(c), Au
Zn can ensure low ohmic contact resistance and prevent deterioration of device characteristics due to alloy reaction between the Au film for the bonding pad and the semiconductor, but since PT is difficult to partially etch, the shape or method is difficult. However, since Pt itself is an effective material, manufacturing costs are high.

Therefore, an object of the present invention is to provide an electrode structure having low ohmic contact resistance.

Another object of the present invention is to provide a method in which an electrode structure can be easily formed without deteriorating a semiconductor element.

[Means to solve the problem]

In order to solve the above drawbacks, the electrode structure according to the present invention has Z
An Au alloy layer formed on a p-type ■-v group compound semiconductor containing one of nSCdSMgSBe, and Ti or C
It is characterized by comprising a stopper layer formed on an Au alloy layer formed from r and an Au layer formed on the stopper layer.

In addition, the method for forming the electrode structure according to the present invention includes P-type ■-v
On the group compound semiconductor, an Au layer, Zn, C d , M g
A layer selected from the group s B e and an Au layer are formed in order to form a three-layer multilayer film, and on this three-layer multilayer film, Ti
Alternatively, the stopper layer made of Cr and the Au layer are sequentially formed and then alloyed.

[Effect]

Since this invention is structured as described above, Au
By the Au alloy layer formed on the semiconductor such as Zn SAu Cd s Au Mg, Au Be, etc.
Doping d, Mg, and Be near the semiconductor to create a high concentration p
A mold conductive layer is formed. Therefore, low ohmic contact resistance is guaranteed.

Also, since a stopper layer made of Ti or Cr is formed between the Au layer for the bonding pad and the semiconductor,
Alloy reaction between the thick film Au and the semiconductor is prevented. For that reason,
Semiconductor elements do not deteriorate.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS An electrode structure and its shape and method according to an embodiment of the present invention will be described below with reference to the accompanying drawings. In the description, the same elements are denoted by the same reference numerals, and redundant description will be omitted.

FIG. 1 is a longitudinal sectional view showing an example of an electrode structure according to the present invention. On the p-type III-V compound semiconductor 1, ZH,
An Au alloy layer 2 containing one of Cd, Mg, and Be is formed. A stopper layer 3 is formed on the Au alloy layer 2, and the stopper layer 3 is made of Ti or Cr. An Au layer 4 is formed on the stopper layer 3.

In the present invention, examples of the P-type III-V compound semiconductor used include GaAs s Ga P. Ga
As P, In Sb S Ga Sb
There are S In P, In GaAs P, etc.

The Au alloy layer 2 containing one of Zn, CdSMgs Be has a thickness of, for example, within a range of 50 to 500 nm,
The range is not necessarily determined because it should be determined depending on required characteristics such as contact resistance and adhesion with the semiconductor.

The thickness of the stopper layer 3 is, for example, in a range of 50 ns to 500 ns. This range is such that an alloy reaction between the thick Au layer 4 for wire bonding and the semiconductor 1 can be sufficiently prevented, and
Since it is determined in consideration of the workability of the electrode pattern, it is not necessarily determined within this range. That is, the function of the stopper layer to prevent alloy reactions, for example, is not necessarily uniform depending on Ti and Cr.

The thickness of the Au layer 4 is, for example, 0.1 to 1 μm.

Since the present invention is structured as described above, the ZnSCdSMg
, Be doped near the semiconductor surface to form a heavily doped p-type conductive region.

Therefore, low ohmic contact resistance is guaranteed.

Further, a stopper layer made of Ti or Cr formed between the thick Au film for the bonding pad and the semiconductor prevents an alloy reaction between the thick Au film and the semiconductor. Therefore, the semiconductor element does not deteriorate.

Furthermore, in the present invention, since Ti or Cr is used as the stopper layer 3, it can be easily etched with buffered hydrofluoric acid, for example. can be used. Therefore, the degree of freedom in design in the electrode formation process is improved, and manufacturing becomes easier.

On the other hand, since the Pt used in the prior art shown in FIG. 10(c) is difficult to etch, the pattern shape or method used when Pt is laminated is limited to the lift-off method.

Next, a method for forming the above electrode will be explained based on FIGS. 2 and 3. FIG. 2 is a process diagram showing a method of forming an electrode, and FIG. 3 is a longitudinal sectional view showing the electrode structure before alloying (heating). In step 101, an Au layer 2a is formed on the ■-V group compound semiconductor 1 to a thickness of, for example, 60 rv by a resistance heating vapor deposition method. In step 102, A
A Zn layer 2b is formed on the u layer 2a to a thickness of, for example, 20 nI1 by a resistance heating vapor deposition method. In step 103, an Au layer 2C is formed on the Zn layer 2b by resistance heating vapor deposition to a thickness of, for example, 90 nI1. Au layer 2asZ
An Au alloy layer 2 is formed by the n layer 2b and the Au layer 2c. In step 104, a Ti layer 3 is placed on the Au layer 2C.
is formed to a thickness of, for example, 100 ns by electron beam heating evaporation. In step 105, an Au layer 4 is deposited on the Ti layer 3 by a resistance heating vapor deposition method, for example, 400
It has a shape with a thickness of nm.

Step 106 heats to an alloying temperature of approximately 450° C. to form an electrode.

The thickness of each of the Au layer 2 as the Zn layer 2b and the Au layer 2C, which are formed in advance in a certain step of the Au Zn layer 2 in the above electrode forming method, is, for example, within the range described below.

The thickness range of the Au layer 2a is, for example, 7nI1 to 120n
The range of m must be determined depending on required characteristics such as contact resistance and adhesion with a semiconductor, and therefore is not necessarily fixed.

However, the thinner the film thickness (for example, less than IOno), the
Contact resistance tends to increase, and adhesion with semiconductors tends to decrease. Further, as the film thickness increases (eg, more than 100 nm), the concentration of diffusion of Zu into the semiconductor tends to decrease, and as a result, the contact resistance tends to increase. Therefore, a particularly preferable range of film thickness is 10r
The range is ++g or more and 100rv or less.

The thickness of the Zn layer 2b is, for example, within the range of 7nal to 60nI1, and the range should be determined by the contact resistance and the adhesion between the adjacent Au layers 2a s 2c, similar to the Au layer 2a. It is not necessarily determined from

However, the thinner the film thickness (for example, less than 10 nm), the higher the contact resistance tends to be. Furthermore, the thicker the film, the lower the adhesion between the Au layers 2a and 2c. Therefore, the particularly preferable thickness of the Zn layer 2b is 10
n1! or more and less than 50 nm.

Furthermore, the thickness range of the Au layer 2C is, for example, 40 nm to 3
It should be determined depending on the contact resistance required at 50 nIll and the reliability of the semiconductor element, so it is not fixed within this range.

However, the thinner the Au layer 2C is (for example, 50
(less than 30 nm), the contact resistance tends to increase, and as the thickness increases (for example, 300 nII or more), the reliability of the semiconductor element tends to decrease. Therefore, the particularly preferable thickness of the Au layer 2C is in the range of 50rv or more and 300I or less.

Note that the above-mentioned layers exhibit particularly effects on contact resistance, adhesion with adjacent layers, etc. when the respective thicknesses simultaneously satisfy the above-mentioned ranges.

FIG. 4 is a longitudinal sectional view showing an example of the electrode structure according to the first embodiment. ■-A GaAs semiconductor 5 is used as the V group compound semiconductor, and a layer with a thickness of 60 mm is formed on the Ga As semiconductor 5.
rv Au layer, 20no+ thickness zn layer and 90n thickness
m Au layers were formed one after another by a resistance heating evaporation method. The conditions for the resistance heating evaporation method used at this time were that the heating temperature of the boat was approximately 1000°C during the formation of the Au layer;
When forming the ZN layer, the temperature was 100 to 400°C, and the degree of vacuum was about 1 x 10-6 Torr. After forming the Au layer on the Zn layer, next, a 100 nm thick T layer is placed on top of the Au layer.
The i-layer 7 was formed by electron beam heating vapor deposition. The deposition conditions at this time were that the electron beam acceleration voltage was 10 kV and the degree of vacuum was approximately I.
X 10-6 Torr. After that, Ti layer 7
An Au layer 8 having a thickness of 400 ni was formed thereon again by the resistance heating vapor deposition method. The laminate obtained as above,
Etching was performed using an iodine solution and buffered hydrofluoric acid to form an electrode pattern. After this, alloying temperature 450
Alloyed at ℃ for 4 minutes to form an AuZn layer 6 and a Ti layer on the semiconductor surface.
An electrode was formed from layer 7 and Au layer 8. The contact resistance was measured and found to be 3×10''-'ΩcIrl2. Even when this electrode structure was heated at 200° C. for 168 hours, no diffusion of Au into the semiconductor was observed.

FIG. 5 is a longitudinal sectional view showing an example of the electrode structure according to the second embodiment. In place of the Ti layer 7 in Example 1, a 90 nm thick Cr layer 10 was formed by electron beam heating evaporation. The deposition conditions at that time were an acceleration voltage of 10 kV and a vacuum degree of I x 1.
It is 0-6 Torr. The method and conditions for forming other layers are the same as in Example 1. The electrode pattern was formed by a lift-off method.

After each layer is formed, heating is performed at 450° C. for 4 minutes under alloying conditions to form an Au Zn layer 9, a Cr layer 10 and an A layer on the semiconductor surface.
A laminate in which the U layers 11 were sequentially laminated was obtained. The contact resistance was about 10 Ωcm, and no deterioration (under the same conditions as in Example 1) was observed.

FIG. 6 is a longitudinal sectional view showing an example of the electrode structure according to the third embodiment. As a ■-■ group compound semiconductor, InP semiconductor 12
was used, and on top of that, a 15nffi thick Au layer and a 20nf Au layer.
A Zn layer with a thickness of m and an Au layer with a thickness of 60 rv were sequentially formed by a resistance heating evaporation method. The stopper layer used at this time,
The Au layer and deposition conditions are the same as in Example 1.

FIG. 7 is a longitudinal sectional view showing an example of the electrode structure according to the fourth embodiment. A Zn-doped InP semiconductor 14 is used as a p-type III-V group semiconductor, and an Au layer, a Zn layer, an Au layer, a Ti layer 15, and an Au layer 16 are sequentially stacked on the semiconductor in the same manner as in Example 1. I got something. The electrode pattern was shaped by the lift-off method. After that, alloying conditions (temperature 4
The Au layer, Zn layer, and Au layer were alloyed at 50° C. for 4 minutes to form an Au Zn alloy layer 17. Contact resistance is 3×1
The resistance was 0-4Ω(1)2, satisfying all required characteristics. Furthermore, electrode patterns were similarly formed using Mg and Be instead of the Zn layer, but all of the characteristics were of no practical problem.

Next, a fifth example will be described in which the electrode structure according to the present invention is applied to a light receiving element. FIG. 8 is a longitudinal sectional view showing a light receiving element including an electrode structure according to a fifth embodiment. The semiconductor element on which this electrode is formed consists of a semiconductor substrate 20 of n-type 1nP, a buffer layer 21 of n-type 1nP, and an n-type 1nP semiconductor substrate 20.
A light-receiving layer 22 made of type 1 InGaAs, n type 1nP
It is formed by laminating a certain window layer 23 from the above.

A p-type conductive region 27 is formed in a predetermined region within this layer by diffusion of Zn. On this p-type conductive region 27,
A pair of p-side electrodes 24 and 24 according to the present invention are formed, and an n-side electrode 28 is formed on the back surface of the semiconductor substrate 20. An antireflection film 25 is formed on the inside of these p-side electrodes 24.24, and a passivation 11126.26 is formed on the outside of the p-side electrodes 24.24.

Note that the p-side electrode 24 is made of Au/Zn/Au/Ti
/Au, and alloyed by the above-mentioned forming method (see Fig. 4). The specific contact resistance of this electrode structure was approximately 3×10 Ωcm 2 , and a low ohmic contact resistance comparable to that of the conventional AuZn-based electrode structure was obtained. In this case, the wire bond strength using a 20 μm diameter Au wire was 4 g.

FIG. 9 shows the results of a depthwise compositional analysis of the electrode by μ-AES. It can be seen that by increasing the thickness of one Ti layer, alloy reaction between the Auji film for the bonding pad and the compound semiconductor 1nP is prevented.

Since this invention is configured as explained above,
It is possible to provide an electrode structure that has low ohmic contact resistance and does not cause deterioration of semiconductor elements.

Specifically, Au and Zn (or Cd, Mg
, Be) to ensure low ohmic contact between the semiconductor and the electrode, and by inserting a Ti (or Cr) layer on the alloy layer, the film thickness for wire bonding can be changed to Au and Alloy reactions with semiconductors can be prevented. Therefore, in the light receiving element (see FIG. 8) using the electrode structure according to the present invention, a good electrode with a specific contact resistance of about 3×10 Ωcm 2 is obtained. Further, in a high temperature current test at 200° C. and 15V bias, the alloy reaction between the electrode material and the semiconductor did not proceed, and no deterioration of the device occurred even after 2000 hours of current application.

Further, since good electrode characteristics can be obtained without using PT which is difficult and expensive to engrave, the degree of freedom in designing the manufacturing process is improved and manufacturing costs can be kept low.

Note that this invention is not limited to the above embodiments. For example, although InP is used as the m-v group compound semiconductor, Ga PSGa As P, Ga As, etc. may also be used.

〔Effect of the invention〕

Since this invention is structured as explained above,
(2) The contact resistance of the electrode structure of the V group compound semiconductor device can be lowered.

Further, the electrode structure of the ■-v group compound semiconductor device can be easily formed without deterioration of the semiconductor device.

[Brief explanation of drawings]

FIG. 1 is a longitudinal sectional view taken from the lamination direction showing an example of the electrode structure according to the present invention, FIG. 2 is a process diagram showing the shape and method of the electrode according to an embodiment of the present invention, and FIG. FIG. 4 is a vertical cross-sectional view showing the structure before the heating step (step 106) shown in FIG. FIG. 6 is a vertical cross-sectional view cut from the stacking direction showing the electrode structure according to the second embodiment of the invention.
The figure is a longitudinal sectional view taken from the lamination direction showing an electrode structure according to a third embodiment of the present invention, and FIG. 7 is a longitudinal sectional view taken from the lamination direction showing an electrode structure according to a fourth embodiment of the invention. FIG. 8 is a longitudinal sectional view showing a light receiving element including an electrode structure according to a fifth embodiment of the present invention, and FIG. 9 is a μ-A of the electrode shown in FIG.
Graph showing the analysis results of the depth direction by ES, 1st
Figure 0 is a vertical cross-sectional view showing the electrode structure according to the prior art;
The figure is a graph showing the relationship between the thickness of the Au layer and specific contact resistance. DESCRIPTION OF SYMBOLS 1...p-type ■-v group compound semiconductor, 2...Au alloy layer, 3...stopper layer, 4, 8, 11, 16...Au
layer, 5-GaAs semiconductor, 6, 9, 13, 1 7 -.
・Au Zn layer, 7, 1 5 ・Ti layer, 1 0 −
Cr layer, 12, 14... InP semiconductor, 20...
- Semiconductor substrate, 21... Buffer layer, 22... Light-receiving layer, 23... Window layer, 24... P-type electrode, 2
5... Antireflection film, 26... Bassivation film,
27...p type conductive region, 28... n type electrode.

Claims (1)

[Claims] Contains one of 1, Zn, Cd, Mg, Be, p-type I
An Au alloy layer formed on a II-V group compound semiconductor, a stopper layer made of Ti or Cr and formed on the Au alloy layer, and an Au layer formed on the stopper layer. A III-V compound semiconductor device electrode structure characterized in that: 2. Au layer Zu, C on p-type III-V compound semiconductor
A layer selected from the group consisting of d, Mg, and Be and an Au layer are sequentially formed to form a three-layer multilayer film, and T is formed on the three-layer multilayer film.
A method for forming an electrode structure of a III-V compound semiconductor device, in which a stopper layer and an Au layer made of i or Cr are sequentially formed, and then alloyed.