JPH03159125A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH03159125A
JPH03159125A JP29732289A JP29732289A JPH03159125A JP H03159125 A JPH03159125 A JP H03159125A JP 29732289 A JP29732289 A JP 29732289A JP 29732289 A JP29732289 A JP 29732289A JP H03159125 A JPH03159125 A JP H03159125A
Authority
JP
Japan
Prior art keywords
insulating film
wiring layer
semiconductor device
insulation film
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29732289A
Other languages
Japanese (ja)
Inventor
Manabu Tsukamoto
学 塚本
Akio Fukuda
福田 朗朗
Takamitsu Kanazawa
孝光 金澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Eastern Japan Semiconductor Inc
Original Assignee
Hitachi Ltd
Hitachi Tohbu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Tohbu Semiconductor Ltd filed Critical Hitachi Ltd
Priority to JP29732289A priority Critical patent/JPH03159125A/en
Publication of JPH03159125A publication Critical patent/JPH03159125A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent corrosion of a wiring and obtain a semiconductor device improved in moisture resistance by a method wherein a first and a second insulation films formed to cover a first and a second wiring layers respectively extend to the periphery of a semiconductor substrate while the second insulation film extends beyond the first insulation film. CONSTITUTION:In a semiconductor device composed of a semiconductor substrate 1 with impurities introduced to a desired position, a first wiring layer 3 formed on the substrate 1, a first insulation film 4 formed to cover the first wiring layer 3, a second wiring layer 5 formed on the first insulation film 4 and a second insulation film 6 formed on the second wiring layer 5, the first and second insulation films 4, 6 extend to the periphery of the semiconductor substrate 1 and the second insulation film 6 extends beyond the first insulation film 4. Thus even if the second insulation film peels off the semiconductor substrate at an end face of an semiconductor element, the first insulation film will not peel off thereby preventing moisture from entering. Therefore corrosion of the wiring layers can be prevented as well as a semiconductor device improved in moisture resistance can be obtained.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は半導体装置の製造に係わり、%にポリイミド樹
脂等を絶縁膜あるいは最終絶縁膜として使用する樹脂刺
止型の半導体装置に適用してM幼な技術に関するもので
ある。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to the manufacture of semiconductor devices, and is applied to resin-filled semiconductor devices that use polyimide resin or the like as an insulating film or a final insulating film. It is about young technology.

〔従来の技術〕[Conventional technology]

一般vcm脂封止型の半導体装置で配線をしようとする
もの特に配線層にALを使用し、配線層が2層以上のも
のにおいて、配線層の段差の減少させるため、あるいは
低コスト化を図るためにポリイミド樹脂等を層間絶縁膜
あるいは最終絶縁膜として使用するものがある。
For general VCM fat-sealed semiconductor devices that are intended for wiring, especially those that use AL for the wiring layer and have two or more wiring layers, this is used to reduce the level difference in the wiring layer or to reduce costs. For this reason, some devices use polyimide resin or the like as an interlayer insulating film or final insulating film.

このような半導体装置の構造としては半導体基板の所望
の位置に不純物を導入し、その上面にAL等の配線層を
形成し、層間絶縁膜を形成した後、さらにAL等の配線
を行ない、その上面を最終絶縁膜で覆うものであり、そ
の後ダイシング、ペレット付け、ボンディングを行なっ
た後、樹脂封止を行なうものである。
The structure of such a semiconductor device is to introduce impurities into a desired position of a semiconductor substrate, form a wiring layer such as AL on the upper surface, form an interlayer insulating film, and then perform wiring such as AL. The upper surface is covered with a final insulating film, after which dicing, pellet attachment, and bonding are performed, followed by resin sealing.

公知例としてポリイミド樹脂を絶縁膜として使用した半
導体装置を示したものとして特公昭57−22214号
がある。
A known example is Japanese Patent Publication No. 57-22214 which shows a semiconductor device using polyimide resin as an insulating film.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、上記した技術においては、層間絶縁膜と最終絶
縁膜との関係を考慮しておらず、半導体素子の端面にお
いて重なりあった状態で両絶縁膜が接している面を形成
しているのが一般的である。
However, the above technology does not take into account the relationship between the interlayer insulating film and the final insulating film, and the two insulating films overlap at the end face of the semiconductor element to form a contact surface. Common.

このため、面付は実装時に行なう半田付けや、赤外線リ
フロー等の熱ストレスを受けることにより、封止樹脂と
半導体素子との熱応力差が発生し、半導体素子端面にお
いて、半導体基板上に形成されている酸化膜等の絶縁膜
とポリイミド樹脂等で形成されている絶縁膜が剥離し、
その剥離部分から水分が侵入し、半導体基板表面に形成
されたAL等の配!faを腐食させるという問題があっ
た。また前記AL等の配線の腐食により、半導体装置の
耐湿性が低下するという問題があった。
Therefore, when surface mounting is subjected to heat stress such as soldering during mounting or infrared reflow, a difference in thermal stress occurs between the sealing resin and the semiconductor element, and the end face of the semiconductor element is formed on the semiconductor substrate. Insulating films such as oxide films and insulating films made of polyimide resin, etc., peel off.
Moisture enters through the peeled part, and AL etc. are formed on the surface of the semiconductor substrate! There was a problem that it corroded the fa. Further, there is a problem in that the moisture resistance of the semiconductor device is reduced due to corrosion of the wiring such as the AL.

本発明の目的は、上記配線の腐食を防止し、耐湿性が向
上する半導体装置を提供することにある。
An object of the present invention is to provide a semiconductor device that prevents corrosion of the wiring and improves moisture resistance.

〔課題を解決するための手段〕[Means to solve the problem]

本願において開示される発明のうち代表的なものの漿要
を説明すれば、次の通りである。
The main points of typical inventions disclosed in this application are as follows.

すなわち、第1の手段においては、半導体基板と前記基
板に形成された第1の配線層と、前記第1の配線層を覆
うように形成された層間絶縁膜たる第1の絶縁膜と、前
記第1のJ8縁膜上に形成された第2の配線と、前記第
2の配線層上に形成された最終絶縁膜たる第2の絶縁膜
を有する半導体装置において、前記第1および第2の絶
縁膜は半導体基板周囲にまで延在しかつ第2の絶縁膜が
第1の絶縁膜を越えて形成されてなる半導体装置である
That is, in the first means, a semiconductor substrate, a first wiring layer formed on the substrate, a first insulating film serving as an interlayer insulating film formed to cover the first wiring layer, and the In a semiconductor device having a second wiring formed on a first J8 edge film and a second insulating film which is a final insulating film formed on the second wiring layer, the first and second This is a semiconductor device in which the insulating film extends around the semiconductor substrate and a second insulating film is formed beyond the first insulating film.

第2の手段においては、半導体基板と、前記基板上に形
成された配線層と、前記基板の周囲に設けられた溝と、
前記基板の上面を覆う絶縁膜を有する半導体装置である
In the second means, a semiconductor substrate, a wiring layer formed on the substrate, a groove provided around the substrate,
The semiconductor device has an insulating film covering the upper surface of the substrate.

〔作用〕[Effect]

前記した第1の手段によれば、半導体素子の端面で第2
の絶縁膜と半導体基板の間が剥離しても、第1の絶縁膜
は剥離せず、水分の浸入を防止することができるのでA
L等で形成された配線層の腐食を防止でき、耐湿性の向
上した半導体装置を得ることができる。
According to the first means described above, the second
Even if the first insulating film and the semiconductor substrate peel off, the first insulating film will not peel off and moisture can be prevented from entering.
Corrosion of the wiring layer formed of L or the like can be prevented, and a semiconductor device with improved moisture resistance can be obtained.

また、第2の手段によれば、半導体素子の端面において
、隣が形成され前記溝に絶縁膜が充填され半導体基板と
絶縁膜の密着性を同上することがテキるため熱ストレス
による剥離は発生せず、水分の浸入を防止することがで
き、AL等の配線の腐食を防止することができ耐湿性の
向上し、た半導体装置を得ることができる。
According to the second method, on the end face of the semiconductor element, an insulating film is formed in the groove and the insulating film is filled in the groove to improve the adhesion between the semiconductor substrate and the insulating film, so that peeling due to thermal stress does not occur. It is possible to obtain a semiconductor device with improved moisture resistance, which can prevent the intrusion of moisture and prevent corrosion of wiring such as AL.

〔実施例1〕 第1図は本発明の第1の実施例である半導体装置の要部
断面図であり、第3図は第1図に示した半導体装置の製
造方法を示した要部断面図である。
[Embodiment 1] FIG. 1 is a sectional view of a main part of a semiconductor device according to a first embodiment of the present invention, and FIG. 3 is a sectional view of a main part showing a method for manufacturing the semiconductor device shown in FIG. It is a diagram.

第1図πおいて所望の位置に不純物等が導入され、拡散
層等(図示せず)が形成されたSr等からなる半導体基
板1の上面に酸化膜2が形成されている。前記酸化膜2
の上面にはALからなる第1の配線層3が形成されその
上面にはポリイミド樹脂からなる第1の絶縁膜4、さら
に前記絶縁膜4の上面KALからなる第2の配線層5お
よびその上面には同様にポリイミド樹脂等からなる第2
の絶縁膜6が前記絶縁膜4を越えて半導体基板1の上の
酸化膜2上に延在するように形成されている。また、そ
の周囲は封止樹脂7によって封止されている。
In FIG. 1 π, an oxide film 2 is formed on the upper surface of a semiconductor substrate 1 made of Sr or the like in which impurities or the like are introduced into desired positions and a diffusion layer or the like (not shown) is formed. The oxide film 2
A first wiring layer 3 made of AL is formed on the upper surface, a first insulating film 4 made of polyimide resin is formed on the upper surface thereof, and a second wiring layer 5 made of KAL is formed on the upper surface of the insulating film 4 and its upper surface. Similarly, there is a second layer made of polyimide resin, etc.
An insulating film 6 is formed to extend beyond the insulating film 4 and onto the oxide film 2 on the semiconductor substrate 1. Further, its surroundings are sealed with a sealing resin 7.

以下、第3図にもとすいて本発明の製造方法について説
明する。
The manufacturing method of the present invention will be explained below with reference to FIG.

(&)通常の方法にて所望の位置に不純物が導入され拡
散層等(図示せず)が形成されたsiからなる半導体基
板lの上面の酸化膜2上にALt−蒸着し、その後パタ
ーンニングし、編1層目の配線層3を形成する。(11
)前記第1層目の配線上にさらに第2の配線層を形成す
る念めに、第1層目のポリイミド樹脂から成る第1の絶
縁膜4を形成する。
(&) Alt is deposited on the oxide film 2 on the upper surface of the semiconductor substrate l made of Si on which impurities are introduced into desired positions and diffusion layers etc. (not shown) are formed by a normal method, and then patterned. Then, the first wiring layer 3 is formed. (11
) In order to further form a second wiring layer on the first wiring layer, a first insulating film 4 made of polyimide resin is formed as a first layer.

(0)この後、第1の配線と同様に前記第1の絶縁膜4
上にALを蒸着し、パターンニングを行ない、第2の配
線層5を形成する。(d)前記第2の配線を形成し念後
、上記絶縁膜4と同様にポリイミド樹脂等からなる最終
絶縁膜たる第2の絶縁膜6を上面に形成する。この絶縁
膜6F1半導体素子となる端面において前記絶VIi1
4と接触し、さらに−前記絶縁膜4を越え、半導体基板
1上の酸化膜の周囲Kまで延在するように形成する。こ
の後、ダイシングを行ない各ペレッ)K分離し、ベレッ
トボンディング、ワイヤボンディング、樹脂封止等の諸
工程を終え攬脂封止された半導体装置となる。
(0) After this, similarly to the first wiring, the first insulating film 4 is
A second wiring layer 5 is formed by depositing AL on top and performing patterning. (d) After forming the second wiring, a second insulating film 6, which is a final insulating film made of polyimide resin or the like, similar to the insulating film 4, is formed on the upper surface. At the end face of this insulating film 6F1 that will become a semiconductor element, the insulation film 6F1
4, and further extends beyond the insulating film 4 to the periphery K of the oxide film on the semiconductor substrate 1. Thereafter, dicing is performed to separate each pellet, and after completing various steps such as pellet bonding, wire bonding, and resin sealing, a resin-sealed semiconductor device is obtained.

以上本実施例によれば、配線間の絶縁膜および最終絶縁
膜の端面での位置を調整し、第2の絶縁膜を第1の絶縁
膜を毬えて延在させ、第1の絶縁膜の剥離を防止するこ
とで、耐湿性の向上した半導体装置を得ることができる
As described above, according to this embodiment, the positions of the insulating film between the wirings and the final insulating film on the end surfaces are adjusted, the second insulating film is extended to enclose the first insulating film, and the second insulating film is extended to enclose the first insulating film. By preventing peeling, a semiconductor device with improved moisture resistance can be obtained.

〔実施例2〕 第2図は本発明の半導体装置の第2の実施例を示し念要
部断面図であり、第4図はその製造方法を示した要部断
面図である。
[Embodiment 2] FIG. 2 is a cross-sectional view of important parts showing a second example of the semiconductor device of the present invention, and FIG. 4 is a cross-sectional view of important parts showing a manufacturing method thereof.

第2図において所望の位置に不純物等が導入され拡散層
等(図示せず)が形成された半導体基板8の周囲1t#
xoが形成されている。前記半導体基板8の上には酸化
膜9、その上面にはAL等からなる第1の配線層11.
さらにその上面にはポリイミド樹脂等からなる層間絶縁
膜たる第1の絶縁膜12が形成され、前記絶縁膜12上
にはALからなる第2の配線層13、そしてその上面に
はポリイミド樹脂等からなる最終絶縁膜たる第2の絶縁
膜14が前記半導体基板IK影形成れた溝10にまで到
達するように形成されており、周囲は封止樹脂14によ
り封止されている。
In FIG. 2, the periphery 1t# of the semiconductor substrate 8 in which impurities and the like are introduced into desired positions and diffusion layers and the like (not shown) are formed.
xo is formed. An oxide film 9 is formed on the semiconductor substrate 8, and a first wiring layer 11 made of AL or the like is formed on the upper surface of the oxide film 9.
Further, a first insulating film 12 which is an interlayer insulating film made of polyimide resin or the like is formed on the upper surface thereof, a second wiring layer 13 made of AL is formed on the insulating film 12, and a second wiring layer 13 made of AL or the like is formed on the upper surface thereof. A second insulating film 14, which is the final insulating film, is formed so as to reach the groove 10 formed in the semiconductor substrate IK, and its periphery is sealed with a sealing resin 14.

以下、第4図にもとすいて説明する。The explanation will be given below with reference to FIG.

(&)通常の方法にて不純物等が導入され拡散層等(図
示せず)が形成されたSLからなる半導体基板8上に形
成された酸化膜9にALを蒸着し、所望の形状にパター
ンニングし第1の配線層11を形成する。(b)前記第
1の配線層11を覆うためにポリイミド樹脂等からなる
第1の絶縁膜12を形成する。(0)前記第1の絶厳膜
12上に第2の配線層13をAL蒸着を行ない、パター
ンニングし第1の配線層11と同様に第2の配線層13
を形成する。(<1)次に、半導体ベレットとなるべき
半導体基板8の周囲に溝10をエツチングにより形成す
る。(・)この後筒2の配線層13上にポリイミド樹脂
からなる絶縁膜14を前記溝10Kまで延在するよう’
tc シs溝10の中に第2の絶縁膜14の樹脂が充填
するように形成する。この時、第1の絶縁膜12より第
2の絶縁膜14が越えて延在する距離θ、Fi30μm
程度とし、向10の深さθ。
(&) AL is deposited on an oxide film 9 formed on a semiconductor substrate 8 made of SL into which impurities and the like are introduced and a diffusion layer (not shown) has been formed using a normal method, and patterned into a desired shape. Then, the first wiring layer 11 is formed. (b) A first insulating film 12 made of polyimide resin or the like is formed to cover the first wiring layer 11. (0) A second wiring layer 13 is deposited on the first strict film 12 by AL vapor deposition, and patterned to form a second wiring layer 13 in the same manner as the first wiring layer 11.
form. (<1) Next, a groove 10 is formed around the semiconductor substrate 8, which is to become a semiconductor pellet, by etching. (・) Then, on the wiring layer 13 of the tube 2, an insulating film 14 made of polyimide resin is extended to the groove 10K.
The resin of the second insulating film 14 is formed so as to fill the tc and s grooves 10. At this time, the distance θ that the second insulating film 14 extends beyond the first insulating film 12 is Fi30 μm.
depth θ in direction 10.

および幅a、は20μm程度に形成すると効果的であっ
た。
It was effective to form the width a and the width a to be about 20 μm.

この後、ダイシングを行ない各ベレットに分割する。さ
らにペレット付け、ワイヤボンディング。
After this, dicing is performed to separate each pellet. Further pellet attachment and wire bonding.

樹脂封止等の諸工程を経て半導体装置を得る。A semiconductor device is obtained through various steps such as resin encapsulation.

本実施例によれば、半導体装置の周囲にfaを形成する
ことで最終絶縁膜と半導体基板の接着性を向上すること
ができるため、耐湿性の同上した半導体装置を得ること
ができる。
According to this embodiment, since the adhesiveness between the final insulating film and the semiconductor substrate can be improved by forming the fa around the semiconductor device, it is possible to obtain a semiconductor device with the same moisture resistance.

以上本発明を、本発明の背景となったポリイミド樹脂を
絶縁膜として使用する。AL二層配線の半導体装置につ
いて説明したが、本発明は前記実施例に限定されること
なく種々変更できることはいうまでもない。
As described above, in the present invention, the polyimide resin, which is the background of the present invention, is used as an insulating film. Although the semiconductor device with the AL two-layer wiring has been described, it goes without saying that the present invention is not limited to the above embodiments and can be modified in various ways.

例えば、AL配線は1層のものでも使用することができ
るし、絶縁膜としてポリイミド樹脂以外のものを使用す
るものにも適用できる。
For example, a single-layer AL wiring can be used, and it is also possible to use a material other than polyimide resin as an insulating film.

〔発明の効果〕〔Effect of the invention〕

本発明によりて開示される代表的なものによって得られ
るものの効果を簡単に説明すれば下記のとおりである。
A brief explanation of the effects obtained by the typical methods disclosed in the present invention is as follows.

すなわち、半導体装置の半導体基板上に形成する絶縁膜
および、半導体基板の構成を少し変えることにより、耐
湿性の向上した半導体装t’を得ることができる。
That is, by slightly changing the structure of the insulating film formed on the semiconductor substrate of the semiconductor device and the semiconductor substrate, a semiconductor device t' with improved moisture resistance can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例である半導体装置の要部
を示した断面図、 第2図は第1図に示した半導体装置の裏遣方装置の要部
を示した断面図、 誦隋 第4    図に示した本発明の第2の実施例である半
導体装置の製造方法を示[7た要部断面図である。 1.8・・・半導体基板、2.9・・・酸化膜、3.1
1・・・配線層(第1)、4.12・・・絶縁膜(第1
)、5.13・・・配線層(第2)、6.14・・・最
終絶縁膜(第2)、7,15・・・封止樹脂s 10・
・・溝第 図 (0) /6 第 4 図 (0) (b) 第 図
FIG. 1 is a cross-sectional view showing the main parts of a semiconductor device according to a first embodiment of the present invention, and FIG. 2 is a cross-sectional view showing the main parts of the backing device for the semiconductor device shown in FIG. FIG. 4 is a cross-sectional view of main parts showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention shown in FIG. 1.8...Semiconductor substrate, 2.9...Oxide film, 3.1
1... Wiring layer (first), 4.12... Insulating film (first
), 5.13... Wiring layer (second), 6.14... Final insulating film (second), 7, 15... Sealing resin s 10.
・・Groove diagram (0) /6 Figure 4 (0) (b) Figure

Claims (1)

【特許請求の範囲】 1、所望の位置に不純物が導入された半導体基板と、前
記基板上に形成された第1の配線層と、前記第1の配線
層を覆うように形成された第1の絶縁膜と、前記第1の
絶縁膜上に形成された第2の配線層と、前記第2の配線
層上に形成された第2の絶縁膜からなる半導体装置にお
いて、前記第1および第2の絶縁膜は半導体基板周囲に
まで伸びかつ第2の絶縁膜が第1の絶縁膜を越えて形成
されて成ることを特徴とする半導体装置。 2、所望の位置に不純物が導入された半導体基板と、前
記基板上に形成された配線層と、前記基板の周囲に設け
られた溝と、前記基板上面を覆う絶縁膜からなることを
特徴とする半導体装置。 3、前記絶縁膜はポリイミド樹脂から成ることを特徴と
する特許請求の範囲第1項および第2項記載の半導体装
置。
[Claims] 1. A semiconductor substrate into which impurities are introduced at desired positions, a first wiring layer formed on the substrate, and a first wiring layer formed to cover the first wiring layer. a second wiring layer formed on the first insulation film; and a second insulation film formed on the second wiring layer; A semiconductor device characterized in that the second insulating film extends around the semiconductor substrate, and the second insulating film is formed beyond the first insulating film. 2. It is characterized by comprising a semiconductor substrate into which impurities are introduced at desired positions, a wiring layer formed on the substrate, a groove provided around the substrate, and an insulating film covering the upper surface of the substrate. semiconductor devices. 3. The semiconductor device according to claims 1 and 2, wherein the insulating film is made of polyimide resin.
JP29732289A 1989-11-17 1989-11-17 Semiconductor device Pending JPH03159125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29732289A JPH03159125A (en) 1989-11-17 1989-11-17 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29732289A JPH03159125A (en) 1989-11-17 1989-11-17 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH03159125A true JPH03159125A (en) 1991-07-09

Family

ID=17845007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29732289A Pending JPH03159125A (en) 1989-11-17 1989-11-17 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH03159125A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007012894A (en) * 2005-06-30 2007-01-18 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2007035941A (en) * 2005-07-27 2007-02-08 Ricoh Co Ltd Method for manufacturing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007012894A (en) * 2005-06-30 2007-01-18 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2007035941A (en) * 2005-07-27 2007-02-08 Ricoh Co Ltd Method for manufacturing semiconductor device

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