JPH03157943A - Manufacture of resin-sealed semiconductor integrated circuit - Google Patents
Manufacture of resin-sealed semiconductor integrated circuitInfo
- Publication number
- JPH03157943A JPH03157943A JP29807689A JP29807689A JPH03157943A JP H03157943 A JPH03157943 A JP H03157943A JP 29807689 A JP29807689 A JP 29807689A JP 29807689 A JP29807689 A JP 29807689A JP H03157943 A JPH03157943 A JP H03157943A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- plate
- lead frame
- integrated circuit
- parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000000034 method Methods 0.000 claims abstract description 10
- 238000001721 transfer moulding Methods 0.000 claims description 2
- 239000011347 resin Substances 0.000 abstract description 38
- 229920005989 resin Polymers 0.000 abstract description 38
- 238000007789 sealing Methods 0.000 abstract description 10
- 239000010935 stainless steel Substances 0.000 abstract description 2
- 229910001220 stainless steel Inorganic materials 0.000 abstract description 2
- 230000003247 decreasing effect Effects 0.000 abstract 2
- 238000000926 separation method Methods 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は樹脂封止型半導体集積回路の製造方法に関し、
特に樹脂封止方法に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for manufacturing a resin-encapsulated semiconductor integrated circuit,
In particular, it relates to a resin sealing method.
従来の樹脂封止型半導体集積回路の製造工程における樹
脂封止方法について第3図を用いて説明する。A conventional resin-sealing method in the manufacturing process of a resin-sealed semiconductor integrated circuit will be described with reference to FIG.
第3図(a>は、金型の型締前の状態を示す断面図であ
る。FIG. 3(a) is a sectional view showing the state of the mold before clamping.
下金型1のポット部7に樹脂3を投入、その後半導体素
子4を固着したリードフレーム5を下金型1上に載置す
る。The resin 3 is put into the pot part 7 of the lower mold 1, and then the lead frame 5 to which the semiconductor element 4 is fixed is placed on the lower mold 1.
次に第3図(b)に示すように上金型2でリードフレー
ム5をはさみ、金型の型締を行ない、プランジャ]0を
加圧しキャビティー9内に樹脂3を充填し、樹脂封止を
完了させる。樹脂封止完了時には、リードフレーム5と
金型のゲート部8における樹脂3は密着した状態にある
。Next, as shown in FIG. 3(b), the lead frame 5 is sandwiched between the upper mold 2, the mold is clamped, and the plunger]0 is pressurized to fill the cavity 9 with the resin 3 and seal the resin. complete the stop. When the resin sealing is completed, the lead frame 5 and the resin 3 in the gate portion 8 of the mold are in close contact with each other.
しかしながら、上述した従来の樹脂封止型半導体集積回
路の製造方法は以下の様な欠点を有する。However, the above-described conventional method for manufacturing a resin-sealed semiconductor integrated circuit has the following drawbacks.
近年多品種にわたるパッケージの実装方法の多様化、半
導体素子の高集積化及び大型化に伴い、樹脂サイドでス
トレス緩和の為の低応力化、密着性向−Fによる耐湿性
改善等の対応を余儀なくされている。しかし、このよう
な樹脂サイドの対応の為、従来のゲート部の樹脂の除去
方法では、リードフレームとゲート部の樹脂の分離が困
難となり、ゲート部の樹脂残りが発生するという欠点が
ある。In recent years, with the diversification of mounting methods for a wide variety of packages and the increasing integration and size of semiconductor devices, we have been forced to take measures such as reducing stress on the resin side to relieve stress and improving moisture resistance with adhesion property -F. ing. However, due to such handling of the resin side, the conventional method of removing resin from the gate portion has the drawback that it is difficult to separate the resin from the lead frame and the gate portion, and resin remains at the gate portion.
本発明の樹脂封止型半導体集積回路の製造方法は、下金
型及び上金型の間に半導体素子が固着されたリードフレ
ームをはさみトランスファーモールド法により樹脂封止
する樹脂封止型半導体集積回路の製造方法において、前
記下金型のゲート部に板を載置しこの板の上にリードフ
レームを載置するものである。The method for manufacturing a resin-sealed semiconductor integrated circuit of the present invention comprises sandwiching a lead frame with a semiconductor element fixed between a lower mold and an upper mold and sealing the resin-sealed semiconductor integrated circuit with a resin by a transfer molding method. In the manufacturing method, a plate is placed on the gate portion of the lower mold, and a lead frame is placed on this plate.
次に、本発明について図面を用いて説明する。 Next, the present invention will be explained using the drawings.
第1図(a)、(b)は本発明の第1の実施例を説明す
るための断面図である。FIGS. 1(a) and 1(b) are sectional views for explaining a first embodiment of the present invention.
まず第1図(a)に示すように、下金型1のポット部7
に樹脂3を投入し、次に板6を下金型1に載置し、最後
に半導体素子4が固着されたリードフレーム5を板6の
上に接触載置せしめる。板6としては樹脂3とはがれや
すいものであればよく、ステンレス板やニッケル合金板
等を用いることができる。First, as shown in FIG. 1(a), the pot part 7 of the lower mold 1
Then, the plate 6 is placed on the lower mold 1, and finally the lead frame 5 to which the semiconductor element 4 is fixed is placed on the plate 6 in contact with the resin 3. The plate 6 may be any material as long as it is easily separated from the resin 3, and a stainless steel plate, a nickel alloy plate, or the like can be used.
次に第1図(b)に示ずように、樹脂3をキャビティー
9に充填し、樹脂封止を完了させる。Next, as shown in FIG. 1(b), the cavity 9 is filled with resin 3 to complete resin sealing.
このように第1の実施例によれば、樹脂封止完了後、リ
ードフレーム5とゲート部8の樹脂3の密着部分は、リ
ードフレーム5に接触している板6により減少する。従
ってリードフレーム5とゲート部の樹脂の分離は容易と
なり、リードフレーム5に発生する樹脂残りは極めて少
いものとなる。As described above, according to the first embodiment, after the resin sealing is completed, the portion of the lead frame 5 and the resin 3 of the gate portion 8 that are in close contact with each other is reduced by the plate 6 that is in contact with the lead frame 5. Therefore, the resin of the lead frame 5 and the gate portion can be easily separated, and the amount of resin remaining on the lead frame 5 is extremely small.
第2図は、本発明の第2の実施例を説明するための断面
図であり、金型の型締前の状態を示している。FIG. 2 is a sectional view for explaining the second embodiment of the present invention, showing the state of the mold before clamping.
この第2の実施例では第1の実施例と異なり、板6Aの
樹脂投入部にあたる部分に穴を設けである。従って板6
Aとリードフレーム5を下金型1に載置した後に樹脂3
を投入できるため、樹脂の硬化を遅らせ、よりスムーズ
に樹脂3をキャビティ9に導入できるという利点がある
。This second embodiment differs from the first embodiment in that a hole is provided in the portion of the plate 6A corresponding to the resin injection portion. Therefore plate 6
After placing A and the lead frame 5 on the lower mold 1, the resin 3
This has the advantage that the curing of the resin can be delayed and the resin 3 can be introduced into the cavity 9 more smoothly.
以上説明したように本発明は、リードフレームとゲート
部の樹脂とが接触する部分に板を重ね合わせて樹脂封止
を行う事により、リードフレームとゲート部の樹脂との
密着部分を減少させることができるため、ゲート部樹脂
の除去での樹脂残りを防止できるという効果が有る。As explained above, the present invention reduces the contact area between the lead frame and the resin of the gate part by overlapping the plate and sealing with resin the part where the lead frame and the resin of the gate part contact. This has the effect of preventing resin from remaining when removing the gate resin.
第1図及び第2図は、本発明の第1及び第2の実施例を
説明するための金型の断面図、第3図は従来技術を説明
するための金型の断面図である。
1・・・下金型、2・・・上金型、3・・・樹脂、4・
・・半導体素子、5・・・リードフレーム、6・・・板
、7・・・ポット部、8・・・ゲート部、9・・・キャ
ビティー、10・・・プランジャ。1 and 2 are sectional views of a mold for explaining the first and second embodiments of the present invention, and FIG. 3 is a sectional view of a mold for explaining the prior art. 1...Lower mold, 2...Upper mold, 3...Resin, 4...
... Semiconductor element, 5... Lead frame, 6... Board, 7... Pot part, 8... Gate part, 9... Cavity, 10... Plunger.
Claims (1)
ドフレームをはさみトランスファーモールド法により樹
脂封止する樹脂封止型半導体集積回路の製造方法におい
て、前記下金型のゲート部に板を載置しこの板の上にリ
ードフレームを載置することを特徴とする樹脂封止型半
導体集積回路の製造方法。In a method for manufacturing a resin-sealed semiconductor integrated circuit in which a lead frame with a semiconductor element fixed thereto is sandwiched between a lower mold and an upper mold and resin-sealed by a transfer molding method, a plate is attached to the gate portion of the lower mold. A method for manufacturing a resin-sealed semiconductor integrated circuit, comprising placing a lead frame on the mounting plate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29807689A JPH03157943A (en) | 1989-11-15 | 1989-11-15 | Manufacture of resin-sealed semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29807689A JPH03157943A (en) | 1989-11-15 | 1989-11-15 | Manufacture of resin-sealed semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03157943A true JPH03157943A (en) | 1991-07-05 |
Family
ID=17854840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29807689A Pending JPH03157943A (en) | 1989-11-15 | 1989-11-15 | Manufacture of resin-sealed semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03157943A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6162484A (en) * | 1990-07-23 | 2000-12-19 | T. W. Burleson & Son | Method for the production of a reduced calorie honey composition |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01138724A (en) * | 1987-11-25 | 1989-05-31 | Mitsubishi Electric Corp | Molding of semiconductor device and apparatus therefor |
-
1989
- 1989-11-15 JP JP29807689A patent/JPH03157943A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01138724A (en) * | 1987-11-25 | 1989-05-31 | Mitsubishi Electric Corp | Molding of semiconductor device and apparatus therefor |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6162484A (en) * | 1990-07-23 | 2000-12-19 | T. W. Burleson & Son | Method for the production of a reduced calorie honey composition |
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