JPH0315395B2 - - Google Patents
Info
- Publication number
- JPH0315395B2 JPH0315395B2 JP60166879A JP16687985A JPH0315395B2 JP H0315395 B2 JPH0315395 B2 JP H0315395B2 JP 60166879 A JP60166879 A JP 60166879A JP 16687985 A JP16687985 A JP 16687985A JP H0315395 B2 JPH0315395 B2 JP H0315395B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- coefficient
- signal
- average value
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229940028444 muse Drugs 0.000 claims description 14
- GMVPRGQOIOIIMI-DWKJAMRDSA-N prostaglandin E1 Chemical compound CCCCC[C@H](O)\C=C\[C@H]1[C@H](O)CC(=O)[C@@H]1CCCCCCC(O)=O GMVPRGQOIOIIMI-DWKJAMRDSA-N 0.000 claims description 14
- 238000009499 grossing Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003909 pattern recognition Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
- Picture Signal Circuits (AREA)
- Television Systems (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本方式は、MUSE方式のデコーダにおいて、
映像処理系に入力する信号のレベルの調整する自
動レベル調整装置に関する。[Detailed Description of the Invention] [Industrial Application Field] This method is applicable to a MUSE method decoder.
The present invention relates to an automatic level adjustment device that adjusts the level of a signal input to a video processing system.
高品位テレビジヨンの研究開発が実用期に近く
なつた。MUSE（Multiple Sub−Nyquist
Sampling Eencoding）方式は日本放送協会にお
いて開発された方式であつて、ベースバンド帯域
幅が30MHzの高品位テレビジヨン信号を約8MHz
の帯域幅に帯域圧縮する。このような帯域圧縮に
より、衛生放送１チヤンネルで放送が可能なばか
りでなく、ビテオデイスク、ホームカメラなどの
いわゆるパツケージメデイアにも応用されること
が期待されている。
Research and development of high-definition television is nearing the stage of practical use. MUSE (Multiple Sub-Nyquist
The Sampling Encoding method is a method developed by the Japan Broadcasting Corporation that converts high-definition television signals with a baseband bandwidth of 30MHz to approximately 8MHz.
Bandwidth is compressed to . Such band compression not only makes it possible to broadcast on one channel of satellite broadcasting, but is also expected to be applied to so-called package media such as video discs and home cameras.
このように応用面から、多様な供給源をもつ
MUSE信号のレベルはかなりバラツキが生ずる。
したがつてデコーダで信号処理する前に、信号レ
ベルを一定にする必要がある。 In this way, from an application standpoint, it has a variety of supply sources.
The level of the MUSE signal varies considerably.
Therefore, it is necessary to make the signal level constant before signal processing by the decoder.
MUSE信号ののデコードにあたり、先ず同期
分離を行なうが、この同期分離は第３図に示す
HD（水平ドライブ）波形をパターン認識して行
なう。HD波形は各ラインごとに伝送サンプル番
号の第１サンプルから第12サンプルまでに送ら
れ、波形の急変する部分が同期点として用いられ
る。パターン認識の場合、信号レベルが規定レベ
ルからずれると、検出誤りを起こしやすい。
When decoding the MUSE signal, first synchronous separation is performed, and this synchronous separation is shown in Figure 3.
This is done by pattern recognition of HD (horizontal drive) waveforms. The HD waveform is sent from the 1st sample to the 12th sample of the transmission sample number for each line, and the part where the waveform changes suddenly is used as a synchronization point. In the case of pattern recognition, detection errors are likely to occur if the signal level deviates from a specified level.
本発明の目的は、上記の事情に鑑み、HD波形
を基準として、信号レベルを自動制御する回路を
提供することにある。 In view of the above circumstances, an object of the present invention is to provide a circuit that automatically controls a signal level using an HD waveform as a reference.
MUSEデコーダに入力するMUSE信号は、デ
イスパーザル処理、およびノンリニアデイエンフ
アシス処理をうけてからＡ／Ｄ変換され、映像信
号処理系・コントロール系に伝達される。本発明
においては、Ａ／Ｄ変換後のデイジタル信号を係
数器を経て、映像信号処理に伝達するようにし、
該係数器の係数を変化することで、係数器出力を
基準レベルに自動調整する。
The MUSE signal input to the MUSE decoder is subjected to dispersal processing and nonlinear de-emphasis processing, A/D conversion, and transmitted to the video signal processing system and control system. In the present invention, the digital signal after A/D conversion is transmitted to video signal processing through a coefficient unit,
By changing the coefficients of the coefficient multiplier, the coefficient multiplier output is automatically adjusted to the reference level.
係数の変化は、前記デイジタル信号のHD波形
の中点に対する振幅の絶対値を与える絶対処理回
路と、該絶対値につきHD期間の平均値を演算す
る時間窓平均値回路と、該時間窓平均値回路の出
力信号を平滑化にする平滑回路と、該平滑出力と
基準振幅レベルとから前記係数値の係数をきめる
係数設定回路とを設けることでなされる。 The change in the coefficient is determined by an absolute processing circuit that provides the absolute value of the amplitude with respect to the midpoint of the HD waveform of the digital signal, a time window average value circuit that calculates the average value of the HD period based on the absolute value, and the time window average value. This is achieved by providing a smoothing circuit that smoothes the output signal of the circuit, and a coefficient setting circuit that determines the coefficient of the coefficient value from the smoothed output and a reference amplitude level.
HD波形の中点を基準として、Ａ／Ｄ変動され
たMUSEベースバンド信号の振幅が一定になる
ように、係数器の係数の入力信号の大きさに応じ
て変化し、係数器の出力レベルを基準値に合わせ
る。そのため、HD波形の中点に対する振幅の絶
対値処理を行ないHD期間の平均値を演算し、こ
の平均値信号を平滑することで、HD波形の平均
振幅ａを求める。HD波形の基準振幅をｂとし、
ｂ／ａを演算し、これを係数器の係数とし、入力
信号にｂ／ａを乗ずれば、係数器の出力レベルは
自動的に基準値に調整される。
Based on the midpoint of the HD waveform, the output level of the coefficient multiplier is changed according to the magnitude of the input signal of the coefficient multiplier so that the amplitude of the A/D-varied MUSE baseband signal is constant. Adjust to standard value. Therefore, the average amplitude a of the HD waveform is obtained by performing absolute value processing of the amplitude with respect to the midpoint of the HD waveform, calculating the average value of the HD period, and smoothing this average value signal. The reference amplitude of the HD waveform is b,
By calculating b/a, using this as a coefficient of the coefficient multiplier, and multiplying the input signal by b/a, the output level of the coefficient multiplier is automatically adjusted to the reference value.
以下、本発明の一実施例につき、図面を参照し
て説明する。第１図に回路ブロツク図、第２図に
各部波形を示す。ただし、波形はわかり易いよう
にアナグロ表示にしてある。入力端子１０から入
力されたMUSEデイジタル信号は、係数器１２
を経て信号処理系へ伝達されると共に、係数設定
のための回路ループに入力する。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a circuit block diagram, and FIG. 2 shows waveforms at various parts. However, the waveforms are shown in analog format for easy understanding. The MUSE digital signal input from the input terminal 10 is sent to the coefficient multiplier 12.
The signal is transmitted to the signal processing system through the circuit, and is also input to a circuit loop for setting coefficients.
上記回路ループは、図示のように絶対値処理回
路１３、時間窓平均値回路１４、平滑回路１５、
係数設定回路１７で構成される。係数設定回路１
７の出力が係数器１２に乗ずべき係数として入力
する。 As shown in the figure, the circuit loop includes an absolute value processing circuit 13, a time window average value circuit 14, a smoothing circuit 15,
It is composed of a coefficient setting circuit 17. Coefficient setting circuit 1
The output of 7 is input to the coefficient unit 12 as a coefficient to be multiplied.
次に本実施例の回路動作につき説明する。デイ
ジタル信号はここではｎ＝８ビツトの信号であつ
て、第２図ａに示すように点線の入力信号より実
線に示すように小さい場合を考える。なお第２図
の点線・実線はそれぞれ正規の入力信号・実際の
入力信号に対応するものである。絶対値処理回路
１３は２進コードで与えられた人力信号の２の補
数をとり、絶対値に変換する回路でその出力値は
HD波形の中点2n-1（ｎ＝８）を振幅零として同図
ｂのようになる。次に時間窓平均値回路１４は
HD点（波形変化点）を中心として時間窓１４１
の間、信号をとおし、その期間の平均値を平均値
処理回路１４２で求める。時間窓１４１はHD波
形の両端をのぞく８サンプルと間とし、HD波形
の中点は振幅が零であるから、平均をとるには1/
７すればよい。次に上記時間窓平均値回路１４の
出力の平滑回路１５をとおすと、同図ｄに示すよ
うに出力信号１６は振幅ａとなり、基準振幅より
小さい値となる。ここで平滑回路１５は、巡回形
低域デイジタルフイルタで、係数回路１５１で、
入力を（１−ｋ）倍して加算回路１５２に入力
し、加算回路１５２の出力はラツチ回路１５３を
経て係数回路１５４でｋ倍されて、再び加算回路
１５２に入力する構成としている。ラツチ回路１
５３は水平周期クロツクで作動するから、このフ
イルタは数ラインごとの平均をとることになる。
ここでｋは１以下で、回路時定数に相応するもの
でｋが大きいと時定数が大きい。したがつてｋを
適当に定めると、入力デイジタル信号１０の突発
的な急激な変動に対しても、応答しないようにす
ることができる。 Next, the circuit operation of this embodiment will be explained. Here, we will consider the case where the digital signal is a signal of n=8 bits, which is smaller as shown by the solid line than the input signal shown by the dotted line as shown in FIG. 2a. Note that the dotted lines and solid lines in FIG. 2 correspond to regular input signals and actual input signals, respectively. The absolute value processing circuit 13 is a circuit that takes the two's complement of the human input signal given in binary code and converts it into an absolute value, and its output value is
Assuming that the amplitude is zero at the midpoint 2 n-1 (n=8) of the HD waveform, the result will be as shown in figure b. Next, the time window average value circuit 14
Time window 141 centered on HD point (waveform change point)
During this period, the signal is passed through, and an average value processing circuit 142 calculates the average value for that period. The time window 141 is between 8 samples excluding both ends of the HD waveform, and since the amplitude at the midpoint of the HD waveform is zero, it takes 1/1 to take the average.
All you have to do is 7. Next, when the output of the time window average value circuit 14 is passed through the smoothing circuit 15, the output signal 16 has an amplitude a, which is smaller than the reference amplitude, as shown in d of the figure. Here, the smoothing circuit 15 is a cyclic low-pass digital filter, and the coefficient circuit 151 is
The input is multiplied by (1-k) and input to the adder circuit 152, and the output of the adder circuit 152 passes through the latch circuit 153, is multiplied by k by the coefficient circuit 154, and is input to the adder circuit 152 again. Latch circuit 1
Since 53 is operated by a horizontally periodic clock, this filter takes an average every few lines.
Here, k is 1 or less and corresponds to the circuit time constant, and the larger k is, the larger the time constant is. Therefore, by appropriately setting k, it is possible to avoid responding even to sudden rapid fluctuations in the input digital signal 10.
次に係数設定回路１７は基準振幅ｂ（2n-2）と
前記平滑回路１５の出力信号１６の値、すなわち
振幅ａとの比を求める回路である。このｂ／ａは
第２図ａに示すように、実施のHD波形と基準
HD波形のレベル比の逆数に相当する。したがつ
て、このｂ／ａを係数回路１２の乗算係数として
入力すれば、係数回路１２の出力であるHD波形
は基準レベル2bを有するようになる。 Next, the coefficient setting circuit 17 is a circuit for calculating the ratio between the reference amplitude b(2 n-2 ) and the value of the output signal 16 of the smoothing circuit 15, that is, the amplitude a. This b/a is calculated from the actual HD waveform and the standard as shown in Figure 2a.
Corresponds to the reciprocal of the HD waveform level ratio. Therefore, if this b/a is input as a multiplication coefficient to the coefficient circuit 12, the HD waveform output from the coefficient circuit 12 will have the reference level 2b.
ラツチ回路１５３は信号ｌによつて2n-2にセツ
トされる。この信号ｌは電源投入時、および同期
保護回路がハンチング状態にあるときに印加され
るもので、その結果係数設定回路１７の出力は１
となり入力デイジタル信号１０はそのまま端子２
０に導かれる。これは、ハンチング状態の場合に
は、同期されていないので、本実施例の動作が正
しく動作せず、レベル調整が誤つてしまうことを
避けるためである。 The latch circuit 153 is set to 2n -2 by the signal l. This signal l is applied when the power is turned on and when the synchronization protection circuit is in the hunting state, and as a result, the output of the coefficient setting circuit 17 is 1.
The input digital signal 10 is then directly connected to terminal 2.
It leads to 0. This is to prevent the operation of this embodiment from operating correctly in the hunting state due to the lack of synchronization, thereby preventing erroneous level adjustment.
以上、詳しく説明したように、MUSE信号の
デコーダにおいて、HD波形パターンのレベルを
検出し、基準レベルとの比を求め、MUSE信号
を信号処理系に導く経路に設けた係数回路の係数
を前期比の逆数にとることにより、入力デイジタ
ルMUSE信号のレベル変動があつても、一定の
基準レベルに自動的に調整される。
As explained above in detail, the MUSE signal decoder detects the level of the HD waveform pattern, calculates the ratio with the reference level, and calculates the coefficient of the coefficient circuit installed in the path leading the MUSE signal to the signal processing system compared to the previous period. By taking the reciprocal of , even if the level of the input digital MUSE signal fluctuates, it is automatically adjusted to a constant reference level.
したがつてデイジタルで与えられるペデステル
と映像のレベルとの関係は入力レベルが変動して
も正しく保持される。またHD波形から同期を検
出する際に、本発明によりHD波形は基準レベル
に自動的に保たれるので、限界的なレベルの信号
が入力しても、同期検出誤りを防ぐことができ
る。 Therefore, the relationship between the digitally given pedestal and the video level is maintained correctly even if the input level fluctuates. Furthermore, when detecting synchronization from an HD waveform, the HD waveform is automatically maintained at a reference level according to the present invention, so even if a signal at a marginal level is input, synchronization detection errors can be prevented.
第１図は本発明の一実施例の回路ブロツク図、
第２図は第１図の回路の各部波形をアナログ的に
図示した図、第３図はMUSE方式のHD波形図で
ある。
１２……係数器、１３……絶対値処理回路、１
４……時間窓平均値回路、１５……平滑回路、１
７……係数設定回路。
FIG. 1 is a circuit block diagram of an embodiment of the present invention.
FIG. 2 is an analog diagram of the waveforms of each part of the circuit of FIG. 1, and FIG. 3 is an HD waveform diagram of the MUSE system. 12...Coefficient unit, 13...Absolute value processing circuit, 1
4... Time window average value circuit, 15... Smoothing circuit, 1
7...Coefficient setting circuit.
Claims (1)
デイジタル信号を映像信号処理系に伝達する経路
に、係数器を設け、該係数器の係数を変化するこ
とで、前記係数器の出力を基準レベルに自動調整
する装置であつて、 前記Ａ／Ｄ変換されたデイジタル信号のHD波
形の中点に対する振幅の絶対値を与える絶対値処
理回路と、該絶対値につきHD期間の平均値を演
算する時間窓平均値回路と、該時間窓平均値回路
の出力信号を平滑化する平滑回路と、該平滑出力
と基準振幅レベルとから前記係数値の係数をきめ
る係数設定回路とを設けてなることを特徴とする
MUSE方式用自動レベル調整装置。[Scope of Claims] 1. A coefficient multiplier is provided in the path for transmitting the digital signal obtained by A/D converting the MUSE baseband signal to the video signal processing system, and the coefficient multiplier is changed by changing the coefficient of the coefficient multiplier. A device that automatically adjusts the output to a reference level, the device comprising: an absolute value processing circuit that provides an absolute value of the amplitude with respect to the midpoint of the HD waveform of the A/D converted digital signal; and an average value of the HD period for the absolute value. a time window average value circuit that calculates the time window average value circuit, a smoothing circuit that smoothes the output signal of the time window average value circuit, and a coefficient setting circuit that determines a coefficient of the coefficient value from the smoothed output and a reference amplitude level. characterized by becoming
Automatic level adjustment device for MUSE method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60166879A JPS6229290A (en) | 1985-07-30 | 1985-07-30 | Automatic level adjusting device for muse system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60166879A JPS6229290A (en) | 1985-07-30 | 1985-07-30 | Automatic level adjusting device for muse system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6229290A JPS6229290A (en) | 1987-02-07 |
| JPH0315395B2 true JPH0315395B2 (en) | 1991-02-28 |
Family
ID=15839310
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60166879A Granted JPS6229290A (en) | 1985-07-30 | 1985-07-30 | Automatic level adjusting device for muse system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6229290A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63222582A (en) * | 1987-03-12 | 1988-09-16 | Sanyo Electric Co Ltd | Clamping circuit |
| JP2599448B2 (en) * | 1988-10-24 | 1997-04-09 | 株式会社日立製作所 | Clamp level detection circuit of MUSE receiver |
-
1985
- 1985-07-30 JP JP60166879A patent/JPS6229290A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6229290A (en) | 1987-02-07 |
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