JPS5890844A - Analog-to-digital converter - Google Patents

Analog-to-digital converter

Info

Publication number
JPS5890844A
JPS5890844A JP18969281A JP18969281A JPS5890844A JP S5890844 A JPS5890844 A JP S5890844A JP 18969281 A JP18969281 A JP 18969281A JP 18969281 A JP18969281 A JP 18969281A JP S5890844 A JPS5890844 A JP S5890844A
Authority
JP
Japan
Prior art keywords
signal
frequency
analog
output
subtractor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18969281A
Other languages
Japanese (ja)
Other versions
JPS6248410B2 (en
Inventor
Hidefumi Tanaka
英史 田中
Tsutomu Kiuchi
勉 木内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Nippon Victor KK filed Critical Victor Company of Japan Ltd
Priority to JP18969281A priority Critical patent/JPS5890844A/en
Publication of JPS5890844A publication Critical patent/JPS5890844A/en
Publication of JPS6248410B2 publication Critical patent/JPS6248410B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/04Differential modulation with several bits, e.g. differential pulse code modulation [DPCM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE:To decrease the period of malfunction even with mixed error signals, by increasing the utilizing efficiency of encoded bit number and reducing the amount of data, through the differential pulse code modulation of a modulated wave signals angular-modulated with an analog signal. CONSTITUTION:An analog input signal ei is applied to a frequency modulator 10 for frequency modulation. A modulated wave signal eFM is applied to a low pass filter 11 in which high frequencies are attenuated in the rate of -6dB/oct, and an output e'FM is applied to a subtractor 2. An output eD=e'FM-e0 of the subtractor 2 is applied to an encoder 3 for encoding to obtain a digital signal ED. The digital signal ED is applied to a digital integrator consisting of an adder 4 and a latch 6 to generate an estimation signal E1. This estimation signal E1 is applied to a decoder 9 via a latch 8, where the signal is converted into an analog estimation signal e0 and applied to the subtractor 2.

Description

【発明の詳細な説明】 本発明はAD変換装置に係り、アナログ信号を周波数変
調等の角度変調をして得九被角度変調波信号をディジタ
ル信号に“変換することによプ、ディジタル信号を得る
ときのデータ量を削減でき、また簡単で安価な構成の回
路により雑音の混入による誤動作期間が短かく、正しく
変換されたディジタル信号を出力し得るAD変換装置を
提供することを目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AD converter, which converts an analog signal into a digital signal by performing angle modulation such as frequency modulation and converting the angle modulated wave signal into a digital signal. To provide an AD converter which can reduce the amount of data to be obtained, has a short malfunction period due to noise contamination with a simple and inexpensive circuit, and can output correctly converted digital signals.

従来より、VTRの再生信号の時間軸変動を補正するた
めのメモリに供給するため、その他種々の用途に、映倫
信号等のアナログ信号をディジタル信号に変換するAD
変換装置が使用される。かかるAD変換装置の高能率符
号化のため、従来、第1図に示す如き差分パルス符号変
調(D P CM)を行なう装置があった。同図におい
て、入力端子1に入来したアナログ信号eiは減算器2
に供給され、ここで復号化器9よりの1クロツク前のア
ナログ信号e0と減算されて差信号eDK変換された後
符号化器3に供給され、ここで符号化される0符号化器
3より取り出された符号化ビット数nのディジタル信号
EDは加算器4に供給される一方、出力端子5へ出力さ
れる。加算器4はこのディジタル信号EDと、1クロツ
ク前までのディジタル信号EDの加算出力を割算器7に
より所定の係数で割算して得た信号E、/との加算を行
ないその加算出力信号E0  をラッチ6に供給してラ
ッチさせる。ラッチ6よりディジタル信号EDとタイミ
ングの合わせられた信号E1  が取り出されて割算器
7に供給される一方、ラッチ8に供給され、これよりデ
ィジタル信号EDとタイミングの合わせられた信号E、
が出力される。この信′号に、は復号化器9に供給され
て復号化されてアナログ信号・。とされた後、減算器2
へ供給される。
Conventionally, AD has been used to convert analog signals such as video signals into digital signals for supplying to memory for correcting time axis fluctuations in VTR playback signals, and for various other purposes.
A conversion device is used. In order to achieve high-efficiency encoding in such an AD converter, there has conventionally been a device that performs differential pulse code modulation (DPCM) as shown in FIG. In the figure, the analog signal ei input to the input terminal 1 is input to the subtracter 2.
Here, it is subtracted from the analog signal e0 of one clock before the decoder 9 and converted into a difference signal eDK, and then supplied to the encoder 3, where it is encoded by the 0 encoder 3. The extracted digital signal ED having the number of encoded bits n is supplied to the adder 4 and is output to the output terminal 5. The adder 4 adds this digital signal ED and the signal E, / obtained by dividing the addition output of the digital signal ED up to one clock ago by a predetermined coefficient by the divider 7, and produces the addition output signal. E0 is supplied to the latch 6 and latched. A signal E1 whose timing is aligned with the digital signal ED is taken out from the latch 6 and supplied to the divider 7, while a signal E1 whose timing is aligned with the digital signal ED is supplied to the latch 8.
is output. This signal ' is supplied to a decoder 9 and decoded into an analog signal. After that, subtractor 2
supplied to

上記の従来装置において、符号化器3.復号化器9.ラ
ッチ6.8等圧供給される第2図(B)及び第3図(6
)に夫々示す周波数fcのサンプルクロックに対し、入
力アナログ信号・iが第2図(4)に示す如く周波数1
fcの三角波であるときは、減算器2の出力信号6pは
第2図DK示す如き台形波となる。一方、入力アナログ
信号e1が第3図囚に示す如く周波数が1fCで、かつ
、第2図(4)に示し九三角波と同一振幅である三角波
である場合は、減算器2の出力信号波形は第3図C)に
示す如き台形波となり、またその振幅は第2図C)に示
した台形波の2倍のVとなる。
In the above conventional device, the encoder 3. Decoder 9. Latch 6.8 Equal pressure supplied Figure 2 (B) and Figure 3 (6
), the input analog signal i has a frequency of 1 as shown in Figure 2 (4).
When it is a triangular wave of fc, the output signal 6p of the subtracter 2 becomes a trapezoidal wave as shown in FIG. 2DK. On the other hand, if the input analog signal e1 is a triangular wave with a frequency of 1 fC as shown in Figure 3, and the same amplitude as the nine triangular waves shown in Figure 2 (4), the output signal waveform of the subtracter 2 is A trapezoidal wave as shown in FIG. 3C) is formed, and its amplitude is V twice that of the trapezoidal wave shown in FIG. 2C).

すなわち、−符号化ビット数nを第3図0に示す台形波
の振幅Vの時蛾大となるよう設定すると、周波数LfC
の三角波が入来したときに減算器2から出力される第2
図C)K示す台形波に対する符号化ビット数は2(n−
1’)  でよく、このため利用効率は入力アナログ信
号e1の周波数が高くなる程良くなる。換言すれば、減
算器2の出力信号の符号化ビット数に対する利用効率は
、周波数に対し5 d B 10 c tの特性を示す
In other words, if the number n of encoding bits is set so that the amplitude V of the trapezoidal wave shown in FIG.
The second triangular wave output from subtractor 2 when the triangular wave of
Figure C) The number of encoding bits for the trapezoidal wave shown by K is 2(n-
1'), and therefore the utilization efficiency becomes better as the frequency of the input analog signal e1 becomes higher. In other words, the utilization efficiency with respect to the number of encoded bits of the output signal of the subtracter 2 exhibits a characteristic of 5 d B 10 c t with respect to frequency.

そこで、既に公表されているテレビジョン信号の符号化
では、テレビジョン信号の周波数に対するレベル値が統
計的にみて一6da10ct  であることを利用して
第1図に示す装置を使用していた。
Therefore, in the encoding of television signals that has already been made public, the apparatus shown in FIG. 1 has been used, taking advantage of the fact that the level value for the frequency of television signals is statistically -6 da10 ct.

しかしながら、上記の統計的予測に基づかないテレビジ
ョン信号が入来した場合は、上記の従来装置では正確に
ディジタル信号の変換並びに正しい再生信号e0が得ら
れなかった。すなわち、入力アナログ信号81が第4図
囚に示す如くテレビジョン信号であって、かつ、その画
像情報が黒から白へ、また白から黒へ急敏に変化するよ
うな信号部aを有している場合は、減算器2から得られ
る差信号eDは信号部aのみに着目したとき、同図の)
に示す如き理想的な波形とはならず、同図0に示す如き
波形となり、このため復号化器9より取り出される再生
信号e。は同図0)K示す如くKなり、原信号aとは著
しく異なった波形となってしまう。
However, when a television signal that is not based on the above-mentioned statistical prediction is received, the above-mentioned conventional apparatus cannot accurately convert the digital signal and obtain a correct reproduced signal e0. That is, the input analog signal 81 is a television signal as shown in FIG. , the difference signal eD obtained from the subtracter 2 is as shown in the same figure when focusing only on the signal part a)
The reproduced signal e is not an ideal waveform as shown in FIG. 1 but becomes a waveform as shown in FIG. The signal becomes K as shown in FIG. 0), resulting in a waveform significantly different from the original signal a.

また上記の従来装置は、その動作中に誤差が発生した場
合、誤差も加算されるため、定期的に誤差を補正する手
段が必要であり、回路構成が複雑であった0更に上記の
゛従来装置は前記した如く、周波数に対し、減算器2の
出方信号の符号化ビット数に対する利用効率が6dl1
10ctであり、利用効率が悪いという欠点を有してい
た。
In addition, in the conventional device described above, if an error occurs during operation, the error is added, so a means to periodically correct the error is required, and the circuit configuration is complicated. As mentioned above, the device has a utilization efficiency of 6dl1 for the number of encoded bits of the output signal of the subtracter 2 with respect to the frequency.
10ct, which had the disadvantage of poor utilization efficiency.

本発明は上記の諸欠点を悉く除去したものであり、第5
図以下の図面と共にその一実施例につき説明する。
The present invention eliminates all of the above-mentioned drawbacks, and the fifth
One embodiment will be described with reference to the drawings below.

第5図は本発明になるAD変換装置の一実施例のブロッ
ク系統図を示す0同図中、第1図と同一構成部分には同
一符号を付し、その説明を省略する。入力端子1に入来
したアナログ信号eiは周波数変調器10に供給され、
ここで周波数変調されて周波数変調波信号’FMとされ
た後、低域フィルタ11により一6dl110ct  
の割合で高周波教程減衰された周波数変調波信号e ′
とされて減算M 器2の一方の入力端子に供給される。
FIG. 5 shows a block system diagram of an embodiment of the AD conversion device according to the present invention. In the figure, the same components as those in FIG. The analog signal ei entering the input terminal 1 is supplied to the frequency modulator 10,
After being frequency-modulated and made into a frequency modulated wave signal 'FM, it is passed through a low-pass filter 11 with a frequency of -6dl110ct.
Frequency modulated wave signal e ′ that is attenuated by high frequency at a rate of
and is supplied to one input terminal of the subtractor M2.

第10図は低域フィルター1の一実施例の回路図を示す
。同図に示す如く、低域フィルター1は入力端子12に
ペースが接続されているNPN トランジスタQ、と、
トランジスタQ、のコレクタ抵抗(抵抗値R)及びエミ
ッタ抵抗(抵抗値R/)と、電界効果トランジスタ(F
ET)Q*と、トランジスタQ、のベース及びF E 
T Q、のゲート間と接地間に接続されたコンデンサ(
容量値C)等枠よりなり、トランジスタQ、のコレクタ
より増幅した入力信号を取り出して容量値Cのコンデン
サに供給し、これにより生じたコンデンサの両端間の電
圧をソースホロワを構成するF E T Q、によりイ
ンピーダンス変換して出力端子13へ出力する構成とさ
れでいる。いま、入力端子12の入力電圧をVi 。
FIG. 10 shows a circuit diagram of an embodiment of the low-pass filter 1. As shown in the figure, the low-pass filter 1 includes an NPN transistor Q whose pace is connected to the input terminal 12;
The collector resistance (resistance value R) and emitter resistance (resistance value R/) of the transistor Q, and the field effect transistor (F
ET) Q*, the base of transistor Q, and F E
A capacitor (
The amplified input signal is taken out from the collector of the transistor Q and supplied to the capacitor with the capacitance C, and the resulting voltage across the capacitor is converted into the FETQ that forms the source follower. , the impedance is converted and outputted to the output terminal 13. Now, the input voltage of the input terminal 12 is Vi.

出力端子13より取り出される出力電圧をvo  とす
ると、出力電圧v0は次式で表わされる。
When the output voltage taken out from the output terminal 13 is vo, the output voltage v0 is expressed by the following equation.

Vo  ” V i’ (R・−) / (−一+R)
JωCコ′ωC =vl′/(j#C+Tt) 一15d110CL  の低域フィルタを通したことと
等価となる0従って、コンデンサのインピーダンスj―
Cをπに比較して充分大なる値に設定することにより簡
単なR,C構成の低域フィルタ11を構成することがで
きる。
Vo ” Vi' (R・-) / (-1+R)
JωC ko'ωC = vl'/(j#C+Tt) 0, which is equivalent to passing through a low-pass filter of -15d110CL Therefore, the impedance of the capacitor j-
By setting C to a sufficiently large value compared to π, it is possible to configure the low-pass filter 11 with a simple R, C configuration.

低域フィルタ11より取り出された周波数変調波信号e
  、は第1図に示したAD変換装置と略M 同様構成の回路によりディジタル信号EDに変換されて
出力端子5より出力される。なお、第1図に示した割算
器7は減算器2に供給される信号がテレビジョン信号の
ような各周波数の合成波形でなく、単純波形であるため
、特に必要はなく省略できる〇 このように、AD変換されるべきアナログ信号を周波数
変調して、振幅一定の周波数変調波信号”FM  を得
た後、予め−5d B / Oc tで減衰した後減算
器2へ供給するようKしているから、周波数が変化して
もレベル変化のない差信号eDが得ら低域フィルタ11
の出力周波数変調波信号eFM’の周波数が9のときは
第6図(4)に示す如く犬で(4)〜C)と共に夫々説
明したようVこ、減算器2より取り出される差信号eD
の振幅は減算器20入力信号周波数に対して5 d m
 / o c t  の特性を示すから、第6図囚と第
7図(4)に示す周波数に応じて一6da10atの振
幅とされる周波数変調波信号eFM′が減算器2に供給
される本実施例の場合の差信号eDの振幅は第6図日、
第7図C)に示す如くいずれも同一振幅Vとなる。従つ
七、本実施例によれば符号化ビット数が常に最大のもの
が使えるから、利用効率は従来装置に比し大とな゛る。
Frequency modulated wave signal e extracted from the low-pass filter 11
, is converted into a digital signal ED by a circuit having substantially the same configuration as the AD converter shown in FIG. Note that the divider 7 shown in FIG. 1 is not particularly necessary and can be omitted because the signal supplied to the subtracter 2 is not a composite waveform of each frequency like a television signal, but a simple waveform. After frequency modulating the analog signal to be AD converted to obtain a frequency modulated wave signal "FM" with a constant amplitude, the signal is attenuated by -5 dB/Oct in advance and then supplied to the subtracter 2. Therefore, a difference signal eD whose level does not change even if the frequency changes can be obtained.
When the frequency of the output frequency modulated wave signal eFM' is 9, as shown in FIG. 6 (4), the difference signal eD extracted from the subtracter 2 is
The amplitude of is 5 d m with respect to the subtractor 20 input signal frequency.
/ o c t Therefore, in this embodiment, a frequency modulated wave signal eFM' having an amplitude of -6 da 10 at is supplied to the subtracter 2 according to the frequencies shown in FIG. 6 and FIG. 7 (4). The amplitude of the difference signal eD in the example case is as shown in Fig. 6.
As shown in FIG. 7C), both have the same amplitude V. Accordingly, according to this embodiment, the maximum number of encoding bits can always be used, so the utilization efficiency is greater than that of conventional devices.

WK、本発明ではディジタル信号に変換する信号を周波
数変調波信号”FM’としているため、例えばアナログ
信号6t がテレビジョン信号であり、正常な時は従来
装置の復号化器9からは第8図(4)に示す如き正常な
テレビジョン信号が再生信号e。
WK, in the present invention, the signal to be converted into a digital signal is a frequency modulated wave signal "FM", so for example, the analog signal 6t is a television signal, and under normal conditions, the decoder 9 of the conventional device outputs the signal as shown in FIG. A normal television signal as shown in (4) is the reproduced signal e.

とじて取り出され、本実施例の場合は前記した如く第8
図@に示す如き正常な波形の周波数変調波信号が復号化
器9より取り出されることは勿論であるが、誤動作時は
従来装置の再生信号e0が第9図(4)k示す如く誤信
号部分すやクリップ部分Cを有するテレビジョン信号で
あるのに対し、本実施例における誤動作時は復号化器9
よりの周波数変調波信号e。は同図の)に実線で示す如
く、誤信号部分b′ やクリップ部分C′ を生じるが
、その影響は周波数変調波信号e。が高周波数であるか
ら短かくて済む。因みに、周波数変調波信号e□。
In this embodiment, as described above, the eighth
Of course, a frequency modulated wave signal with a normal waveform as shown in Figure @ is extracted from the decoder 9, but when a malfunction occurs, the reproduced signal e0 of the conventional device has an erroneous signal portion as shown in Figure 9 (4) k. While the television signal has a clipped portion C, in the case of a malfunction in this embodiment, the decoder 9
Frequency modulated wave signal e. As shown by the solid line in ) in the same figure, an erroneous signal portion b' and a clip portion C' occur, but the effect is on the frequency modulated wave signal e. Since it has a high frequency, it can be short. Incidentally, the frequency modulated wave signal e□.

e y M’ + 60の周波数帯域は、現行のVTR
のタイムベースコレクタの一部に本発明装置を用いる場
合は、現行のVTRの周波数変調映倫信号帯域程度であ
り、映倫信号のベースバンドに比し高周波数である。ま
た低域フィルタ11のカットオフ周波数は、例えば周波
数変調波信号”FM の−次側波帯を含めた帯域の下限
周波数程度に選定される。
The frequency band of e y M' + 60 is the frequency band of the current VTR.
When the device of the present invention is used as a part of the time base collector of , the frequency is about the same as the frequency modulation signal band of the current VTR, and the frequency is higher than the baseband of the signal. Further, the cutoff frequency of the low-pass filter 11 is selected, for example, to be approximately the lower limit frequency of the frequency modulated wave signal "FM" in the band including the -order sideband.

なお、本発明装置によりディジタル信号に変換されるア
ナログ信号elはテレビジ叢ン信号に限られるものでは
なく、音声信号その他のアナログ信号に適用できること
は勿論である。また周波数変調器10の代りに位相変調
器を用いてもよい。
Note that the analog signal el converted into a digital signal by the device of the present invention is not limited to a television signal, but can of course be applied to audio signals and other analog signals. Further, a phase modulator may be used instead of the frequency modulator 10.

上述の如く、本発明になるAD変換装置は、アナログ信
号を角度変調する角度変調器と、角度変調器の出力被角
度変調波信号の高域周波数を減衰させて差分パルス符号
変調回路に供給する低域フィルタとを具備するようにし
たため、簡単な回路構成により差分パルス符号変調回路
内の復号化器の出力再生信号が従来装置のような統計値
に基づくものではなく正確に得ることができ、また差分
信号の振幅を周波数の変化によらず略一定にできるので
、符号化ビット数の利用効率を従来に比し大幅に向上す
ることができ、ディジタル化する際のデータ量を削減で
き、更に誤信号の混入がありても誤動作期間が短かくて
済む、ので、誤動作の修正が短時間でできる勢の特長を
有するものである0
As described above, the AD converter according to the present invention includes an angle modulator that angle-modulates an analog signal, and attenuates the high frequency of the angle-modulated wave signal output from the angle modulator and supplies it to the differential pulse code modulation circuit. Since the present invention is equipped with a low-pass filter, the output reproduction signal of the decoder in the differential pulse code modulation circuit can be obtained accurately with a simple circuit configuration, instead of being based on statistical values as in conventional devices. In addition, since the amplitude of the differential signal can be kept almost constant regardless of changes in frequency, the efficiency of using the number of encoded bits can be greatly improved compared to the conventional method, and the amount of data when digitizing can be reduced. Even if an erroneous signal is mixed in, the period of malfunction is short, so malfunctions can be corrected in a short time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来装置の一例を示すブロック系統図、第2図
(A)−(Cり 、第3図■〜口及び第4図(4)〜0
は夫々第1図の動作説明用信号波形図、第5図は本発明
装置の一実施例を示すブロック系統図、第6図囚〜ロ、
第7図(A〜0は夫々第5図の動作説明用信号波形図、
第8図囚、(B)及び第9図囚、@)は夫々第1図と第
5図の正常時と誤動作時の再生信号波形を示す図、第1
0図は第5図の要部の一実施例を示す回路図である。 1・・Φアナログ信号入力端子、2・・・減算器、3・
・・符号化器、4・・−加算器、5・・・ディジタル信
号出力端子、9・・・復号化器、10−@・周波数変調
器、11・・・低域フィルタ0 第3図 第4図 (A)         (B)       (C)
(D) 第7図 第8図     第9図 第10図 ■
Fig. 1 is a block system diagram showing an example of a conventional device, Fig. 2 (A)-(Cri), Fig. 3 (■--), and Fig. 4 (4)-0.
are a signal waveform diagram for explaining the operation of FIG. 1, FIG. 5 is a block system diagram showing an embodiment of the device of the present invention, and FIGS.
FIG. 7 (A to 0 are signal waveform diagrams for explaining the operation of FIG. 5, respectively;
Figure 8 (B) and Figure 9 (@) are diagrams showing the reproduced signal waveforms in normal and malfunction conditions in Figures 1 and 5, respectively.
FIG. 0 is a circuit diagram showing an embodiment of the main part of FIG. 1... Φ analog signal input terminal, 2... subtractor, 3...
...Encoder, 4...-Adder, 5...Digital signal output terminal, 9...Decoder, 10-@Frequency modulator, 11...Low-pass filter 0 Fig. 3 Figure 4 (A) (B) (C)
(D) Figure 7 Figure 8 Figure 9 Figure 10■

Claims (1)

【特許請求の範囲】[Claims] アナログ信号を差分パルス符号変調回路によりディジタ
ル信号に変換して出力するAD変換装置くおいて、上記
アナログ信号を角度変調する角度変調器と、該角度変調
器の出力被角度変調波信号の高域周波数を減衰させて上
記差分パルス符号変調回路に供給する低域フィルタとを
具備したことを特徴とするAD変換装置。
An AD conversion device that converts an analog signal into a digital signal using a differential pulse code modulation circuit and outputs the digital signal, includes an angle modulator that angle-modulates the analog signal, and a high-frequency range of the angle-modulated wave signal output from the angle modulator. An AD conversion device comprising: a low-pass filter that attenuates a frequency and supplies it to the differential pulse code modulation circuit.
JP18969281A 1981-11-26 1981-11-26 Analog-to-digital converter Granted JPS5890844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18969281A JPS5890844A (en) 1981-11-26 1981-11-26 Analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18969281A JPS5890844A (en) 1981-11-26 1981-11-26 Analog-to-digital converter

Publications (2)

Publication Number Publication Date
JPS5890844A true JPS5890844A (en) 1983-05-30
JPS6248410B2 JPS6248410B2 (en) 1987-10-14

Family

ID=16245584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18969281A Granted JPS5890844A (en) 1981-11-26 1981-11-26 Analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS5890844A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0286811A (en) * 1988-05-09 1990-03-27 Sankyo Kogyo Kk Dry deodorizing device and semidry deodorizing device

Also Published As

Publication number Publication date
JPS6248410B2 (en) 1987-10-14

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