JPH0315200B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a musical tone signal generating device, and in particular to a musical tone signal generating device that generates a musical tone signal whose spectral components change over time by randomly switching and generating a plurality of different musical sound waveforms. Regarding the generator. [Prior Art] Japanese Patent Application Laid-Open No. 58-95790 discloses a musical tone signal generation method that can generate a musical tone signal whose spectral components change over time by sequentially switching and reading out a plurality of different musical waveforms stored in a waveform memory. An apparatus is disclosed. In this case, the tone waveform to be read from the waveform memory is switched when the same tone waveform is repeatedly read out for a predetermined number of cycles. Therefore, the switching interval of musical waveforms is always fixed at a predetermined number of cycles,
The disadvantage is that the switching interval of the musical sound waveform varies depending on the frequency of the musical tone to be generated, and the time required for interpolation also varies accordingly. In order to eliminate such drawbacks, a patent application filed in 1983-
No. 2667 discloses that the waveform switching is performed according to a predetermined time function, thereby making it possible to control the switching of musical sound waveforms without being influenced by the frequency of the musical sound to be generated. There is. However, in any of the above patent applications,
The switching order of musical sound waveforms is fixed in advance for each tone, and cannot be changed randomly. [Problem to be solved by the invention] However, when we think about the temporal change in timbre in natural musical instruments, we find that the timbre does not always change in the same pattern over time each time it is pronounced, but rather differs for each occasion when it is produced. Often shows change. However, in the technology disclosed in the prior application as described above, since the switching order of musical waveforms was fixed, it was only possible to realize temporal changes in timbre using the same pattern at all times, and there was a limit. This invention was made in view of the above points,
To provide a musical tone signal generating device which imparts randomness to the temporal variation of timbre and can realize temporal variation of timbre in a manner similar to the temporal variation of timbre in a natural musical instrument. [Means for Solving the Problems] The musical tone signal generating device of the present invention includes a waveform storage means that stores waveform data of a plurality of different musical sound waveforms, and a predetermined waveform signal generation device that stores waveform data of a plurality of different musical sound waveforms, and a predetermined signal from the waveform storage means according to the musical tone frequency to be generated. A device comprising a readout means for reading out waveform data of a musical tone waveform, and a waveform switching control means for temporally switching the musical waveform to be read from the waveform storage means, wherein the order in which the musical tone waveforms are switched by the waveform switching control means is random. It is characterized by comprising random control means for controlling. Further, the present invention is not limited to a system in which a musical tone signal is formed by reading out a musical sound waveform stored in a waveform storage means, but can also be applied to a system in which a musical tone signal is formed using parameters. . That is, the musical tone signal generating device according to the second aspect of the invention generates a musical tone signal that generates a musical sound waveform having a shape determined by parameters, and also forms the musical sound waveform in accordance with a phase specified by phase data. a waveform forming means; a parameter storage means storing the parameters for determining the shape of each musical sound waveform with respect to a plurality of different musical sound waveforms; phase data generation means to be applied to the tone waveform forming means, and temporally switching and specifying the tone waveform to be formed by the tone waveform forming means;
waveform switching control means for reading out the parameters corresponding to a designated musical sound waveform from the parameter storage means and applying them to the musical sound waveform forming means, the waveform switching control means randomly controlling the switching order of the musical sound waveforms. The invention is characterized in that it includes a random control means to [Operation] The random control means randomly controls the switching order of musical sound waveforms. Therefore, even if the same timbre is selected, the manner in which the timbre changes over time will vary randomly for each pronunciation opportunity. This makes it possible to realize temporal changes in timbre in a manner similar to the temporal changes in timbre in natural musical instruments. [Embodiment] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings. In the embodiment described below, in order to smoothly switch the tone waveform, the tone waveform signal is generated in two streams, and one stream generates the tone waveform signal before switching. Then, the other series generates the musical waveform signal after switching, and crossfades the amplitude envelopes of both with opposite characteristics (in other words, the envelope of the musical waveform before switching has a damping characteristic, and the envelope of the musical waveform after switching has a rising characteristic). (intersect as). Although the present invention is not limited to those that perform such cross-fade control, one embodiment will be described below assuming that such cross-fade control is performed. First, the principle of musical tone signal generation employed in the embodiment described below will be explained with reference to FIG. In FIG. 1a, for convenience, a musical sound waveform that should be prepared in advance in the waveform memory is schematically shown using only an amplitude envelope. In this embodiment, it is assumed that the tone waveform of a predetermined period (attack portion) from the start of sound generation is a continuous multiple period waveform that is directly sampled and stored in a waveform memory. Regarding the entire sound generation period after the attack portion, one cycle of a plurality of different tone waveforms is discretely sampled during the period, and each period is stored in a waveform memory. In Figure 1a, each one-period waveform sampled discretely in this way is labeled SEG1~
For convenience, these are referred to as segment waveforms. The basic method of reading out waveforms from the waveform memory in which waveforms are stored as described above is to first read out all the waveforms of the attack section continuously, and then read out the segment waveform SEG1 at a certain timing according to a waveform switching command as described later. ~SEG5 is selected at random, and one cycle of the selected segment waveform is repeatedly read out. For example, after reading out the attack waveform, a certain segment waveform SEG1 is repeatedly read out for a certain period of time, then another segment waveform SEG3 is switched to and read out repeatedly, and thereafter the segment waveforms are switched in a random order. When switching segment waveforms, interpolation techniques are used to provide a smooth transition from a preceding waveform to the next waveform. In that case, in addition to the basic reading method described above, at least the preceding segment waveform and the following segment waveform are read out in the interval where interpolation is to be performed, and both are weighted respectively according to an appropriate interpolation function. . As an example, the entire switching interval of segment waveforms corresponds to the interpolation interval, and a certain segment waveform
When reading out SEG1, the next segment waveform SEG3 is also read out, and at the next switching, both segment waveform SEG3 and the next segment waveform SEG5 are read out. read out together. An example of an interpolation function is shown in FIG. 1b. The solid line indicates the interpolation function IPF1 for the first series,
The broken line indicates the interpolation function IPF2 for the second series. 1st
The series corresponds to one of the two segment waveforms read out for interpolation as described above, and the second series corresponds to the other.
These interpolation functions IPF1 and IPF2 indicate the amount of weighting of the waveform amplitude of each series, and the minimum value is zero (indicating that the waveform is not output). In the attack part that does not perform interpolation, the first series of interpolation functions
Keep IPF1 at maximum value and use the second series interpolation function
Keep IPF2 at minimum value. After the attack portion ends, each of the interpolation functions IPF1 and IPF2 changes over time with predetermined characteristics during a period in which segment waveforms SEG1 to SEG5 are to be interpolated. Both interpolation functions
IPF1 and IPF2 change with opposite characteristics to each other, so that when the weighting of one series gradually decreases, the weighting of the other series gradually increases, thereby achieving a smooth waveform transition. In Figure 1b, the interpolation function IPF1,
Although IPF2 shows linear interpolation characteristics, it is of course not limited to this. t ₁ , t ₂ , t ₃ , and t ₄ each indicate a separate interpolation interval, and the interpolation function of each series is changed each time the interpolation interval is switched.
The slopes of IPF1 and IPF2 are switched alternately. In the interpolation interval _t1 , interpolation is performed to smoothly transition from the segment waveform SEG1 to SEG3. In this case, segment waveform SEG1
is repeatedly read out in the first series, and segment waveform SEG3 is repeatedly read out in the second series. Then, while the first series interpolation function IPF1 gradually decreases from the maximum value, the second series interpolation function IPF
2 gradually increases from the minimum value. The multi-period waveform signal of the segment waveform SEG1 repeatedly read out in the first series is weighted (amplitude controlled) by this interpolation function IPF1, and is repeatedly read out in the second series by the interpolation function IPF2. segment waveform
The multi-period waveform signal of SEG3 is weighted.
By mixing the waveform signals of both series weighted with opposite characteristics in this way, the segment waveform
A musical tone signal whose waveform changes smoothly over time from SEG1 to segment waveform SEG3 is obtained. In the next interpolation section _t2 , interpolation is performed to smoothly transition from the segment waveform SEG3 to SEG5.
In this case, the segment waveform SEG3 is read out repeatedly in the second series following the previous time, and on the other hand,
In the first series, the segment waveform is from SEG1 to SEG
5 and this is read out repeatedly. Then, the slopes of the interpolation functions IPF1 and IPF2 are respectively switched to the opposite direction from the previous time. In the other interpolation intervals t ₃ and t ₄ , the segment waveform of one series is switched as well as the interpolation function IPF as described above.
1. The slope of IPF2 switches to the opposite direction. Figure 1b
The numbers of segment waveforms SEG1 to SEG5 used in each series in each interpolation interval _t1 to _t4 are also written. FIG. 2 shows an embodiment of an electronic musical instrument to which the musical tone signal generating device according to the present invention is applied.
In this electronic musical instrument, musical tone signals are generated according to the musical tone signal generation principle as described above with reference to FIG. In FIG. 2, a keyboard 10 includes a number of keys for specifying the pitch of musical tones to be generated. The key assigner 11 detects the press or release of each key,
A process of assigning a pressed key to one of a plurality of musical tone generation channels is performed. As an example, the maximum number of notes that can be produced simultaneously is 12, and the key assigner 11 assigns a pressed key to any of the 12 channels. a key code KC that identifies the key assigned to each channel;
The key-on signal KON, which indicates whether or not the key press continues, and the key-on pulse KONP, which is instantaneously generated when the key press starts, are sent to the key assigner in a time-sharing manner for each channel according to predetermined time-sharing timing. It is output from 11. An example of time division channel timing is shown in FIG. 3. Each channel timing 1~
12 is formed in synchronization with clock pulse _φ2 .
Two subchannel timings ₁ and ₂ are formed by dividing the time slot of each channel timing into two in synchronization with a clock pulse φ1 having twice the frequency of the clock pulse φ2. These subchannel timings 1 and 2 correspond to the first and second sequences in the interpolation described above. That is, in this embodiment, the time slot of one channel is divided into two, and the segment waveforms of the first series (subchannel 1) and the second series (subchannel 2) for interpolation are read out in a time-division manner.
CH1 to CH12 are channel timing signals, which are generated corresponding to channel timings 1 to 12, respectively. Each clock pulse φ ₁ , φ ₂ and signal
CH1 to CH12 are generated from the timing signal generator 12 and supplied to predetermined circuits in the electronic musical instrument shown in FIG. 2, respectively. The phase generator 13 specifies the musical sound waveform to be read out from the waveform memory 14 and reads out this musical sound waveform according to the musical sound frequency to be generated. A total of 24 time slots are generated in a time-division manner for each subchannel 1 to 12 of subchannels 1 and 2. The phase generator 13 receives the key code KC key-on pulse from the key assigner 11.
KONP, key-on signal KON is given,
These specify the musical tone frequency to be generated and the start timing of sound generation. The waveform memory 14 stores a plurality of sets of the above-mentioned attack section full waveform and a plurality of segment waveforms corresponding to each timbre. Specifically, as is well known, each waveform is divided into a plurality of sample points, and the waveform data corresponding to each sample point (for example, waveform amplitude data of the sample point) is stored. An example of the memory map in this waveform memory 14 is shown schematically in FIG. Regarding timbre A, waveform data of all waveforms of the attack section are stored in the address range from address A ₀ to A ₁ -1, and from address A ₁
The waveform data for one period of the first segment waveform SEG1 is stored in the address range from A ₂ -1,
Below, each segment waveform in the specified address range
SEG2, SEG3, etc. are stored sequentially. The same applies to the other tones B, C, and so on. A ₀ , A ₁ , A ₂ ..., B ₀ , B ₁ , B ₂ ..., C ₀ , C ₁ , C ₂ written in the figure
... is the start address of each address range,
A ₀ , B ₀ , C ₀ ... are the start addresses of the attack section,
A ₁ , B ₁ , C ₁ . . . are the start addresses of the first segment waveform SEG1, and A ₂ , B ₂ , C _{2 .} . . are the start addresses of the second segment waveform SEG2.
As an example, one period waveform is sampled at 256 sample points, and the maximum number of periods of the entire attack portion waveform is 256 periods. As shown in the figure, the number of cycles of the entire waveform of the attack section differs depending on the tone. It should be noted that each sample point within one period (256 in total) can be expressed by just an 8-bit binary code. Therefore, each sample point within this one cycle is specified by the lowest 8 bits of address data MADR, and each start address A ₁ , A ₂
. . , B ₁ , B ₂ . . ., C ₁ , C ₂ . Returning to FIG. 2, the timbre selection circuit 15 outputs timbre selection information TC and supplies it to the phase generator 13, waveform memory 14, crossfade control circuit 16, and envelope generator 17. The crossfade control circuit 16 is for generating an interpolation function for weighting musical waveform signals of two series (subchannels) related to the same sounding channel with opposite characteristics. Corresponding to the configuration of the present invention, the waveform switching control means 200 that functions to temporally switch the segment waveform to be read from the waveform memory 14 corresponds to the crossfade control circuit 16 and the phase generator 13 block. A part that includes some circuits included in the phase generator 13 and functions as a random control means 201 that randomly controls the switching order of segment waveforms by the waveform switching control means 200 is included in the block of the phase generator 13. ing. Also included in the block of phase generator 13 is readout means 28 . An attack end signal ATEND indicating that reading of all waveforms of the attack section has been completed and an inverted attack signal indicating that reading of the attack section is not being performed are applied from the phase generator 13 to the crossfade control circuit 16. When the crossfade control circuit 16 confirms that the waveform readout of the attack section is completed based on these signals, it starts generating a predetermined interpolation function. The interpolation function is output from the circuit 16 as crossfade curve data CF, and is applied to a multiplier 18 for weighting calculation. Also, the waveform switching command signal WCHG is applied to circuit 1.
6 and is applied to the phase generator 13. The multiplier 18 for weighting calculation and the adder 20 which adds the output of the multiplier 18 to a signal delayed by one period of clock pulse φ ₁ in the delay circuit 19 and a signal not delayed are part of the interpolation means. be. Musical waveform data is read out in a time-division manner from the waveform memory 14 in accordance with each sub-channel timing for each channel, and similarly, musical waveform data is read out in a time-division manner in synchronization with each sub-channel timing for each channel from the crossfade control circuit 16. The crossfade curve data CF is read out. Therefore, multiplier 1
In step 8, the musical waveforms read out in a time-division manner corresponding to each subchannel of each channel are respectively weighted according to the corresponding crossfade curve data CF (ie, interpolation function). 1
An adder 20 adds weighted musical waveform data of two subchannels regarding one musical tone generation channel. That is, when the tone waveform signal of the first subchannel is delayed and inputted from the delay circuit 19 to the adder 20, the tone waveform data of the second subchannel of the same channel is inputted to the adder 20.
It is designed to join the other inputs of 0. Thus, the time slot of one channel (time slot corresponding to one period of clock pulse _φ2 )
In the latter half of the process, the two weighted tone waveform data for that channel are mixed. The envelope generator 17 is connected to the key assigner 11
An amplitude envelope waveform signal is generated for each channel in a time-division manner according to the key-on signal KON and the key-on pulse KONP given from the channel. This envelope waveform maintains a constant level while the key is being pressed, and exhibits a decay envelope characteristic in response to the key being released. Since all the waveforms of the attack part stored in the waveform memory 14 have been given attack envelope characteristics in advance, there is no need for the envelope generator 17 to give them attack envelope characteristics. The outputs of the adder 20 and the envelope generator 17 are input to a multiplier 21, and amplitude envelopes corresponding to key presses and key releases are applied to the musical waveform data of each channel in a time-division manner. The output of the multiplier 21 is sent to latch circuits 22-1 to 22- which are provided in parallel corresponding to each channel.
12 data inputs. Each latch circuit 2
The latch control inputs L from 2-1 to 22-12 include
Channel timing signal CH1 corresponding to each
~AND circuits 23-1 to 23 that perform AND logic between CH12 and the inverted signal _φ2 of clock pulse _φ2
-12 outputs are given respectively. In this manner, the output of the multiplier 21 is latched into the corresponding latch circuits 22-1 to 22-12 in the latter half of the time-division time slots of each channel. As mentioned above, the adder 20 adds the two weighted tone waveform data for each channel in the latter half time slot of each channel timing 1 to 12 (timing of subchannel 2), so the summation result corresponds to the summation result. The data is latched in each latch circuit 22-1 to 22-12. In this way, the time division of the tone waveform data of each channel is canceled. The outputs of the latch circuits 22-1 to 22-12 are input to the latch circuits 24-1 to 24-12.
Pitch synchronization pulses PSP1 to PSP12 outputted from the phase generator 13 are applied to the latch control inputs L of each of the latch circuits 24-1 to 24-12. The pitch synchronization pulses PSP1 to PSP12 are pulses synchronized with the frequencies of musical tones assigned to each channel, and by latching the musical waveform data accordingly, aharmonic clock components are removed. Each latch circuit 24-1 to 24-
The outputs of 12 are given to an adder 25 and summed, and then converted to an analog signal by a digital/analog converter 26 and sent to a sound system 27. Next, details of each part in FIG. 2 will be explained. FIG. 5 shows an example of the phase generator 13.
A portion indicated by the reference numeral 28 corresponds to a reading means for repeatedly reading one cycle of waveform data. The key code KC of each channel given in a time-sharing manner from the key assigner 11 is set in the latch circuit 29.
latch circuits 29-1 to 29-12 corresponding to each channel according to channel timing signals CH1 to CH12.
are respectively latched. The variable oscillators 30-1 to 30-12 provided independently for each channel are
Latch circuits 29-1 to 29-1 corresponding to each
Note clock pulses NC1 to NC12 corresponding to the musical tone frequencies of the pressed keys assigned to each channel are generated in accordance with the key code KC given from 2. Note clock pulse NC1~NC12
is applied to a time division control circuit 31, sampled and multiplexed in a time division manner according to channel timing signals CH1 to CH12, and a time division multiplexed output is taken out via a line 32. An example of the time division control circuit 31 is as shown in FIG.
Note clock pulses NC1 to NC12 of each channel are input to set input S 3-12, respectively. The outputs Q of the flip-flops 33-1 to 33-12 and channel timing signals CH1 to CH12 are input to the AND circuits 34-1 to 34-12, respectively, and the outputs are multiplexed by the OR circuit 350 and guided to the line 32. At the same time, they are returned to the reset inputs R of the corresponding flip-flops 33-1 to 33-12. Further, the outputs Q of the flip-flops 33-1 to 33-12 are outputted as pitch synchronizing pulses PSP1 to PSP12, and are applied to the latch circuits 24-1 to 24-12 in FIG. 2 as described above. Flip-flops 33-1 to 33
-12 is set at the rising edge of the signal at the set input S, and reset at the falling edge of the signal at the reset input R. FIG. 7 shows an example of input/output signals of each part in FIG. 6. As is clear from the figure, note clock pulses NC1 to NC12 of keys assigned to each channel are asynchronous to the channel timing, and these pulses NC1 to NC12 are asynchronous to the channel timing.
At the rising edge of NC12, flip-flops 33-1 to 33-12 are set to enable the corresponding AND circuits 34-1 to 34-12, and then corresponding to the first channel timing signals CH1 to CH12, the AND circuits 34-1 to 34-12 are enabled. 1 to 34-12, and the flip-flops 33-1 to 33-12 are reset at the falling edge of this output pulse. Then, the notebook clock pulse NC
A new note clock pulse synchronized with the channel timing signals CH1 to CH12 at the same frequency as those of CH1 to NC12 is applied to each AND circuit 34-1 to 34-.
Obtained from 12. In this way, a note clock pulse corresponding to the musical tone frequency of the key assigned to each channel (an integral multiple thereof) is outputted to the line 32 in accordance with the time division timing of the corresponding channel. Returning to FIG. 5, the note clock pulses of each channel applied to the line 32 are input to a counter 38 consisting of an adder 35, a gate 36, and a shift register 37, and the number of pulses is counted in a time-division manner for each channel. Ru. shift register 37
has 24 stages/8 bits, and is shift-controlled by a clock pulse _φ1 synchronized with the subchannel timing. The output of shift register 37 is provided to adder 35 and summed with the note clock pulse on line 32. The addition output is stored in shift register 37 via gate 36. The 24 stages of the shift register 37 correspond to 2 subchannels of each of the 12 channels.
Count values for one channel are stored in two stages (corresponding to two subchannels), respectively. The gate 36 is instantaneously closed by the key-on pulse KONP just before the start of sound generation, and the memory of two corresponding stages in the shift register 37 is cleared. Since the shift register 37 has a capacity of 8 bits per stage, the counter 38 has a modulus
256 counts are performed in time division for 24 channels (actually 12 channels). The output of the gate 36 is taken out as the count output of the counter 38, and is applied to the waveform memory 14 as the lowest 8 bits of the address data MADR. By the count output of the counter 38, each sample point of a one-period waveform consisting of 256 sample points can be sequentially read out. Count is notebook clock pulse NC
1 to NC12, the reading is performed in accordance with the musical tone frequency to be generated. The address data MADR for reading the waveform memory 14 is N+8 bits (however, N>8),
As described above, the lowest 8 bits sequentially designate sample points within one cycle of the waveform, and the upper N bits designate one cycle of the waveform. The upper N bits of address data for specifying the waveform are given from the start address generation circuit 40 via the adder 41. The start address generating circuit 40 generates the start addresses A ₀ , B ₀ , C ₀ . . . for all waveforms of the attack section mentioned above and the start addresses A ₁ , A _{2 .} . . for each segment waveform. An attack section period number counter 39 is provided to specify each one-cycle waveform within the entire attack section waveform, and the output of this counter 39 and the attack section start addresses A ₀ , B ₀ , C ₀ . . . An adder 41 is provided to specify the absolute address of each one-cycle waveform in the entire waveform of the attack section by adding and synthesizing the waveforms. The hardware configuration of the attack part period number counter 39 is the same as that of the counter 38 described above, and the adder 43,
It includes a gate 44 and a shift register 45.
This counter 39 counts the carry-out signal CRY from the most significant bit of the adder 35 in a time-division manner for each channel. This carry-out signal CRY is generated every time a certain channel of the counter 38 counts 256 note clock pulses (that is, every time one cycle of the waveform is read), and by counting this, the number of cycles of the attack section can be counted. can do. The output of the counter 39 is applied to a gate 42, and the gate 42 is opened only during reading of all waveforms in the attack section by an attack signal AT, which will be described later.
1 is given the counter output. The lowest 8 bits of the N-bit start address data generated by the start address generation circuit 40 are input to the other input of the adder 41. Of the N-bit start address data, the 8-bit output data of the adder 41 is located below the most significant N-8 bits of data that were not input to the adder 41, and both data are used to determine the most significant address data MADR. The upper N bits are configured. The count value of the counter 39 indicates the number of cycles counted from the first cycle of the entire waveform of the attack section, and on the other hand, the start address A ₀ ,
B ₀ , C ₀ . . . indicate the first absolute addresses of all waveforms in the attack portion in the waveform memory 14. Therefore, by adding the two, it is possible to specify the first absolute address for each period of the entire waveform of the attack section (that is, specify each one-period waveform). The attack end detection circuit 46 counts the carryout signal CRY given from the counter 38 and checks whether reading of all waveforms of the attack portion has been completed, an example of which is shown in FIG. In FIG. 8, the attack section period number memory 47
The number of cycles of the entire waveform of the attack section is stored for each timbre, and is read out from the number of cycles data ATN in accordance with the timbre selection information TC. The counter 52, which consists of a subtracter 48, a gate 49, a selector 50, and a 24-stage/8-bit shift register 51, counts down the frequency every time the attack waveform is read out for one cycle, and counts down the frequency on a time-division basis for each channel. Perform the down count. The selector 50 selects the memory 47 when the key-on pulse KONP occurs.
The cycle number data ATN read out from the input signal ATN is selected via the B input and taken into the shift register 51. At other times, the data added to the A input of the selector 50 is selected from the final stage of the shift register 51 via the subtracter 48, and the data added to the A input of the selector 50 is selected from the final stage of the shift register 51
given to. A carry-out signal CRY output from adder 35 in FIG. 5 is input to gate 49. Gate 49 is enabled during attack by attack signal AT and carry out signal
Give CRY to the subtractor 48. In the subtractor 48,
When the carry-out signal CRY is applied, 1 is subtracted from the output data of the shift register 51. In this way, data indicating the number of cycles of the entire attack section waveform is initially entered into the shift register 51, and from then on, the data is subtracted by 1 each time one cycle of the attack section waveform is read, and finally reading of the entire attack section waveform is completed. When the data is all "0". The output of the counter 52 is taken out from the selector 50 and applied to an all "0" detection circuit 520. The all “0” detection circuit 520 is the selector 50
It detects whether the count output data given from is all "0" or not, and outputs a signal "1" when all "0". The output signal of this detection circuit 520 is output as an inverted attack signal, and the signal inverted by the inverter 53 is the attack signal.
Output as AT. Therefore, during the attack, the attack signal AT is "1" and the inverted attack signal is "0", but when the attack is completed, the AT is inverted and becomes "0" and becomes "1". Delay circuit 5
4 sets a signal delay of one cycle of time-division channel timing using a clock pulse _{φ 2 ×} 12 having a period 12 times that of the clock pulse φ 2, and delays the attack signal AT to output the AND circuit 55.
give to An inverted attack signal is given to the other input of the AND circuit 55, and when the signal switches from "0" to "1", it is activated during one time slot (two subchannel time slots) corresponding to that channel. The output of the AND circuit 55 becomes “1”, which is the attack end signal.
Output as ATEND. Note that when the attack is completed, the gate 49 is closed due to the attack signal AT being "0", and no further down-counting is performed. Therefore, the count value of the counter 52 maintains all "0" except at the time of attack. The example of the operation shown in FIG. 8 for one channel is shown in FIG. 11a. Returning to FIG. 5, start address generation circuit 4
0 selects a set of start addresses in response to tone selection information TC, generates a start address for the attack section in response to key-on pulse KONP, and then generates a start address for each segment waveform in response to waveform switching command signal WCHG. It is generated by switching over time in a random order. This random control is carried out by the included random control means 20.
1. An example of this start address generation circuit 40 is shown in FIG. In FIG. 9, the start address memory 56
There are multiple sets of start addresses A ₀ , A 1 , A 2 ..., B ₀ , B ₁ , _{B 2 ...} , corresponding to each tone A, _B , C...,
C ₀ , C ₁ , C ₂ ..., (that is, the start address A ₀ , B ₀ , C ₀ ... of the attack part and the start address A ₁ , A ₂ ..., B ₁ , B ₂ ..., C ₁ of each segment waveform) ,C ₂
...) are stored in advance, and a set of start addresses (for example, A ₀ , A ₁ , A ₂ . . . for timbre A) are selected according to the timbre selection information TC. The random control means 201 includes a random data generation circuit 57 that generates random number data, and a selector that selects output data of the random data generation circuit 57 when the waveform switching command signal WCHG is "1" (that is, at the waveform switching timing). 58
, a shift register 59 for storing the random number data selected by the selector 58 for each subchannel of each channel, and a gate 60 for controlling the storage of the shift register 59. Shift register 59 has 24 stages and is shift controlled by clock pulse _φ1 . selector 5
Random number data RD generated from the random data generation circuit 57 is given to the A input of 8, and the output of the shift register 59 is given to the B input. Attack end signal ATEND and waveform switching command signal
When WCHG is applied to the OR circuit 61 and its output is "1", the selector 58 selects the A input,
When it is “0”, the B input is selected. The output of selector 58 is applied to gate 60, and the output of gate 60 is applied to shift register 59 and start address memory 56. The start address memory 56 stores a selected set of start address data (for example, A ₀ , A ₁ , A ₂
...) is read out via the gate 60 according to the value of the data applied to the address input. That is, when the value of the data given from the gate 60 is "0", the start address _A0 of the attack section is read out, and when it is "1", the first segment waveform SEG1 is read out.
The start address _A1 of the second segment waveform SEG2 is read out, and when it is "2", the start address _A2 of the second segment waveform SEG2 is read out. In this way, the start address data read out from the start address memory 56 specifies the waveform to be read out from the waveform memory 14 (FIG. 2). The random data generation circuit 57 randomly generates data of a value corresponding to the number of each segment waveform. For example, if there are eight segment waveforms SEG1 to SEG8 for each tone, the data of values "1" to "SEG8" are generated for each timbre.
Generate random number data RD within the range of "8". The gate 60 is enabled by a signal obtained by inverting the key-on pulse KONP, and is always open when the key-on pulse KONP is not generated.
9 and the start address memory 56. The gate 60 closes at the channel timing when the key-on pulse KONP is generated, and the stored contents of the shift register 57 corresponding to the channel are cleared. The waveform switching control is performed in a time-division manner in a total of 24 time slots for each subchannel of channels 1 to 12. The operation for one channel will be described below. First, as described above, when the key-on pulse KONP is generated, the gate 60 is closed, and the contents of the two stages of the shift register 59 corresponding to the channel are all cleared to "0". As will be described later, the waveform switching command signal WCHG is not generated during the attack, and the attack end signal ATEND is also "0", so the selector 58 always selects the B input. Therefore, the contents of the shift register 59 cleared at the timing of the key-on pulse KONP are transferred to the B input of the selector 58 and the channel timing 1 via the gate 60.
Cycles in synchronization with the same channel timing with a cycle time delay. Therefore, the value of the data applied from the gate 60 to the start address memory 56 remains "0", and in response, data indicating the start address (for example, A ₀ ) of the attack section is read out. When the attack is completed, the attack end signal ATEND is generated from the attack end detection circuit 46 of FIG. 8 only once at the channel timing (time slot for two subchannels) as described above. As a result, the selector 58 selects the random number data RD via the A input, and the shift register 59 selects the random number data RD.
Store in. In this case, if the change timing of the random number data RD generated from the random data generation circuit 57 is later than the one channel timing, random number data RD of the same value is stored corresponding to the two subchannels, but this random number data
If the change timing of RD is synchronized with the subchannel timing, random number data RD of different values are stored corresponding to the two subchannels. Either one can be used. After the attack is completed, random numbers (for example, "1" and "3") are set corresponding to subchannels 1 and 2. As a result, from the start address memory 56, each subchannel 1,
The start address data of the segment waveforms corresponding to the values set corresponding to 2 are respectively read out. This state is maintained until the next waveform switching command signal WCHG is applied. Furthermore, gate 60
FIG. 11b shows an example of a change in the value of data for one channel (two subchannels) outputted from the subchannel. In the example shown in FIG. 11b, it is assumed that the change timing of the random number data RD is synchronized with the subchannel timing, and when the attack end signal ATEND is generated, random number data RD of different values (for example, "1 ”
and "3") are selected and stored. The waveform switching command signal WCHG is generated by being alternately switched in correspondence to one of two subchannels related to one channel, as will be described later. As shown in FIG. 11b, first, it occurs corresponding to subchannel 1, then it occurs corresponding to subchannel 2, and thereafter, it occurs alternately. Therefore, in the circuit shown in FIG. 9, the random number data RD selection operation in response to the waveform switching command signal WCHG is performed for one of the two subchannels. Every time the waveform switching command signal WCHG is generated alternately corresponding to one of subchannels 1 and 2, the random number data RD at that time is selected via the A input of the selector 58, and shifted corresponding to that subchannel. Stored in register 59. As a result, the start address memory 5
Starting address data of the segment waveform corresponding to the random value stored in the shift register 59 corresponding to each subchannel 1 and 2 is read from 6 and 6, respectively. In this way, the switching order of segment waveforms is randomly controlled. Next, the crossfade control circuit 16 will be explained with reference to FIG. The counting means 73 is for generating a time function for setting a time change in weighting, and includes a first counter 73A and a second counter 73B. Both counters 73A, 73B include adders 74A, 74B, gates 75A, 75B, and 12-stage shift registers 76A, 76B controlled by clock pulse φ ₂ , respectively, and the outputs of shift registers 76A, 76B are added together. It is possible to perform a counting operation on a time-division basis for each channel by circulating through circuits 74A, 74B and gates 75A, 75B. The first counter 73A is for counting the number of times segment waveforms are switched. The change rate memory 77 stores change rate data corresponding to the number of times of switching in advance for each tone, and contains tone selection information TC.
One set of change rate data is selected according to the change rate data, and one change rate data DT is read out from the selected data according to the number of switchings counted by the first counter 73A. In addition, gate 7
The output of 5A is taken out as the count output of the first counter 73A and input to the memory 77.
The first counter 73A and the change rate memory 77 correspond to counting rate control means. The second counter 73B counts from a first predetermined value (for example, 0) to a second predetermined value (for example, the maximum value) at a rate according to the change rate data DT read from the memory 77. It is. Change rate data DT is input to adder 74B, and second counter 73B accumulates this data DT at predetermined time intervals. Gate 75B is enabled at non-attack times by the inverted attack signal. Therefore, the count content of the counter 73B is "0" during the attack.
is cleared, and starts counting the data DT when the attack ends. The count output of the second counter 73B is taken out from the gate 75B and input to a function conversion circuit 78 consisting of an exclusive OR circuit. This function conversion circuit 78 converts the lower n bits of the n-bit count output.
-1 bit is input to the exclusive OR circuit separately, the most significant bit MSB is input commonly to each exclusive OR circuit,
When the MSB is "0", the lower n-1 bits are passed through as is, but when it is "1", the lower n-1 bits are inverted and output. In this way, the count value increases from the minimum value 0 to the maximum value ²ⁿ , turns around at the 2n ^-1 position, increases from 0 to 2n ^-1 , and then from 2n ^-1 to 0.
Convert to a triangular wave-like function that decreases to . The output of the function conversion circuit 78 is used as the basic interpolation function IPF2 for the second series (subchannel 2). The inversion circuit 79 inverts each bit of this interpolation function IPF2 to form a function with inverse characteristics, and this function with inverse characteristics is used as the basic interpolation function IPF1 for the first series (subchannel 1). An example of these interpolation functions IPF1 and IPF2 is shown in Figure 11c.
is shown. Note that during the attack, the output of the second counter 73B is all bits "0", so the output of the function conversion circuit 78 is all bits "0", and the value of the second series interpolation function IPF2 reaches the minimum value (0). ) is maintained, and the value of the first series interpolation function IPF1 is maintained at its maximum value. The selector 80 is for time-division multiplexing the interpolation functions IPF1 and IPF2 in accordance with the timing of each subchannel 1 and 2, and is connected to the A input.
When IPF2 is added and IPF1 is added to the B force input and clock pulse φ ₂ is “1” (at the time slot of subchannel 1), IPF1 of the B input is selected, and when φ ₂ is “0” (subchannel 2 time slot) select IPF2 of A input. The switching control means 81 controls the waveform switching operation in the start address generation circuit 40 shown in FIG. It includes an all "0" detection circuit 82 for detecting whether or not the signal is "0", and an AND circuit 83 to which the output of this detection circuit 82 and an inverted attack signal are input. AND circuit 83 is a signal
This is enabled by AT at times other than attack, and outputs the output signal "1" of the all "0" detection circuit 82 as the waveform switching command signal WCHG. Of the two subchannel interpolation functions IPF1 and IPF2, the one that gradually decreases over time with a negative slope has all bits “0”.
, the output of the all "0" detection circuit 82 becomes "1" at the timing corresponding to that subchannel, and a waveform switching command signal WCHG is generated in response to this. Since the slopes of the interpolation functions IPF1 and IPF2 for both subchannels are switched every interpolation interval, the waveform switching command signal WCHG is generated by switching alternately corresponding to one subchannel every time one interpolation is completed. . An example of generation of the waveform switching command signal WCHG corresponding to the interpolation functions IPF1 and IPF2 of FIG. 11c is shown in FIG. 11b. The interpolation functions IPF1 and IPF2 outputted from the selector 80 in a time-division manner have temporally linear characteristics, but the crossfade curve memory 84, which corresponds to interpolation function storage means, can change these interpolation functions to arbitrary characteristics. It is provided for the purpose of conversion. For example, various interpolation characteristic curves (weighting curves) as shown by solid lines in FIG. The selected interpolation characteristic curve is selected as the interpolation function IPF1, IPF from the selector 80.
2 is read out as the address.
As mentioned above, the interpolation function IPF1 of both subchannels,
Since IPF2 (so to speak, this is a basic interpolation function) has inverse characteristics, the reading direction of the memory 84 is mutually opposite between both subchannels (when one is in the positive direction, the other is in the opposite direction), and is mutually A curve with an inverse characteristic is read out from the memory 84 in a time-division manner. For example, when an interpolation characteristic curve as shown by a solid line in FIG. 12 a to d is read out corresponding to one subchannel, an interpolation characteristic curve as shown by a broken line in the same figure corresponds to the other subchannel. Read out. The interpolation characteristic curve data corresponding to each subchannel for each channel read out in a time-divisional manner from the memory 84 as described above is given to the multiplier 18 in FIG. 2 as crossfade curve data CF, and its The corresponding segment waveform data is weighted (amplitude control) according to the characteristics. Note that since the functions IPF1 and IPF2 are used as address signals for the memory 84, the counting means 73 and the function conversion circuit 78 correspond to address generation means for the memory 84. By using the memory 84 in this way, the interpolation characteristics can be set to any curve. In addition, since two series of interpolation characteristics are obtained by reading arbitrary interpolation characteristic curves in opposite directions, it is possible to set any interpolation characteristic curve, but as a result (two series of interpolation in synthesis)
Symmetrical interpolation is always performed, and smooth interpolation without bias can be performed. Incidentally, to explain the characteristics shown in Fig. 12, a indicates that the volume level increases at the midpoint of interpolation (the midpoint of musical waveform change), and b indicates that the waveform changes greatly at the beginning, but midway through, the volume level increases. The changes are gradual, and then there is a big change again at the end. In c, the waveform changes slowly at the beginning and end, and changes greatly in the middle. d has a waveform that changes while fluctuating. Returning to FIG. 10, the all "0" and all "1" detection circuit 85 outputs the switching synchronization signal CHGS in synchronization with the waveform switching timing, and the output of the function conversion circuit 78, that is, the interpolation function
Input IPF2 and detect whether the value is all bits "0" or all bits "1". As is clear from Figure 11c, the interpolation function changes in a triangular waveform.
At the upper peak of IPF2, all bits are "1", and at the lower peak, all bits are "0", which corresponds to the waveform switching timing, that is, the timing of the waveform switching command signal WCHG. Switching synchronization signal CHGS corresponds to when all bits are “0” or when all bits are “1”
becomes “1”. This signal CHGS becomes "1" in the time slots of both subchannels, that is, in the time slots of one channel corresponding to one cycle of clock pulse _φ2 . This signal CHGS is delayed by one cycle of the time division channel timing in accordance with the clock pulse φ ₂ ×12 in the delay circuit 86, and is applied to the adder 74A of the counter 73A via the gate 87. The output of the adder 74A is applied to a 12-stage shift register 76A via a gate 75A, delayed by one cycle of time division channel timing, and returned to the input of the adder 74A. The gate 75 is controlled by a signal obtained by inverting the attack end signal ATEND.
It is instantaneously closed only when ATEND occurs, and the memory of the shift register 76A regarding the corresponding channel is cleared. The output of gate 75A is applied to change rate memory 77 and all "1" detection circuit 88 as described above. All “1”
The detection circuit 88 outputs a signal "1" when all bits of the count value of the counter 73A reach "1", that is, the maximum value. This output is inverted by an inverter 89 and is applied to the control input of the gate 87. The counter value of the counter 73A remains at its maximum value during the attack, and the gate 87 is closed. When the attack is completed, the attack end signal is sent.
When the count value is cleared by ATEND,
The output of the all "1" detection circuit 88 becomes "0" and the gate 87 is opened. Thereafter, each time the switching synchronization signal CHGS is generated, the count value of the counter 73A increases, and the number of waveform switching is counted. Then, the count value is the maximum value (all “1”)
When this happens, the gate 87 closes and the counting operation stops. Note that the delay circuit 86 is provided to delay the timing at which the signal CHGS is input to the counter 73A by the time delay between the input and output of the shift register 76A. Switching synchronization signal
An example of the number of switching times counted by CHGS and counter 73A is shown in FIG. 11c. As described above, the change rate memory 77 reads out predetermined change rate data DT in response to the count value of the counter 73A. This rate of change data
The count value increase rate of the second counter 73B is determined by the value of DT, and the slopes of the interpolation functions IPF1 and _IPF2 are determined. t ₂ , t ₃ , t ₄ ...) are determined.
The memory 77 arbitrarily stores change rate data DT according to the number of waveform switching (that is, for each interpolation interval).
can be set, so the length of each interpolation interval
t ₁ , t ₂ , t ₃ , t ₄ . . . are not uniform and can be set completely arbitrarily. Note that once the first counter 73A reaches the maximum value, it is maintained thereafter, so that the change rate memory 77 continuously reads out the change rate data DT corresponding to the maximum value. Of course,
Like the other counters, the first counter 73A performs the counting operation on a time-division basis for each channel, so the above-mentioned counting of the number of waveform switching and reading of the change rate data DT are performed on a time-division basis for each channel. In the embodiment described above, as shown in FIG. 1b, the basic interpolation functions IPF1 and IPF2 (address signals of the memory 84) change in a triangular waveform, and the two segment waveforms are always weighted. However, the present invention is not limited to this, and the two waveforms may be weighted only during the transition period of waveform switching. Further, in the above embodiment, two streams (subchannels) for interpolation are time-divisionally processed, but they may be processed in parallel. In addition, in Fig. 2, two series of musical sound waveform signals weighted for interpolation are digitally added in an adder 20 and then D/A converted, but each series is D/A converted independently and then mixed or independent. You may also choose to pronounce it. Further, although the waveform memory 14 shown in FIG. 2 stores the amplitude value data of each sample point of the waveform as is, the present invention is not limited to this, and various storage methods may be employed. For example, the amplitude data of each sample point can be obtained by storing the difference values of the amplitude values between each sample point, reading them out and then accumulating them, or There are various methods, such as storing the data in parts and performing arithmetic processing after reading it out to obtain the real number of the amplitude value of each sample point. Note that in the above example, the segment waveform (SEG
1, SEG2, ...), one cycle of the waveform is stored as is in the waveform memory 14, but the present invention is not limited to these, and only half a cycle of the waveform may be stored.
In this case, positive and negative polarities may be added alternately to the read half-cycle waveform to form a one-cycle waveform. Further, the segment waveform stored in the waveform memory 14 is not limited to one period waveform, but may be a waveform for a plurality of periods (for example, two periods). In the above embodiment, the attack portion of the musical tone signal is generated by storing the continuous multi-cycle waveform as it is in the waveform memory 14 and reading it out as is. Also, according to the present invention, a plurality of segment waveforms may be stored in the waveform memory 14, and these may be randomly switched and read out, and the above-mentioned interpolation process may be performed at the time of waveform switching to generate musical tone signals. Of course. In FIG. 9, random data generation circuit 57
The range of random numbers generated may be varied depending on the tone color or the like. In that case, it is preferable to configure the random data generation circuit 57 as shown in FIG. The random data generation circuit 57 includes a programmable random number generator 62 in which the range of random numbers to be generated can be set, and a random number range designation memory 6 that specifies the range of random numbers to be generated by the random number generator 62. The random number range designation memory 63 reads out upper limit designation data UL that designates the upper limit value of random number data to be generated in accordance with the tone color selection information TC given to the address input, and lower limit designation data LL that designates the lower limit value. The programmable random number generator 62 generates random number data RD within the range of the given upper limit specification data UL and lower limit specification data LL. For example, the programmable random number generator 62 is a fixed random number generator 64 whose random number range to be generated is fixed to a maximum range.
, a comparator 65 and a latch circuit 66. The fixed random number generator 64 generates random number data RD' at changing timing fairly quickly. Comparator 65
compares the upper limit designation data UL and the lower limit designation data LL with this random number data RD', and outputs a signal "1" when LL≦RD'≦UL holds true. The latch circuit 66 outputs random number data generated from the fixed random number generator 64 when the signal "1" is given from the comparator 65.
Latch RD′. In this way, the latch circuit 66 selectively latches only the random number data RD' within the range of the upper and lower limit designation data UL and LL, and outputs this as random number data RD to the A input of the selector 58 in FIG. Given. Note that the range of random numbers may be variably set in accordance with not only the tone color selection information TC but also key touch detection information, the pitch or range of the musical tone to be generated, or operator control by the performer. In that case, key touch data, pitch data, control data from the operator, etc. may be input into the random number range specifying memory 63 at an address, as shown by the broken line. The random data generation circuit 57 shown in FIG. 13 may be further modified as shown in FIG. 14 to switch the range of random numbers to be specified as time elapses from the start of sound generation of musical tones. A circuit consisting of a 24-stage shift register 67, an adder 68, and a gate 69 that is shift-controlled by a clock pulse _φ1 is a counter for individually counting the waveform switching command signal WCHG for each subchannel of each channel. , when the key-on pulse KONP is generated, the gate 69 is closed to clear the count contents, and thereafter, the count is incremented by one every time the signal WCHG is generated. Count data CT output from gate 69 is applied to the address input of random number range designation memory 63. The random number range designation memory 63 outputs upper and lower limit designation data UL and LL that designate different random number ranges depending on the value of the count data CT. count data
CT value and data UL output from memory 63,
An example of the relationship with LL is shown in the table below.

〔Effect of the invention〕

As described above, according to the present invention, when the time change of the tone color is realized by temporally switching the musical sound waveform, the switching order of the musical sound waveform is randomly controlled, so that the aspect of the time change of the tone color is different from each other. The pronunciation will be randomly different for each pronunciation opportunity. Therefore, it becomes possible to realize a change in timbre over time in a manner similar to the change in timbre over time in a natural musical instrument.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram for explaining the principle of musical tone signal generation in an embodiment of the present invention, and FIG. 2 is an electrical block diagram showing an embodiment of an electronic musical instrument to which the musical tone signal generation device according to the present invention is applied. FIG. 3 is a timing chart showing an example of a clock pulse and channel timing signal and an example of time-division channel timing used in the same embodiment, FIG. 4 is a diagram showing an example of a memory map of the waveform memory in the same embodiment, and FIG. FIG. 6 is an electrical block diagram showing an example of the phase generator shown in FIG. 2, FIG. 6 is an electrical block diagram showing an example of the time division control circuit shown in FIG. 8 is an electrical block diagram showing an example of the attack end detection circuit of FIG. 5, FIG. 9 is an electrical block diagram showing an example of the start address generation circuit of FIG. 5, and FIG. Electrical block diagram showing an example of the crossfade control circuit of FIG. 2, No. 11
The figure is a timing chart showing an example of each part signal of Fig. 8, Fig. 9, and Fig. 10, and Fig. 12 is a timing chart showing various interpolation functions (crossfade curve ), FIG. 13 is an electrical block diagram showing an example of the random data generation circuit in FIG. 9, and FIG. 14 is a block diagram showing yet another embodiment of the random data generation circuit. FIG. 15 is a block diagram showing another embodiment of means for waveform switching control related to the random control means shown in FIG. 9;
16 is a block diagram showing another embodiment of the selector selection control circuit shown in FIG. 15, FIG. 17 is a block diagram showing another embodiment of the random control means shown in FIG. 9, and FIG. 18 is a block diagram showing another embodiment of the random control means shown in FIG. 19 is a general block diagram of an electronic musical instrument showing another embodiment of the present invention, FIG. 19 is a block diagram schematically showing an example of the musical sound waveform forming circuit of FIG. 18 configured by a harmonic synthesis method, and FIG. 20 1 is a block diagram schematically showing an example of a musical sound waveform forming circuit constructed using a digital filter method. 10...keyboard, 11...key assigner, 13...
...Phase generator, 14...Waveform memory, 16...Crossfade control circuit, 28...Reading means, 2
00...Waveform switching control means, 201...Random control means, 57...Random data generation circuit, 6
2...Programmable random number generator, 63...Random number range specification memory, 71...Sequence control means,
205...Sequence memory, 100...1 period phase data generation circuit, 101...Tone waveform forming circuit, 102...Parameter memory, 103...Segment number data generation circuit.

Claims (1)

[Scope of Claims] 1. A waveform storage means that stores waveform data of a plurality of different musical sound waveforms; a reading means that reads out waveform data of a predetermined musical sound waveform from the waveform storage means according to a musical sound frequency to be generated; A musical tone signal generating device comprising: a waveform switching control means for temporally switching musical waveforms to be read from a waveform storage means; and a random control means for randomly controlling the order in which the musical waveforms are switched by the waveform switching control means. 2. The random control means includes a random data generation means for generating random number data, and a selection means for selecting output data of the random data generation means at a waveform switching timing instructed by the waveform switching control means, 2. The musical tone signal generating device according to claim 1, wherein said waveform switching control means instructs a musical waveform to be read from said waveform storage means in accordance with the value of the random number data selected by said selection means. 3. The random data generating means includes a random number generator in which a range of random numbers to be generated can be set, and a random number range specifying means for specifying a range of random numbers to be generated by the random number generator. The musical tone signal generating device described above. 4. The musical tone signal generating device according to claim 3, wherein the random number range specifying means specifies a range of random numbers according to the type of selected tone color. 5. The musical tone signal generating device according to claim 3 or 4, wherein the random number range specifying means switches the range of random numbers to be specified in accordance with the passage of time from the start of sound generation of musical tones. 6. The waveform switching control means includes a sequence control means for controlling the musical waveforms to be switched in a predetermined order, and a selection means for selecting one of the output of the sequence control means and the output of the random control means. The musical tone signal generating device according to claim 1, wherein switching control of musical sound waveforms is performed based on the selected output. 7. The musical tone signal generating device according to claim 6, wherein the selection means switches the selection state according to the passage of time from the start of sound generation of the musical tone. 8. The random control means includes a random data generation means for generating random number data, a selection means for selecting output data of the random data generation means at a predetermined timing, and a plurality of sequence data for instructing the switching order of the musical sound waveforms. and a sequence storage means for storing a set of sequence data and selectively reading out a predetermined set of sequence data according to the value of the random number data selected by the selection means. Device. 9 musical sound waveform forming means for forming a musical sound waveform having a shape determined by the parameters and forming the musical sound waveform in accordance with a phase specified by the phase data; parameter storage means that stores the parameters that determine the shape of the musical sound waveform; phase data generation means that generates the phase data that changes according to the frequency of the musical sound to be generated and supplies it to the musical sound waveform forming means; a waveform switching control means for temporally switching and specifying a tone waveform to be formed by the tone waveform forming means, reading out the parameters corresponding to the specified tone waveform from the parameter storage means, and applying the parameters to the tone waveform forming means; A musical tone signal generating device comprising random control means for randomly controlling the switching order of musical waveforms by the waveform switching control means. 10 The parameters include relative amplitude coefficients of each harmonic including the fundamental wave, and the musical waveform forming means controls and synthesizes each harmonic signal generated according to the phase data with the corresponding relative amplitude coefficient. 10. The musical tone signal generating apparatus according to claim 9, wherein the musical tone signal generating apparatus forms the musical sound waveform by. 11. The parameter comprises a filter coefficient, and the musical waveform forming means includes means for generating a sound source waveform signal according to the phase data, and a filter characteristic is set according to the filter coefficient given as the parameter, 10. The musical tone signal generating apparatus according to claim 9, further comprising a filter circuit that controls the tone source waveform signal according to this characteristic.