JPH03148703A - Sample value controller - Google Patents

Sample value controller

Info

Publication number
JPH03148703A
JPH03148703A JP28810789A JP28810789A JPH03148703A JP H03148703 A JPH03148703 A JP H03148703A JP 28810789 A JP28810789 A JP 28810789A JP 28810789 A JP28810789 A JP 28810789A JP H03148703 A JPH03148703 A JP H03148703A
Authority
JP
Japan
Prior art keywords
signal
deviation
time
control
integration constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28810789A
Other languages
Japanese (ja)
Inventor
Takashi Murata
崇 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP28810789A priority Critical patent/JPH03148703A/en
Publication of JPH03148703A publication Critical patent/JPH03148703A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To respectively suppress the amplitude of fluctuation, which is like vibration to be generated in a control system, and settling time with a small amplitude in a short time by updating an integration constant corresponding to the cumulative value of control deviation with the passage of time. CONSTITUTION:In an integration operation part 13, an integration constant generation part 14 is provided to output a signal 14a expressing an integration constant Kio with a value corresponding to a cumulative value SIGMAEi with the passage of time for deviation Ei expressed by an output signal 7a of a deviation cumulating part 7, and an integration constant multiplying part 15 is provided to update the already stored integration constant to the integration constant Kio expressed by the signal 14 when the signal 14a is inputted, and to output an integration operation signal 15a expressing a product between this updated integration constant and the deviation cumulative value. In such a case, when the control deviation is rapidly increased, the cumulative value of this control deviation with the passage of time is rapidly increased and accordingly, integrating time is rapidly updated in large order. Thus, the amplitude of the fluctuation, which is like vibration to be generated in a control amount, and the settling time can be respectively made small and short.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、R体の積算流貴のような経時的積算量を所定
値になるよ5に制御する場合に用いて好都合なPI動作
のサンプル値制御装置、峙vc醐定値に大きい変動01
生じた場合でも良好な制御を行うことができる制御装置
をIc関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is a method of PI operation that is convenient for use when controlling an integrated amount over time, such as the integrated flow rate of an R body, to a predetermined value. Sample value control device, large fluctuation in VC constant value 01
Ic relates to a control device that can perform good control even when such occurrence occurs.

〔従来の技術〕[Conventional technology]

第2図は従来のサンプル値制御装置の構成図である。図
において、lはアナログ信号としての設定信号8vを所
定のサン119シグ鴫期τでサンプリングする井ンプラ
、2はプロセス36%出力する制御量3aを測定してそ
の結果としてのTナログ測定信号Pvを出力する測定部
。4はサンプラlのサンプリング動作に周期し′Cli
1期τで信号Pvをサンアー1ングするサンプラで、5
はサンプラlでサンプリングされた信号Svのサンプル
値とサンプラ4でサンアI−ングされた信号Pvのサン
プル値との減算を行ってこの減算結果としての偏差B1
を表す偏差信号5mを出力するようにした偏−差演算部
である。6は偏差信号5mが入力され。
FIG. 2 is a block diagram of a conventional sample value control device. In the figure, 1 is an input signal that samples the setting signal 8v as an analog signal at a predetermined period of 119 sig, and 2 is a T analog measurement signal Pv that measures the control amount 3a that outputs 36% of the process. Measuring section that outputs. 4 is periodic to the sampling operation of sampler l; 'Cli
A sampler that samples the signal Pv in the first period τ, 5
subtracts the sample value of the signal Sv sampled by the sampler I and the sample value of the signal Pv sampled by the sampler 4, and calculates the deviation B1 as a result of this subtraction.
This is a deviation calculation section that outputs a deviation signal 5m representing the difference. 6, a deviation signal of 5m is input.

かつ信号586%表す偏差Eiと内蔵の予め定められた
比例定数Kp−との積Kp@Biを表す比例動作信号6
1を出力する比例動作信号7は偏差信号5aが入力され
、かつ周期τごとく入力される信号5aのそれぞれが表
す偏差Elを順次加算してその結果としての経時的累積
値ΣBMを表す信号7aを出力する偏差累積部、8は信
号7aが入力されろと予め記憶させられている積分定数
KMと信号7aが表す偏差累積値ΣE!との積Kl・Σ
Elを表す積分動作信号gaを出力する積分定数乗算部
で、9は偏差累積部7と乗算部8とからなる積分動作部
である。10は比例動作信号6aと積分動作信号8aと
の和の信号を操作信号10aとして出力するよってした
信号加算部で、第2図においては操作信号10aがプロ
セス3に入力すわるとこのプロセス3が信号103に応
じた動作を行って前述の制御111量3aを出力するよ
うになっている。11はプロセス3を除く図示の各部か
らなるサンプル値制御装置である。
and a proportional operation signal 6 representing the product Kp@Bi of the deviation Ei representing signal 586% and a built-in predetermined proportionality constant Kp-.
The proportional operation signal 7 that outputs 1 is inputted with the deviation signal 5a, and the signal 7a representing the cumulative value ΣBM over time is obtained by sequentially adding the deviations El represented by the signals 5a inputted every period τ. A deviation accumulator 8 outputs an integral constant KM which is stored in advance so that the signal 7a is inputted, and the deviation cumulative value ΣE! represented by the signal 7a. The product Kl・Σ
An integral constant multiplication section outputs an integral operation signal ga representing El, and 9 is an integral operation section consisting of a deviation accumulation section 7 and a multiplication section 8. Reference numeral 10 denotes a signal adder which outputs the sum of the proportional operation signal 6a and the integral operation signal 8a as the operation signal 10a. In FIG. 103 to output the aforementioned control 111 quantity 3a. Reference numeral 11 denotes a sample value control device consisting of the various parts shown in the figure except for process 3.

第2図においては、操作信号10 a 6”−プロセス
3に入力されることによって該信号10aがプロセス3
.測定部2.サンプラ4及び偏差演算部5を順次介して
偏差Eiを零にするように制御装置1101構成されて
いるので、この制御装置11によって制御量3a6%設
定信号svvc応じた値に制御されることは明らかであ
り、また。この場合。
In FIG. 2, the signal 10a is input to the process 3 by inputting the operation signal 10a6'' to the process 3.
.. Measuring part 2. Since the control device 1101 is configured to make the deviation Ei zero through the sampler 4 and the deviation calculating section 5 sequentially, it is clear that the control device 11 controls the control amount 3a6% to a value according to the setting signal svvc. And also. in this case.

偏差累積値Σ13iが零にならない限りプロセス3に零
でない操作信号101が与えられて制御量3aK対する
制5IIO1行われるので、液体の瞬時fillとして
の制御量31を制御することとよって該流体の積算流量
な所定値に制御したい場合等にこの制御111装置I!
を用いると好都合であることol明らかである。
As long as the deviation cumulative value Σ13i does not become zero, a non-zero operation signal 101 is given to the process 3 to control the control amount 3aK. This control 111 device I! is used when you want to control the flow rate to a predetermined value.
It is clear that it is convenient to use

〔発明01解決しようとする課題〕 第2図においては制御装置116%上述のように構成さ
れているうえ、さらに、この場合、プロセス3に加えら
れる外乱12等によって生じると考えられる偏差Eiの
最大値Efflを予め想定して、このような大きい偏差
Emが生じた場合でも制御装置11の動作によって制御
量311に生じる振動的な変動の振幅並び【整定時間6
”−それぞれできるだけ小さくかつ短くなるようで前述
の比例定数Kp並びに積分定数に16;設定されている
。した01って、この制御装置11には、制御量3aK
偏差BiをHm以上にするような変化01生じた場合、
該制脚装置l!の動作によって制御量3aK生じる撮動
的な変動の振幅並びに整定時間0″−それぞれ大きくか
つ長くなって、制御量31に対する制御が効果的に行え
ないという間苅点01あることになる。
[Problem to be solved by invention 01] In Fig. 2, the control device 116% is configured as described above, and furthermore, in this case, the maximum deviation Ei that is considered to be caused by the disturbance 12 etc. applied to the process 3 is Assuming the value Effl in advance, even if such a large deviation Em occurs, the amplitude arrangement of the oscillatory fluctuations caused in the controlled variable 311 by the operation of the control device 11 [Settling time 6
”-The above-mentioned proportional constant Kp and integral constant are set to 16; in order to make each of them as small and short as possible.
If a change 01 occurs that makes the deviation Bi more than Hm,
The leg restraint device! The amplitude and settling time 0'' of photographic fluctuations caused by the control amount 3aK become larger and longer due to the operation of the control amount 3aK, and there is a point 01 at which the control amount 31 cannot be effectively controlled.

本発明の目的は、制@@3RK予測外の大きい変動が生
じても、+シプル値制闘装置の制圓動作のために該制御
量虻発生する振動的な変動の振幅及び整定時間をそれぞ
れ小さい振幅でかつ短い時間に抑制すること01できる
ようにすることにある。
The object of the present invention is to control the amplitude and settling time of the oscillatory fluctuations generated in order to suppress the fluctuations of the +sipple value suppressing device, even if large fluctuations that are not predicted occur. The object is to be able to suppress the noise with a small amplitude and in a short period of time.

(al!!題を解決するための手段〕 上記目的を達成するため、本発明によれば、所定のサン
プリング周期で採吹された廿ンブル値としての制御偏差
を表す偏差信号が入力されかつ前記劃−偏差と内蔵の比
例定数との積を表す比例動作信号を出力する比例動作部
と、前記偏差信号が入力されかつ前記制御偏差の経時的
累積値とこの経時累積値に応じて更新された内蔵の積分
定数との積を表す積分動作信号を出力する積分動作部と
を備え、前記比例動作信号と前記積分動作信号との和の
信号を操作信号として出方するようにサンプル値制御装
置を構成する。
(Means for Solving the Problem) In order to achieve the above object, according to the present invention, a deviation signal representing a control deviation as a multiple value taken at a predetermined sampling period is input, and a proportional operation section that outputs a proportional operation signal representing the product of the deviation and a built-in proportional constant; an integral operation section that outputs an integral operation signal representing a product with a built-in integral constant, and a sample value control device configured to output a signal of the sum of the proportional operation signal and the integral operation signal as an operation signal. Configure.

〔作用〕[Effect]

上記のように構成すると、制御偏差が急増した場合この
劃−偏差の経時的累積値が急増することによって積分時
間が急激に大きい値に更新されて。
With the above configuration, when the control deviation increases rapidly, the cumulative value of the deviation over time increases rapidly, and the integration time is suddenly updated to a large value.

この結果操作信号によって制御偏差の増大に対する強い
引き戻し動作が行われるようにflJ分動作部を形成す
ることができるので、制Sa差に予測外の大きい変動つ
1発生してもその際とこのサンプル値制御装置の制闘動
作によって制@lHt”生じる撮動的な変動の振幅並び
に整定時間をそれぞれ小さくかつ短くすることができる
すνプル値制御装置01得られることになる。
As a result, it is possible to form the flJ operation section so that a strong pullback operation is performed in response to an increase in control deviation according to the operation signal. It is possible to obtain the ν pull value control device 01 which can reduce and shorten the amplitude and settling time of photographic fluctuations caused by the braking operation of the value control device.

〔11権例〕 第1図は本発明の一実施例の構成図である。図において
、第2図と異なる所は、lll述の積分動作部9に対応
した積分動作部13に、偏差累積部7の出力信号7aが
入力されかつ該信号7mが表す偏差Eiの経時的累積値
ΣELK応じた値の積分定数Kioを表す信号14aを
出力する積分定数生成部14と、信号7aと148とが
入力されかつ信号1411が入力されると既に記憶して
いる積分定数を信号14mが表す積分定数KiOK更新
してこの更新した積分定数と入力信号7mが表す偏差累
積値との積に10・ΣBiを表す積分動作信号15aを
出力する積分定数乗算部15と01設けられて。
[Eleventh Example] FIG. 1 is a block diagram of an embodiment of the present invention. In the figure, the difference from FIG. 2 is that the output signal 7a of the deviation accumulation section 7 is input to the integral operation section 13 corresponding to the integration operation section 9 mentioned above, and the deviation Ei represented by the signal 7m is accumulated over time. When the integral constant generator 14 outputs the signal 14a representing the integral constant Kio having a value corresponding to the value ΣELK, and when the signals 7a and 148 are input and the signal 1411 is input, the signal 14m generates the already stored integral constant. An integral constant multiplier 15 and 01 are provided for updating the integral constant KiOK and outputting an integral operation signal 15a representing 10·ΣBi as the product of the updated integral constant and the cumulative deviation value represented by the input signal 7m.

偏差累積部7と積分定数生成部14と積分定数乗算部1
5とで上述の積分動作部1−fFが構成されていること
と、信号6@と15aとの和の信号である操作信号16
1Iを出力する。#1述の信号加算部10に対応した信
号加算部16と61設けられていることである。そうし
て、wL1図における17はプロセス3を除く図示の各
部からなるサンプ、Iし値制御装置を示している。
Deviation accumulator 7, integral constant generator 14, and integral constant multiplier 1
5 constitutes the above-mentioned integral operation section 1-fF, and the operation signal 16 is the sum of the signals 6@ and 15a.
Outputs 1I. Signal adders 16 and 61 corresponding to the signal adder 10 described in #1 are provided. Reference numeral 17 in the wL1 diagram indicates a sump and I value control device comprising each of the illustrated parts except for process 3.

サンプル値制御装置17Cおいては各部0仕述のように
構成されているうえ、さらvc、偏差累積値ΣEiが大
きくなると積分定数乗算部146%Σ町−に応じた大き
い積分定数Kioを生成して、この結果操作信号16m
lが、プロセス3.a定部2.サン1う4及び偏差演算
部5を順次介して、制御偏差Biに対して積分定数Ki
oに対応した強い引き −戻し動作を行うととになるよ
うに各部b=構成されている。した01って、この制御
装置17によれば。
In the sample value control device 17C, each part is configured as described above, and furthermore, when the cumulative deviation value ΣEi increases, the integral constant multiplier 17C generates a large integral constant Kio corresponding to 146% Σ. As a result, the operation signal 16m
l is the process 3. a fixed part 2. The integral constant Ki is calculated for the control deviation Bi through the input circuit 1 to 4 and the deviation calculation section 5 in sequence.
Each part b is configured so that when a strong pull-return operation corresponding to o is performed, the parts b=. 01, according to this control device 17.

制御量3aに偏差Eiを前述のErn以上にするような
変化01生じても、その場合に制御装置1フの動作によ
って制御11@311に生じる振動的な変動の振幅並び
に整定時間をそれぞれ小さい振幅でかつ短い時間に抑制
することができることになる。
Even if a change 01 occurs in the control amount 3a that makes the deviation Ei greater than the Ern described above, in that case, the amplitude of the oscillatory fluctuation caused in the control 11@311 due to the operation of the control device 1F and the settling time are both small amplitudes. This means that it can be suppressed in a large amount of time and in a short period of time.

なお、上述の実権例においてはサンプラlとサンアラ4
とを設けたb%、本発明においては、これらのサンプラ
1.4を省略し、かつ偏差演算部5を設定信号Svと測
定信号PVとの差を演算してその精巣としてのアナログ
偏差信号を出力するように構成し、かつこのアナログ偏
差信号を周期τでサンプリングするサンプラを設けて、
このサンプラの出力信号を比例動作部6と積分動作部1
3とに入力するよ5[しても差し支えない。
In addition, in the above-mentioned actual example, sampler 1 and sampler 4
In the present invention, these samplers 1.4 are omitted, and the deviation calculating section 5 calculates the difference between the setting signal Sv and the measurement signal PV to obtain an analog deviation signal as the testis. A sampler configured to output the analog deviation signal and sampling the analog deviation signal at a period τ is provided.
The output signal of this sampler is transferred to the proportional operation section 6 and the integral operation section 1.
You can enter 3 and 5.

【発明の効果] 上述したように、本発明においては、所定のサンプリン
グ闇期で採吹されたす、ンプル値としての制関偏差を表
す偏差信号が入力されかつ制御偏差と内蔵の比例定数と
の積を表す比例動作信号を出力する比例動作部と、偏差
信号が入力されかつ制御偏差の経時的累積値とこの経時
的累積値に応じて更新された内蔵の積分定数との積を表
す積分動作信号を出力する積分動作部とを備え、比例動
作信号と積分動作信号との和の信号を操作信号として出
力するよ5にサンプル値制御装置を構成した。
[Effects of the Invention] As described above, in the present invention, a deviation signal representing a restriction deviation as a sample value taken during a predetermined sampling dark period is input, and a control deviation and a built-in proportionality constant are input. A proportional operation section that outputs a proportional operation signal representing the product of The sample value control device 5 is provided with an integral operation section that outputs an operation signal, and outputs a signal that is the sum of the proportional operation signal and the integral operation signal as an operation signal.

このため、上記のように構成すると、制御偏差6”−f
i増した場合この制御偏差の経時的累積値が急増するこ
とによって積分時間が急激に大きい値に更新されて、こ
の結果操作信号によって制脚偏差の増大に対する強い引
き戻し動作01行われるように積分動作部を形成するこ
とができるので、本発明には、制御偏差に予―外の大き
い変動が発生してもその際にこのサンプル値制御装置の
制御動作によって制御量に生じる振動的な変動の機幅並
びに整定時間をそれぞれ小さくかつ短くすること6”−
できるサンプル値制御装置が得られる効果がある。
Therefore, when configured as above, the control deviation is 6"-f
When i increases, the cumulative value of the control deviation over time rapidly increases, and the integration time is rapidly updated to a larger value.As a result, the operation signal causes the integration operation to be performed so that a strong pullback operation 01 is performed in response to the increase in the control deviation. Therefore, even if an unexpectedly large fluctuation occurs in the control deviation, the present invention eliminates the possibility of an oscillatory fluctuation occurring in the controlled variable due to the control operation of the sample value control device. Make the width and settling time smaller and shorter 6”-
This has the effect of providing a sample value control device that can be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の構成図。 諾2図は従来のサンプル値制御装置の構成図である。 5a・・・・−偏差信号、6・・・・・・比例動作部、
 6a・・・・・・比例動作信号、811、151−−
−−−−積分動作信号、9.13・・・・・・積分動作
信号10al 16a−−−−−−操作信号、11゜1
フー・・・・・サンプル値制御装置、Ei・−・・・・
制御偏差。
FIG. 1 is a configuration diagram of an embodiment of the present invention. Figure 2 is a block diagram of a conventional sample value control device. 5a...-deviation signal, 6...proportional action section,
6a...Proportional operation signal, 811, 151--
----- Integral operation signal, 9.13... Integral operation signal 10al 16a------ Operation signal, 11°1
Hu... Sample value control device, Ei...
Control deviation.

Claims (1)

【特許請求の範囲】[Claims] 1)所定のサンプリング周期で採取されたサンプル値と
しての制御偏差を表す偏差信号が入力されかつ前記制御
偏差と内蔵の比例定数との積を表す比例動作信号を出力
する比例動作部と、前記偏差信号が入力されかつ前記制
御偏差の経時的累積値とこの経時的累積値に応じて更新
された内蔵の積分定数との積を表す積分動作信号を出力
する積分動作部とを備え、前記比例動作信号と前記積分
動作信号との和の信号を操作信号として出力することを
特徴とするサンプル値制御装置。
1) A proportional operation section that receives a deviation signal representing a control deviation as a sample value taken at a predetermined sampling period and outputs a proportional operation signal representing the product of the control deviation and a built-in proportionality constant; an integral operation section to which a signal is input and outputs an integral operation signal representing the product of the cumulative value of the control deviation over time and a built-in integral constant updated according to the cumulative value over time; A sample value control device characterized in that a signal that is the sum of the signal and the integral operation signal is output as an operation signal.
JP28810789A 1989-11-06 1989-11-06 Sample value controller Pending JPH03148703A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28810789A JPH03148703A (en) 1989-11-06 1989-11-06 Sample value controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28810789A JPH03148703A (en) 1989-11-06 1989-11-06 Sample value controller

Publications (1)

Publication Number Publication Date
JPH03148703A true JPH03148703A (en) 1991-06-25

Family

ID=17725892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28810789A Pending JPH03148703A (en) 1989-11-06 1989-11-06 Sample value controller

Country Status (1)

Country Link
JP (1) JPH03148703A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50154683A (en) * 1974-06-06 1975-12-12
JPS63115202A (en) * 1986-10-31 1988-05-19 Mitsubishi Electric Corp Feedback process controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50154683A (en) * 1974-06-06 1975-12-12
JPS63115202A (en) * 1986-10-31 1988-05-19 Mitsubishi Electric Corp Feedback process controller

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