JP2809849B2 - 2-DOF adjustment device - Google Patents

2-DOF adjustment device

Info

Publication number
JP2809849B2
JP2809849B2 JP23764390A JP23764390A JP2809849B2 JP 2809849 B2 JP2809849 B2 JP 2809849B2 JP 23764390 A JP23764390 A JP 23764390A JP 23764390 A JP23764390 A JP 23764390A JP 2809849 B2 JP2809849 B2 JP 2809849B2
Authority
JP
Japan
Prior art keywords
target value
value
calculation
difference
target
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP23764390A
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Japanese (ja)
Other versions
JPH04117501A (en
Inventor
和男 広井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23764390A priority Critical patent/JP2809849B2/en
Priority to DE69114623T priority patent/DE69114623T2/en
Priority to EP91308139A priority patent/EP0474492B1/en
Priority to AU83656/91A priority patent/AU625714B2/en
Priority to CN91109572A priority patent/CN1045669C/en
Priority to KR1019910015624A priority patent/KR950009526B1/en
Priority to US07/757,011 priority patent/US5245529A/en
Publication of JPH04117501A publication Critical patent/JPH04117501A/en
Application granted granted Critical
Publication of JP2809849B2 publication Critical patent/JP2809849B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、目標値フィルタ手段を用いた2自由度P1ま
たはPID(P:比例,I:積分,D:微分)調節装置に係わり、
特に制御対象への外乱に対する抑制特性および目標値変
化に対する追従特性を同時に最適化する一方、目標値の
変化に対し速応性をもたせた2自由度調節装置に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to two-degree-of-freedom P1 or PID (P: proportional, I: integral, D: derivative) adjustment using a target value filter means. Related to the device,
In particular, the present invention relates to a two-degree-of-freedom adjustment device that simultaneously optimizes a suppression characteristic for disturbance to a control target and a follow-up characteristic for a change in a target value, and has a quick response to a change in a target value.

(従来の技術) 従来の目標値フィルタ形2自由度PI調節装置は第4図
に示すように構成されている。すなわち、この調節装置
は、目標値SVを目標値フィルタ手段1に導入し、比例ゲ
インを2自由度化する演算処理を行って演算目標値SV0
を得た後、この演算目標値SV0と制御対象2からの制御
量PVとを偏差演算手段3に導いて(SV0−PV)なる演算
により偏差Eを求める。さらに、偏差演算手段3で求め
た偏差Eを、KP{1+1/(T1・S)}なる伝達関数をも
つPI調節手段4に導き、ここでPI調節演算を行って操作
信号MVを得る。そして、この操作信号MVと外乱Dとを加
算手段5で加算合成した後、制御対象2に印加すること
により演算目標値SV0=制御量PVとなるように制御する
構成である。なお、上式においてKPは比例ゲイン、TI
積分時間、Sはラプラス演算子である。
(Prior Art) A conventional target value filter type two-degree-of-freedom PI adjustment device is configured as shown in FIG. That is, the adjusting device introduces the target value SV into the target value filter means 1 and performs a calculation process for making the proportional gain two degrees of freedom, thereby performing the calculation target value SV 0.
After obtaining, seek led to this operation target value SV 0 and the controlled variable PV from the control object 2 to the deviation operation means 3 (SV 0 -PV) becomes operational by the deviation E. Further, the deviation E obtained by the deviation calculation means 3 is led to a PI adjustment means 4 having a transfer function of K P {1 + 1 / (T 1 · S)}, where a PI adjustment calculation is performed to obtain an operation signal MV. . Then, the operation signal MV and the disturbance D are added and synthesized by the adding means 5 and then applied to the control target 2 so that the calculation target value SV 0 is controlled to be equal to the control amount PV. Note that K P In the above equation proportional gain, T I is the integral time, S is a Laplace operator.

一方、前記目標値フィルタ手段1は、外部から導入す
る目標値SVに対して比例ゲインの2自由度化係数αを乗
算する乗算手段11、前記目標値SVから係数手段11の出力
を減算する減算手段12、この減算手段12の出力について
積分時間を時定数とする1次遅れ演算を行って出力する
1次遅れ要素13、この1次遅れ要素13の出力と前記係数
手段11の出力とを加算合成して演算目標値SV0を得る加
算手段14等によって構成されている。
Meanwhile, the target value filter means 1, multiplication means 1 1 for multiplying the second free cathodic coefficient proportional gain α with respect to the target value SV introduced from outside, subtracts the output of coefficient unit 1 1 from the target value SV subtracting means 1 2, the subtraction means 1 second output for time integration time constant to be first-order lag output by performing the calculation primary delay element 1 3, the first-order lag element 1 third output and said coefficient means It is constituted by a first output and additive synthesis to adding means 1 4 like to obtain a calculation target value SV 0.

従って、以上のような制御系におけるPV→MV間の伝達
関数CPM(S)、SV→MV間の伝達関数CSM(S)はそれぞ
れ、 CPM(S)=−MV/PV=KP(1+1/TI・S) …(1) CSM(S)=−MV/SV=KP(α+1/TI・S) …(2) となる。αは比例ゲインの2自由度化係数(0〜1の間
で設定可能な定数)である。ゆえに、外乱抑制特性が最
適となるようにKP、TIを決定した後、目標値追従特性が
最適となるように比例ゲインの2自由度化係数αを決定
すれば、2自由度化を達成できる。
Therefore, the transfer function C PM (S) between PV → MV and the transfer function C SM (S) between SV → MV in the above control system are respectively C PM (S) = − MV / PV = K P (1 + 1 / T I · S) ... (1) C SM (S) = - MV / SV = K P (α + 1 / T I · S) ... a (2). α is a coefficient of two degrees of freedom of the proportional gain (a constant that can be set between 0 and 1). Therefore, if K P and T I are determined so that the disturbance suppression characteristic is optimal, and then the two-degree-of-freedom coefficient α of the proportional gain is determined so that the target value tracking characteristic is optimal, the two-degree of freedom is obtained. Can be achieved.

(発明が解決しようとする課題) ところで、以上のような目標値フィルタ形2自由度調
節装置は外乱抑制特性と目標値追従特性とを同時に最適
化できる優れた特長をもっているが、目標値SVに整定す
るまでに長い時間を要する問題がある。
(Problems to be Solved by the Invention) Incidentally, the target value filter type two-degree-of-freedom adjusting device as described above has an excellent feature that the disturbance suppression characteristic and the target value follow-up characteristic can be simultaneously optimized. There is a problem that it takes a long time to settle.

そこで、この原因について検討すると、目標値フィル
タ手段1の中に少なくとも1段または2段以上の1次遅
れ要素を持っており、目標値SVをステップ状に変化させ
たとき、そのステップ変化の目標値SVがその1次遅れ要
素の影響を受けて最終値に達するまでに時間がかかるた
めである。
Considering this cause, the target value filter means 1 has at least one or two or more first-order lag elements, and when the target value SV is changed stepwise, the target of the step change is changed. This is because it takes time for the value SV to reach the final value under the influence of the first-order delay element.

さらに、1次遅れの影響について第3図の応答特性か
ら説明する。つまり、第3図は、第4図の装置において
目標値SVをステップ状に変化させたとき、係数手段11
出力である(SV・α)だけがステップ状に変化するが、
減算手段12の出力である{SV・(1−α)}は1次遅れ
要素13の影響を受けて徐々に上昇して目標値SVに近づく
ことになる。
Further, the effect of the first-order lag will be described with reference to the response characteristics in FIG. In other words, the third figure when the target value SV is changed stepwise in the apparatus of FIG. 4, but which is the output of the coefficient unit 1 1 (SV · α) is changed stepwise,
A output which subtracting unit 1 2 {SV · (1- α)} will be approached rises gradually under the influence of first order lag element 1 3 to the target value SV.

そこで、SV=X、SV0=Yとし、第4図に示す目標値
フィルタ手段1のディジタル演算式を求める。先ず、目
標フィルタ手段1の伝達関数は、 となり、この(3)式を微分方程式で表すと、 となる。ここで、この(4)式に対して、 なる関係式を代入すると、 を得ることができる。さらに、この式を変形すると、 を得ることができる。
Therefore, SV = X and SV 0 = Y, and a digital operation expression of the target value filter means 1 shown in FIG. 4 is obtained. First, the transfer function of the target filter means 1 is When this equation (3) is expressed by a differential equation, Becomes Here, for this equation (4), Substituting the relation Can be obtained. Furthermore, by transforming this equation, Can be obtained.

今、n=1の時点において目標値SVがステップ状に変
化したときは、n≧2ではxn=xn-1となるので、第3図
の応答特性は前記(6)式から、 のようになる。この(7)式においてΔtはTIに比べて
非常に小さく、また、(xn−yn-1)も小さいので、同式
の後段の値は非常に小さくなる。しかも、出力yn-1が入
力xnに接近すればする程Δynの変化は小さくなる。その
結果、出力ynは入力xnに一致するまでに相当長い時間を
要することになる。当然、この出力ynはPI調節手段4の
目標値となっているので、整定時間が非常に長くかかっ
てしまう。
Now, when the target value SV is changed stepwise at the time of n = 1, since the In n ≧ 2 x n = x n -1, from the response characteristic of Figure 3 is the formula (6), become that way. The (7) Delta] t is very small compared to T I In the equation, and since (x n -y n-1) is small, the subsequent value of the equation is very small. Moreover, the closer the output y n-1 approaches the input x n , the smaller the change in Δy n . As a result, the output y n would take considerable long time to match the input x n. Of course, the output y n so has become a target value of the PI regulation means 4, the settling time it takes very long.

本発明は上記実情にかんがみてなされたもので、目標
値の変化に対し従来に較べて応答時間を大幅、かつ、任
意に短縮しうる2自由度調節装置を提供することを目的
とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a two-degree-of-freedom adjusting apparatus capable of arbitrarily shortening a response time with respect to a change in a target value as compared with the related art.

[発明の構成] (課題を解決するための手段) 本発明は上記課題を解決するために、目標値フィルタ
手段が設けられ、導入される制御目標値を前記目標値フ
ィルタ手段により演算して得られる演算目標値と制御対
象からの制御量との偏差を用いて少なくともPI(P:比
例、I:積分)調整演算を実行し、この調節演算により得
られる操作信号を前記制御対象に印加する2自由度調節
装置において、前記目標値フィルタ手段に導入する制御
目標値とこの目標値フィルタ手段の演算によって得られ
る第1の演算目標値との差の絶対値または両目標値差を
取り出す手段と、予め前記絶対値差または両目標値差に
対応して0〜1の値を取るメンバーシップ関数が設定さ
れ、前記手段によって取り出した絶対値または両目標値
差に対応するメンバーシップ関数を出力するメンバーシ
ップ関数設定手段と、このメンバーシップ関数設定手段
から出力されるメンバーシップ関数と前記両目標値差と
を乗算し、得られた乗算値を用いて前記第1の演算目標
値を修正し第2の演算目標値を取り出す演算目標値修正
手段とを備え、この第2の演算目標値と前記制御対象か
らの制御量とから前記偏差を求める構成である。
[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the present invention is provided with a target value filter means, and calculates a control target value to be introduced by the target value filter means. At least PI (P: proportional, I: integral) adjustment calculation is executed using the deviation between the calculated target value and the control amount from the control target, and an operation signal obtained by this adjustment calculation is applied to the control target 2 Means for extracting an absolute value of a difference between a control target value to be introduced to the target value filter means and a first calculation target value obtained by calculation of the target value filter means, or a difference between the two target value; A membership function that takes a value of 0 to 1 corresponding to the absolute value difference or both target value differences is set in advance, and the membership function corresponding to the absolute value or both target value differences extracted by the means is set. And the membership function output from the membership function setting means is multiplied by the difference between the two target values, and the first calculated target value is calculated using the obtained multiplication value. A calculation target value correcting means for correcting and obtaining a second calculation target value, wherein the deviation is obtained from the second calculation target value and a control amount from the control target.

(作用) 従って、本発明は以上のような手段を講じたことによ
り、予め制御目標値と第1の演算目標値との差の絶対値
または制御目標値と第1の演算目標値との差である両目
標値差に対応するメンバーシップ関数が定められ、これ
ら絶対値または両目標値差を取り出した後、絶対値また
は両目標値差に対応するメンバーシップ関数を取り出し
て前記両目標値差の信号に乗算し第1の演算目標値に加
算合成し第2の演算目標値を得るようにしたので、ある
絶対値または両目標値差からメンバーシップ関数を大き
くして応答特性を上げることにより、第2に演算目標値
を強制的に制御目標値に整定できる。
(Operation) Therefore, by taking the above means, the present invention provides the absolute value of the difference between the control target value and the first calculation target value or the difference between the control target value and the first calculation target value in advance. A membership function corresponding to the difference between the two target values is determined, and after extracting these absolute values or the difference between the two target values, the membership function corresponding to the absolute value or the difference between the two target values is extracted to obtain the difference between the two target values. Is multiplied with the first calculation target value and added and synthesized with the first calculation target value to obtain the second calculation target value. Therefore, by increasing the membership function from a certain absolute value or a difference between the two target values, the response characteristic can be increased. Second, the calculation target value can be forcibly settled to the control target value.

(実施例) 以下、本発明の一実施例について第1図を参照して説
明する。なお、同図において第4図と同一部分には同一
符号を付してその詳しい説明は省略し、以下、専ら従来
装置と比較して異なる部分について説明する。すなわ
ち、本装置においては、制御目標値入力端と加算手段14
の出力端との間に減算手段11を設けとともに、この減算
手段11の出力側に絶対値手段12を設け、制御目標値SVと
目標値フィルタ手段1の出力である第1の演算目標値SV
0との差δの絶対値|δ|を取り出す構成としたこと、
また予め絶対値に対応して0〜1の値を取るメンバーシ
ップ関数m(δ)が定められ、前記絶対値手段12から得
られる絶対値|δ|に対応したメンバーシップ関数m
(δ)を出力するメンバーシップ関数設定手段13を設け
たこと、さらに前記減算手段11の出力δとメンバーシッ
プ関数m(δ)とを乗算する乗算手段14のほか、この乗
算手段14で得られた乗算値と第1の演算目標値SV0とを
加算して第2の演算目標値SVaとする加算手段15が設け
られている。
(Embodiment) An embodiment of the present invention will be described below with reference to FIG. 4, the same parts as those in FIG. 4 are denoted by the same reference numerals, and detailed description thereof will be omitted. Hereinafter, only different parts from the conventional apparatus will be described. That is, in this apparatus, the control target value input and adding means 1 4
And an absolute value means 12 provided on the output side of the subtraction means 11, so that the control target value SV and the first calculation target value SV which is the output of the target value filter means 1 are provided.
The absolute value | δ | of the difference δ from 0 is taken out,
Also, a membership function m (δ) taking a value of 0 to 1 corresponding to the absolute value is determined in advance, and a membership function m corresponding to the absolute value | δ |
A membership function setting means 13 for outputting (δ) is provided, and a multiplication means 14 for multiplying the output δ of the subtraction means 11 by the membership function m (δ) is provided. multiplication value and the first operational target value SV 0 and adding means 15, the second operation target value SVa by adding is provided with.

従って、以上のような実施例の構成によれば、例えば
制御目標値SVのステップ状の変化に対し、減算手段11で
制御目標値SVと第1の演算目標値SV0との差δ=SV−SV0
を求めた後、その差δを絶対値手段12と乗算手段14に送
出する。この絶対値手段12では前記差δの絶対値|δ|
を求めた後、メンバーシップ関数設定手段13に導入す
る。
Therefore, according to the configuration of the embodiment as described above, for example, for the stepwise change of the control target value SV, the difference δ = SV between the control target value SV and the first calculation target value SV 0 is calculated by the subtraction means 11. −SV 0
, And sends the difference δ to the absolute value means 12 and the multiplication means 14. In the absolute value means 12, the absolute value | δ |
After that, it is introduced into the membership function setting means 13.

このメンバーシップ関数設定手段13では、前記差δ=
(SV−SV0)が本来の2自由度化の機能を阻害しない値
例えばδより小さくなったとき、その差の値δから
小さくなるに従って例えば図示する差δまでの間で例
えば指数関数的に0→1の値を取るメンバーシップ関数
m(δ)を出力し、乗算手段14に送出する。その結果、
乗算手段14では減算手段11から送られてくる徐々に小さ
くなる差信号δ(=SV−SV0)の速度よりも早い速度で
大きくなる乗算値m(δ)・δを出力することから、加
算手段15からはある時点,つまり所定の差δとなる時
点taから第3図の(ロ)に示すように応答特性が速くな
って制御目標値SVに整定することになる。
In the membership function setting means 13, the difference δ =
(SV-SV 0) when is smaller than value that does not for example [delta] 2 inhibits the function of the original two-degree-of-freedom of, between, for example, index until the difference [delta] 1 to example depicted in accordance smaller the value [delta] 2 of the difference A membership function m (δ) that functionally takes a value of 0 → 1 is output and sent to the multiplication means 14. as a result,
The multiplying means 14 outputs a multiplied value m (δ) · δ which increases at a speed higher than the speed of the gradually decreasing difference signal δ (= SV−SV 0 ) sent from the subtracting means 11, so that the addition is performed. some point from means 15, that is to settle the control target value SV in response characteristic faster as shown in the time ta that a predetermined difference [delta] 2 of FIG. 3 (b).

なお、メンバーシップ関数設定手段13等は抵抗,コン
デンサや半導体を用いてハードウェアによって実現して
もよいし、或いはコンピュータを用いてソフトウエア的
に実現してもよい。
The membership function setting means 13 and the like may be realized by hardware using a resistor, a capacitor, or a semiconductor, or may be realized by software using a computer.

次に、本発明の他の実施例について第2図を参照して
説明する。この場合も第4図と同一部分には同一符号を
付してその詳しい説明は省略し、以下、専ら異なる部分
だけについて説明する。
Next, another embodiment of the present invention will be described with reference to FIG. Also in this case, the same parts as those in FIG. 4 are denoted by the same reference numerals, and detailed description thereof will be omitted. Only different parts will be described below.

すなわち、この実施例は、第1図から絶対値手段12を
除去した構成であり、これに伴ってメンバーシップ関数
設定手段13′は制御目標値SVと演算目標値SV0との差の
正負の値に対応して別々にメンバーシップ関数m(δ)
を設定する。勿論、この正負のメンバーシップ関数m
(δ)は異なるように設定できる。
That is, this embodiment has a configuration obtained by removing the absolute value means 12 from Figure 1, the membership function setting unit 13 along with this' of the positive and negative of the difference between the control target value SV and arithmetic target value SV 0 Membership function m (δ) separately corresponding to value
Set. Of course, this positive and negative membership function m
(Δ) can be set differently.

次に、以上のように構成された装置の動作について説
明する。この装置での第2の演算目標値SVaは、 SVa=SV0+m(δ)・(SV−SV0) …(8) で表される。
Next, the operation of the device configured as described above will be described. Second arithmetic target value SVa at this device is represented by SVa = SV 0 + m (δ ) · (SV-SV 0) ... (8).

しかして、今、制御目標値SVがステップ状に変化した
とき、(SV−SV0)の差δが大きく、 δ≦δ …(9) の関係にあるので、メンバーシップ関数はm(δ)=0
となり、前記(8)式からSVa=SV0となる。つまり、目
標値フィルタ手段1の伝達関数のみで定まるところの、 が第2の演算目標値として偏差演算手段3に導入され
る。従って、この場合には従来装置と全く同じ応答特性
が得られる。
When the control target value SV changes stepwise, the difference δ of (SV−SV 0 ) is large and δ 2 ≦ δ (9). Therefore, the membership function is m (δ ) = 0
Next, the SVa = SV 0 from the equation (8). That is, only the transfer function of the target value filter means 1 determines Is introduced to the deviation calculating means 3 as a second calculation target value. Therefore, in this case, the same response characteristics as those of the conventional device can be obtained.

その後、減算手段11から得られる差δがδよりも小
さくなり、 δ≦δ<δ …(11) の関係になると、メンバーシップ関数設定手段13′から
のメンバーシップ関数が0<m(δ)<1となり、前記
(8)式から、 SVa=SV0+m(δ)×(SV−SV0) …(12) となり、このSVaが第2の演算目標値として偏差演算手
段3に送出される。従って、この場合には差δが差δ
より小さくなった時点で第3図の(ロ)に示すように従
来の応答特性よりも速い応答特性となり、制御目標値SV
に近づいていく。
Thereafter, when the difference δ obtained from the subtraction means 11 becomes smaller than δ 2 and δ 1 ≦ δ <δ 2 (11), the membership function from the membership function setting means 13 ′ becomes 0 <m. (Δ) <1, and from the equation (8), SVa = SV 0 + m (δ) × (SV−SV 0 ) (12), and this SVa is used as the second calculation target value by the deviation calculation means 3. Sent out. Therefore, in this case, the difference δ is equal to the difference δ 2
At this point, the response characteristic becomes faster than the conventional response characteristic as shown in FIG.
Approaching.

さらに、減算手段11から得られる差δが小さくなり、 0≦δ<δ …(13) の関係になったとき、メンバーシップ関数がm(δ)=
1となり、前記(8)式から、 SVa=SV …(14) となり、制御目標値SVがそのまま第2の演算目標値とし
て偏差演算手段3に送出される。その結果、第2の演算
目標値は差δとなった時点tbで強制的に制御目標値SV
とするので、従来に比して非常に短い時間で整定させる
ことができる。
Further, when the difference δ obtained from the subtraction means 11 becomes smaller and the relation of 0 ≦ δ <δ 1 (13) is satisfied, the membership function becomes m (δ) =
1 and, from the equation (8), SVa = SV (14), and the control target value SV is directly sent to the deviation calculating means 3 as the second calculation target value. As a result, the second target value forcibly becomes the control target value SV at time tb when the difference δ 1 is reached.
Therefore, the setting can be performed in a very short time as compared with the related art.

従って、以上のような実施例の構成によれば、目標値
フィルタ手段1の第1の演算目標値SV0が制御目標値SV
に接近したとき、つまり両目標値の差が所定値δ以下
となったとき、第2の演算目標値SVaを目標値フィルタ
手段1の第1の演算目標値SV0からメンバーシップ関数
を用いて強制的に速く制御目標値SVに移行させるように
したので、2自由度の機能に影響を与えることなく目標
値追従時間を大幅に短縮でき、この種の2自由度調節装
置の性能を大きく向上させ得、プラント全体にちりばめ
ることによりプラント運転特性の向上に大きく貢献でき
る。
Therefore, according to the configuration of the embodiment as described above, the first calculation target value SV 0 of the target value filter means 1 is set to the control target value SV.
When approaching, that is, when the difference between both the target value has reached the predetermined value [delta] 2 or less, the membership function of the second operation target value SVa from the first operation target value SV 0 of the target value filter unit 1 employed in The control target value SV is forcibly changed to the control target value SV quickly, so that the target value follow-up time can be greatly reduced without affecting the function of two degrees of freedom, and the performance of this type of two degree of freedom adjustment device is greatly increased. Can be improved, and can be greatly contributed to improvement of plant operation characteristics by being studded throughout the plant.

なお、上記実施例では減算手段11の出力とメンバーシ
ップ関数との乗算値を加算手段15に供給するようにした
が、例えば乗算手段14を省いて乗算値に相当する値をメ
ンバーシップ関数設定手段13、13′から出力して加算手
段15に加えるようにしてもよい。また、PI調節演算につ
いて述べたが、PIDの調節演算でも同様に適用できるこ
とは言うまでもない。その他、本発明はその要旨を逸脱
しない範囲で種々変形して実施できる。
In the above embodiment, the multiplication value of the output of the subtraction means 11 and the membership function is supplied to the addition means 15, but, for example, the multiplication means 14 is omitted and the value corresponding to the multiplication value is replaced with the membership function setting means. It is also possible to output from 13 and 13 ′ and add to the adding means 15. Although the PI adjustment calculation has been described, it goes without saying that the same can be applied to the PID adjustment calculation. In addition, the present invention can be implemented with various modifications without departing from the scope of the invention.

[発明の効果] 以上説明したように本発明によれば、目標値の変化に
対し従来に較べて応答時間を大幅に短縮でき、性能向上
に大きく貢献する2自由度調節装置を提供できる。
[Effects of the Invention] As described above, according to the present invention, it is possible to provide a two-degree-of-freedom adjusting apparatus that can greatly reduce the response time to a change in a target value as compared with the related art, and greatly contributes to performance improvement.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明に係わる2自由度調節装置の一実施例を
示すブロック構成図、第2図は本発明装置の他の実施例
を示すブロック構成図、第3図は従来装置と本発明装置
を比較するための目標値変化に対する応答特性図、第4
図は従来装置のブロック構成図である。 1……目標値フィルタ手段、2……制御対象、3……偏
差演算手段、4……PIまたはPID調節手段、11……減算
手段、12……絶対値手段、13、13′……メンバーシップ
関数設定手段、14……乗算手段、15……加算手段。
FIG. 1 is a block diagram showing an embodiment of a two-degree-of-freedom adjusting device according to the present invention, FIG. 2 is a block diagram showing another embodiment of the device of the present invention, and FIG. Response characteristic diagram to target value change for comparing devices, 4th
The figure is a block diagram of the conventional device. 1 Target value filter means 2 Control object 3 Deviation calculation means 4 PI or PID adjustment means 11 Subtraction means 12 Absolute value means 13, 13 'Member Ship function setting means, 14 multiplication means, 15 addition means.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】目標値フィルタ手段が設けられ、導入され
る制御目標値を前記目標値フィルタ手段により演算して
得られる演算目標値と制御対象からの制御量との偏差を
用いて少なくともPI(P:比例、I:積分)調節演算を実行
し、この調節演算により得られる操作信号を前記制御対
象に印加する2自由度調節装置において、 前記目標値フィルタ手段に導入する制御目標値とこの目
標値フィルタ手段の演算によって得られる第1の演算目
標値との差の絶対値または両目標値差を取り出す手段
と、 予め前記絶対値差または両目標値差に対応して0〜1の
値を取るメンバーシップ関数が設定され、前記手段によ
って取り出した絶対値または両目標値差に対応するメン
バーシップ関数を出力するメンバーシップ関数設定手段
と、 このメンバーシップ関数設定手段から出力されるメンバ
ーシップ関数と前記両目標値差とを乗算し、得られた乗
算値を用いて前記第1の演算目標値を修正し第2の演算
目標値を取り出す演算目標値修正手段とを備え、 この第2の演算目標値と前記制御対象からの制御量とか
ら前記偏差を求めることを特徴とする2自由度調節装
置。
1. A target value filter means is provided, and at least PI (PI) is calculated by using a deviation between a calculation target value obtained by calculating an introduced control target value by the target value filter means and a control amount from a control target. P: proportional, I: integral) In a two-degree-of-freedom adjusting apparatus for executing an adjustment operation and applying an operation signal obtained by the adjustment operation to the controlled object, a control target value to be introduced to the target value filter means and this target Means for extracting the absolute value of the difference from the first calculation target value or the two target value differences obtained by the calculation of the value filter means, and setting a value of 0 to 1 in advance corresponding to the absolute value difference or the two target value differences. Membership function setting means for setting a membership function to be taken and outputting a membership function corresponding to the absolute value or the difference between the two target values extracted by the means; Multiplying the membership function output from the determining means by the difference between the two target values, and using the obtained multiplied value to correct the first calculation target value and extracting a second calculation target value A two-degree-of-freedom adjustment device, comprising: calculating a deviation from the second calculation target value and a control amount from the control target.
JP23764390A 1990-09-07 1990-09-07 2-DOF adjustment device Expired - Lifetime JP2809849B2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP23764390A JP2809849B2 (en) 1990-09-07 1990-09-07 2-DOF adjustment device
DE69114623T DE69114623T2 (en) 1990-09-07 1991-09-05 Control system of the type with two degrees of freedom.
EP91308139A EP0474492B1 (en) 1990-09-07 1991-09-05 Two degrees of freedom type control system
AU83656/91A AU625714B2 (en) 1990-09-07 1991-09-06 Two degrees of freedom type control system
CN91109572A CN1045669C (en) 1990-09-07 1991-09-07 Two degrees of freedom type control system
KR1019910015624A KR950009526B1 (en) 1990-09-07 1991-09-07 Two degrees of freedom type control system
US07/757,011 US5245529A (en) 1990-09-07 1991-09-09 Two degrees of freedom type control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23764390A JP2809849B2 (en) 1990-09-07 1990-09-07 2-DOF adjustment device

Publications (2)

Publication Number Publication Date
JPH04117501A JPH04117501A (en) 1992-04-17
JP2809849B2 true JP2809849B2 (en) 1998-10-15

Family

ID=17018368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23764390A Expired - Lifetime JP2809849B2 (en) 1990-09-07 1990-09-07 2-DOF adjustment device

Country Status (1)

Country Link
JP (1) JP2809849B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU6421098A (en) * 1998-03-23 1999-10-18 Adtex Inc. Control method and controller

Also Published As

Publication number Publication date
JPH04117501A (en) 1992-04-17

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