JPH03142992A - Thick film wiring board - Google Patents
Thick film wiring boardInfo
- Publication number
- JPH03142992A JPH03142992A JP28262589A JP28262589A JPH03142992A JP H03142992 A JPH03142992 A JP H03142992A JP 28262589 A JP28262589 A JP 28262589A JP 28262589 A JP28262589 A JP 28262589A JP H03142992 A JPH03142992 A JP H03142992A
- Authority
- JP
- Japan
- Prior art keywords
- input
- board
- output terminals
- thick film
- film wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 abstract description 5
- 238000003780 insertion Methods 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000006378 damage Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
本発明は、例えばハイブリッドＩＣに使用される厚膜配
線基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a thick film wiring board used, for example, in a hybrid IC.
（従来の技術）
従来から、ハイブリッドＩＣに使用される厚膜配線基板
が同一の入出力端子を有する回路を２組備える場合、各
回路の入出力端子は、例えば第２図に示すように配置さ
れる。(Prior Art) Conventionally, when a thick film wiring board used in a hybrid IC includes two sets of circuits having the same input/output terminals, the input/output terminals of each circuit are arranged as shown in FIG. 2, for example. be done.
同図において、１は基板を示している。この基板１上の
２分された各領域には、同一の入出力端子を有する回路
２−１．２−２が形成されている。In the figure, 1 indicates a substrate. Circuits 2-1 and 2-2 having the same input and output terminals are formed in each of the two areas on the substrate 1.
そして、基板１の一辺に沿って２分された各領域に、そ
れぞれ、各回路２−１．２−２の入出力端子ｖｃｃ、ｏ
ｕＬ、ｉｎ、ｇｎｄがこの並びで設けられている。Then, input/output terminals vcc, o of each circuit 2-1, 2-2 are placed in each area divided into two along one side of the board 1.
uL, in, and gnd are provided in this arrangement.
これと同様に、厚膜配！！ｊｌ板が同一の入出力端子を
有する回路を４組備える場合には、第３図に示すように
、基板１の一辺に沿って４分された各領域に、それぞれ
、各回路３−１，３−２．３−３．３−４の入出力端子
ｖｃｃ、ｏｕｔ、ｉｎ、ｇｎｄがこの並びで設けられて
いる。Similar to this, thick film distribution! ! When the jl board has four sets of circuits having the same input/output terminals, as shown in FIG. 3, each circuit 3-1, 3-2.3-3.3-4 input/output terminals vcc, out, in, and gnd are provided in this arrangement.
ところで、このような厚膜配線基板は、ハイブリッドＩ
Ｃやシステムボードなどの内に実装され、集積回路の構
成要素の一つとなる。By the way, such a thick film wiring board is a hybrid I
It is mounted in C or a system board, and becomes one of the components of an integrated circuit.
しかしながら、このような厚膜配線Ｕ板では、ハイブリ
ッドＩＣやシステムボードなどの内に実装される際に、
入出力端子が設けられた基板の−辺が、実装される位置
に対し左右逆になるいわゆる逆差しを生じる虞れがある
。そして、このような逆差しをすると、ハイブリッドＩ
Ｃを破壊するという問題を生じる。However, when such a thick film wiring U board is mounted inside a hybrid IC or system board,
There is a risk that the negative side of the board on which the input/output terminals are provided will be reversed from left to right with respect to the position where it is mounted, so-called reverse mounting. Then, if you insert it backwards like this, the hybrid I
This causes the problem of destroying C.
（発明が角４’決しようとする課題）
このように従来の厚膜配線基板では、ハイブリッドＩＣ
やシステムボードなどの内に実装される際に、いわゆる
逆差しを生じて、ハイブリッドＩＣを破壊するという問
題がある。(Issues to be solved by the invention) In this way, in the conventional thick film wiring board, hybrid IC
There is a problem in that when the hybrid IC is mounted on a system board or the like, it may be inserted backwards and the hybrid IC may be destroyed.
本発明は、このようなｌｊ＋Ｊ ｍを解決するために成
されたもので、逆差しによるハイブリッドＩＣの破壊を
防止することができる厚膜配線基板を提供することを目
的としている。The present invention was made in order to solve such lj+J m, and an object of the present invention is to provide a thick film wiring board that can prevent a hybrid IC from being destroyed due to being inserted backwards.
［発明の構成］
（課題を解決するための手段）
本発明は、同一の入出力端子を有する複数の回路を備え
、基板の一辺に沿った各回路毎の領域に、各回路の入出
力端子が設けられた厚膜配線基板において、前記基板の
一辺の表裏両面に、同一数の前記領域を設け、かつ基板
の表面に設けられた領域における入出力端子の並びと基
板の裏面に設けられた領域における入出力端子の並びと
が鏡面対称とされているものである。[Structure of the Invention] (Means for Solving the Problems) The present invention includes a plurality of circuits having the same input/output terminal, and the input/output terminal of each circuit is provided in an area for each circuit along one side of a substrate. In a thick film wiring board provided with a thick film wiring board, the same number of the areas are provided on both the front and back sides of one side of the board, and the arrangement of input/output terminals in the area provided on the front surface of the board and the arrangement of input/output terminals provided on the back surface of the board are The arrangement of input and output terminals in the area is mirror-symmetric.
（作 用）
本発明では、基板の一辺の表裏両面に、各回路毎に入出
力端子の設けられた領域を同−数設け、かつ基板の表面
に設けられた領域における入出力端子の並びと基板の裏
面に設けられた領域における入出力端子の並びとがｖｌ
市χ・ｌ称とされているので、本発明に係る厚膜配線基
板を彼実装側に実装する際、入出力端子の設けられた基
板の一辺が、実装される位置に対し左右逆になったとし
ても、左右逆でない場合と同一人出力端子の並びとなる
。(Function) In the present invention, the same number of areas with input/output terminals are provided for each circuit on both the front and back sides of one side of the board, and the arrangement of the input/output terminals in the area provided on the front surface of the board is the same as that of the input/output terminals. The arrangement of input and output terminals in the area provided on the back side of the board is vl
Therefore, when mounting the thick film wiring board according to the present invention on the mounting side, one side of the board on which the input/output terminals are provided should be reversed left and right relative to the mounting position. Even if the left and right sides are not reversed, the same person's output terminals will be arranged.
従って、逆差しによるハイブリッドＩＣやシステムボー
ドなどの破壊は防止される。Therefore, damage to the hybrid IC, system board, etc. due to reverse insertion is prevented.
（実施例） 以下、本発明の一実施例を図面に基づき説明する。(Example) Hereinafter, one embodiment of the present invention will be described based on the drawings.
第１図（ａ）はこの実施例に係る厚膜配線基板の表面を
示す図、同図（ｂ）はその厚膜配線基板の裏面を示す図
である。FIG. 1(a) is a diagram showing the front surface of the thick film wiring board according to this embodiment, and FIG. 1(b) is a diagram showing the back surface of the thick film wiring board.
同図（ａ）（ｂ）において、３は基板を示している。In the figures (a) and (b), 3 indicates a substrate.
また、同図（ａ）に示すように、基板３の表面上の２分
された各領域には、同一の入出力端子を有する回路４−
１，４−２が形成されている。尚、これらの回路４−１
，４−２において、５は配線パターン、６は抵抗体を示
している。In addition, as shown in FIG. 3(a), each area divided into two on the surface of the board 3 has a circuit 4--having the same input/output terminal.
1, 4-2 are formed. In addition, these circuits 4-1
, 4-2, 5 indicates a wiring pattern, and 6 indicates a resistor.
そして、基板３の表面の一辺に沿って２分された。各領
域に、それぞれ、各回路４−１，４−２の入出力端子Ｖ
ｅｅ、ＯｕＬ、ｉｎ、ｇｎｄ及びダミーの入出力端子Ｉ
ｎ、ｏｕｔ、ｖｅｃがこの並びで設けられている。Then, the substrate 3 was divided into two along one side of the surface. Input/output terminals V of each circuit 4-1, 4-2 in each area, respectively
ee, OuL, in, gnd and dummy input/output terminal I
n, out, and vec are provided in this order.
一方、同図（ｂ）に示すように、基板３の裏面上の２分
された各領域には、上記回路４と同一の入出力端子を有
する回路７−１．７−２が形成されている。On the other hand, as shown in FIG. 3B, circuits 7-1 and 7-2 having the same input and output terminals as the circuit 4 are formed in each of the two areas on the back surface of the substrate 3. There is.
そして、基板３の裏面の一辺に沿って２分された各領域
に、それぞれ、各回路７−１．７−２の入出力端子ｖｃ
ｅ、ｏｕｔ、 ｉｎ、ｇｎｄ及びダミーの入出力端子ｉ
ｎ、Ｏｕｔ、Ｖｅｅがこれとは逆の並びで設けられてい
る。Then, input/output terminals vc of each circuit 7-1, 7-2 are provided in each area divided into two along one side of the back surface of the board 3.
e, out, in, gnd and dummy input/output terminal i
n, Out, and Vee are arranged in the opposite order.
即ち、本実施例に係る厚膜配線基板では、基板３の表面
に設けられた領域における入出力端子Ｖｅｅ、Ｏｕｔ、
Ｉｎ、ｇｎｄ及びダミーの入出力端子Ｉｎ、ｏｕＬ、
ｖｅｅの並びと基板３の裏面に設けられた領域における
入出力端子ｖｃｃ、ｏｕｔ、 Ｉｎ、ｇｎｄ及びダミー
の入出力端子＋ｎ、ｏｕｔ、ｖｃｃの並びとが鏡面対称
とされている。That is, in the thick film wiring board according to this embodiment, the input/output terminals Vee, Out,
In, gnd and dummy input/output terminals In, ouL,
The arrangement of vee and the arrangement of input/output terminals vcc, out, In, gnd and dummy input/output terminals +n, out, vcc in the area provided on the back surface of the substrate 3 are mirror-symmetrical.
従って、本発明に係る厚膜配線基板をハイブリッドＩＣ
側に実装する際、入出力端子の設けられた基板３の一辺
が、実装される位置に対し左イア逆になったとしても、
左右逆でない場合と同一人出力端子の並びとなる。従っ
て、逆差しによるハイブリッドＩＣの破壊は防止される
。Therefore, the thick film wiring board according to the present invention can be used as a hybrid IC.
When mounting on the side, even if one side of the board 3 where the input/output terminals are installed is reversed to the left ear with respect to the mounting position,
The same person's output terminals are arranged in the same manner as when the left and right sides are not reversed. Therefore, destruction of the hybrid IC due to reverse insertion is prevented.
［発明の効果］
以上説明したように、本発明によれば、基板の一辺の表
裏両面に、各回路毎に入出力端子の設けられた領域を同
−数設け、かつ基板の表面に設けられた領域における入
出力端子の並びと基板の裏面に設けられた領域における
入出力端子の並びとが紐面対称とされているので、逆差
しによるハイブリッドＩＣやシステムボードなどの破壊
は防止される。[Effects of the Invention] As explained above, according to the present invention, the same number of regions with input/output terminals are provided for each circuit on both the front and back sides of one side of the board, and Since the arrangement of input/output terminals in the area provided on the back side of the board is symmetrical with respect to the string plane, destruction of the hybrid IC, system board, etc. due to reverse insertion is prevented.
第１図（ａ）は本発明の一実施例に係る厚膜配線基板の
表面を示す図、同図（ｂ）はその厚膜配線基板の裏面を
示す図、第２図及び第３図は従来の厚膜配線基板を示す
図である。
１．３・・・基板、２．４−１，４−２．７−１．７−
２・・・回路、ｖｃｃ、ｏｕｔ 、 Ｉｎ、ｇｎｄ−・
・入出力端子、５・・・配線パターン６・・・抵抗体。FIG. 1(a) is a diagram showing the front surface of a thick film wiring board according to an embodiment of the present invention, FIG. 1(b) is a diagram showing the back surface of the thick film wiring board, and FIGS. 2 and 3 are FIG. 3 is a diagram showing a conventional thick film wiring board. 1.3...Substrate, 2.4-1, 4-2.7-1.7-
2...Circuit, vcc, out, In, gnd-.
- Input/output terminal, 5... Wiring pattern 6... Resistor.
Claims (1)
辺に沿った各回路毎の領域に、各回路の入出力端子が設
けられた厚膜配線基板において、前記基板の一辺の表裏
両面に、同一数の前記領域を設け、かつ基板の表面に設
けられた領域における入出力端子の並びと基板の裏面に
設けられた領域における入出力端子の並びとが鏡面対称
とされていることを特徴とする厚膜配線基板。In a thick film wiring board that includes a plurality of circuits having the same input/output terminal, and in which the input/output terminal of each circuit is provided in an area for each circuit along one side of the board, on both the front and back sides of one side of the board. , the same number of the regions are provided, and the arrangement of the input/output terminals in the region provided on the front surface of the board and the arrangement of the input/output terminals in the region provided on the back surface of the board are mirror-symmetrical. Thick film wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28262589A JPH03142992A (en) | 1989-10-30 | 1989-10-30 | Thick film wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28262589A JPH03142992A (en) | 1989-10-30 | 1989-10-30 | Thick film wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03142992A true JPH03142992A (en) | 1991-06-18 |
Family
ID=17654958
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28262589A Pending JPH03142992A (en) | 1989-10-30 | 1989-10-30 | Thick film wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03142992A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012146945A3 (en) * | 2011-04-28 | 2013-12-05 | Sevcon Limited | Electric motor and motor controller |
-
1989
- 1989-10-30 JP JP28262589A patent/JPH03142992A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012146945A3 (en) * | 2011-04-28 | 2013-12-05 | Sevcon Limited | Electric motor and motor controller |
| US9654032B2 (en) | 2011-04-28 | 2017-05-16 | Sevcon Limited | Electric motor and motor controller |
| US10761492B2 (en) | 2011-04-28 | 2020-09-01 | Sevcon Limited | Electric motor and motor controller |
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