JPH04171897A - Tray for semiconductor device - Google Patents

Tray for semiconductor device

Info

Publication number
JPH04171897A
JPH04171897A JP2299512A JP29951290A JPH04171897A JP H04171897 A JPH04171897 A JP H04171897A JP 2299512 A JP2299512 A JP 2299512A JP 29951290 A JP29951290 A JP 29951290A JP H04171897 A JPH04171897 A JP H04171897A
Authority
JP
Japan
Prior art keywords
semiconductor devices
tray
semiconductor device
substrate
external dimensions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2299512A
Other languages
Japanese (ja)
Inventor
Kenji Uno
宇野 賢二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP2299512A priority Critical patent/JPH04171897A/en
Publication of JPH04171897A publication Critical patent/JPH04171897A/en
Pending legal-status Critical Current

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  • Supply And Installment Of Electrical Components (AREA)

Abstract

PURPOSE:To house semiconductor devices of different external dimensions in both faces of a tray for a semiconductor device and improve the efficiency of the tray by making recessions capable of housing the semiconductor devices in both faces of a substrate. CONSTITUTION:A substrate 1 of, for example, synthetic resin is shaped into a semiconductor device tray having recessions 3 and 4 capable of housing semiconductor devices 2 in both faces thereof. The recessions 3 and 4 are made in sizes corresponding to the different external dimensions of the semiconductor devices. Steps 5 are made in the periphery of the substrate 1 so that when a plurality of semiconductor device trays in which the semiconductor devices 2 are housed are piled one on top of another, the trays may not slip and the housed semiconductor devices 2 may not be overweighted. With the recessions 4 in the rear upward, semiconductor devices 6 of different external dimensions from the semiconductor devices 2 can be housed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置用トレーに関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a tray for semiconductor devices.

〔従来の技術〕[Conventional technology]

従来の半導体装置用トレーは第4図(a)。 A conventional tray for semiconductor devices is shown in FIG. 4(a).

(b)に示す様に、合成樹脂等の基板1の表面に半導体
装置2を収納可能な凹部3を設けていた。
As shown in (b), a recess 3 in which a semiconductor device 2 can be accommodated was provided on the surface of a substrate 1 made of synthetic resin or the like.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の半導体装置用トレーは、片面のみに半導
体装置を収納可能な凹部が形成されており、1種類の外
形寸法の半導体装置を収納できるが、2種類の外形寸法
を有する半導体装置を収納する為には、夫々の外形寸法
に適応した凹部を有する2種類の半導体装置用トレーが
必要となるという問題点がある。
The conventional semiconductor device tray described above has a recess that can accommodate semiconductor devices on only one side, and can accommodate semiconductor devices with one type of external dimension, but cannot accommodate semiconductor devices with two types of external dimensions. In order to do this, there is a problem in that two types of semiconductor device trays having recesses adapted to the respective external dimensions are required.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装1用トレーは、基板の表面及び裏面の
夫々に設けた異なる外形寸法を有する半導体装置を収納
するための凹部を有する。
The tray for semiconductor device 1 of the present invention has recesses provided on each of the front and back surfaces of the substrate for accommodating semiconductor devices having different external dimensions.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図(a>は、本発明の一実施例を示す平面図、第1
図(b)は第1図(a)のA−A’線断面拡大図、第2
図は本発明の半導体装1用トレーを積重ねた断面図、第
3図は本発明の半導体装置用トレーの裏面を上にした使
用例を示す断面図である。
FIG. 1 (a> is a plan view showing one embodiment of the present invention;
Figure (b) is an enlarged cross-sectional view taken along line A-A' in Figure 1 (a);
The figure is a cross-sectional view of stacked trays for semiconductor devices 1 according to the present invention, and FIG. 3 is a cross-sectional view showing an example of use of the tray for semiconductor devices according to the present invention with its back side facing up.

第1図(a)、(b)に示すように、合成樹脂等の基板
1を整形して半導体装置2を収納可能な凹部3,4を基
板1の表面及び裏面の両面に夫々設けて半導体装置用ト
レーを構成する。ここで、凹部3,4は異なる外形寸法
を有する半導体装置の夫々に対応した大きさに形成され
ている。
As shown in FIGS. 1(a) and 1(b), a substrate 1 made of synthetic resin or the like is shaped to provide recesses 3 and 4 in which a semiconductor device 2 can be accommodated on both the front and back surfaces of the substrate 1, respectively. Configure the instrument tray. Here, the recesses 3 and 4 are formed in sizes corresponding to semiconductor devices having different external dimensions.

第2図に示すように、半導体装置2を収納した半導体装
置用トレーを複数積重ねたときにトレーがずれたり、収
納した半導体装置2に加重を生じないように、基板1の
周縁部に段部5を設けている。
As shown in FIG. 2, a step is provided at the periphery of the substrate 1 to prevent the trays from shifting when a plurality of semiconductor device trays containing semiconductor devices 2 are stacked, and to prevent loads from being applied to the semiconductor devices 2 stored therein. 5 is set.

また、第3図に示すように、裏面の凹部4を上にすると
、半導体装IFIと異なる外形寸法を有する半導体装置
6を収納することができる。
Further, as shown in FIG. 3, when the recess 4 on the back surface is turned upward, a semiconductor device 6 having external dimensions different from those of the semiconductor device IFI can be accommodated.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、基板の両面に半導体装置
を収納可能な凹部を設けることにより、外形寸法の異な
る半導体装置を半導体装置用トレーの両面を使い分けて
収納でき、トレーの効率化を実現できるという効果を有
する。
As explained above, by providing recesses in which semiconductor devices can be stored on both sides of the substrate, the present invention allows semiconductor devices with different external dimensions to be stored by using both sides of the semiconductor device tray, thereby increasing the efficiency of the tray. It has the effect of being able to.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)は本発明の一実施例を示す平面図、第1図
(b)は第1図(a)のA−A’線断面拡大図、第2図
は本発明の半導体装置用トレーを積重ねた断面図、第3
図は本発明の半導体装置用トレーの裏面を上にした使用
例を示す断面図、第4図(a)、(b)は、従来の半導
体装夏用トレーの平面図及びB−B’緑断面図である。 1・・・基板、2・・・半導体装!、3.4・・・凹部
、5・・・段部、6・・・半導体装置。
FIG. 1(a) is a plan view showing an embodiment of the present invention, FIG. 1(b) is an enlarged cross-sectional view taken along line A-A' in FIG. 1(a), and FIG. 2 is a semiconductor device of the present invention. Cross-sectional view of stacked trays, 3rd
The figure is a cross-sectional view showing an example of the use of the tray for semiconductor devices of the present invention with its back side facing up, and FIGS. FIG. 1...Substrate, 2...Semiconductor device! , 3.4... recessed part, 5... step part, 6... semiconductor device.

Claims (1)

【特許請求の範囲】[Claims]  基板の表面及び裏面の夫々に設けた異なる外形寸法を
有する半導体装置を収納するための凹部を有することを
特徴とする半導体装置用トレー。
1. A tray for a semiconductor device, comprising recesses provided on each of the front and back surfaces of a substrate for accommodating semiconductor devices having different external dimensions.
JP2299512A 1990-11-05 1990-11-05 Tray for semiconductor device Pending JPH04171897A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2299512A JPH04171897A (en) 1990-11-05 1990-11-05 Tray for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2299512A JPH04171897A (en) 1990-11-05 1990-11-05 Tray for semiconductor device

Publications (1)

Publication Number Publication Date
JPH04171897A true JPH04171897A (en) 1992-06-19

Family

ID=17873548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2299512A Pending JPH04171897A (en) 1990-11-05 1990-11-05 Tray for semiconductor device

Country Status (1)

Country Link
JP (1) JPH04171897A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100596184B1 (en) * 2004-12-29 2006-07-06 한국단자공업 주식회사 Tray for PCB

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100596184B1 (en) * 2004-12-29 2006-07-06 한국단자공업 주식회사 Tray for PCB

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