JPH03141685A - Manufacture of printed circuit board - Google Patents
Manufacture of printed circuit boardInfo
- Publication number
- JPH03141685A JPH03141685A JP28053989A JP28053989A JPH03141685A JP H03141685 A JPH03141685 A JP H03141685A JP 28053989 A JP28053989 A JP 28053989A JP 28053989 A JP28053989 A JP 28053989A JP H03141685 A JPH03141685 A JP H03141685A
- Authority
- JP
- Japan
- Prior art keywords
- resist layer
- die
- punching
- layer
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 238000004080 punching Methods 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 abstract description 14
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 3
- 239000011889 copper foil Substances 0.000 abstract description 3
- 239000003973 paint Substances 0.000 abstract description 3
- 238000007650 screen-printing Methods 0.000 abstract description 3
- 229910000679 solder Inorganic materials 0.000 description 7
- 230000004907 flux Effects 0.000 description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 150000001721 carbon Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Landscapes
- Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は各ｌｆ！電子曝器に使われるプリント配線板の
製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applicable to each lf! This article relates to a method for manufacturing printed wiring boards used in electronic exposure equipment.
従来の技術
プリント配線板へ各種電子部品などを取付ける方法とし
ては５半田フロー法が一般に使用されている。この半田
フロー法全使用する際、カーボン接弘、カーボンジャン
パー、端子、後付は部品端子などには、半田やフラック
スの付着？避ける必要がある。このような場合には剥離
可能なレジスト層をプリントｌ！！ｉｌ！線板上の前記
のような必要な部分に予め形成しておき、その後、各種
電子部品を挿入し、半田フローによる半田付けを施した
後。2. Description of the Related Art The 5 solder flow method is generally used as a method for attaching various electronic components to printed wiring boards. When using this solder flow method, will there be any adhesion of solder or flux to carbon contacts, carbon jumpers, terminals, and retrofitted component terminals? Must be avoided. In such cases, print a removable resist layer! ! Il! After forming the above-mentioned necessary parts on the wire board in advance, various electronic components are inserted and soldered using solder flow.
この剥離可能なレジスト層を剥離する方法が一般に採用
されている。近年、このような用途のために、予め剥離
可能なレジスト層を付加したプリント配線板は、ますま
す増加傾向にある。A method of peeling off this peelable resist layer is generally employed. In recent years, printed wiring boards to which a removable resist layer has been added in advance have been increasingly used for such uses.
従来、この種プリント配線板の製造方法は、第２図に示
すような方法であった。第２図（２Ｌ）は従来の方法で
作られたプリント配線板の断面図であり、絶縁基板１１
上に形成された銅はく１２の回路パターン全台めた表面
上に、カーボン接点１３（例えば、カーボンペイントに
よる接点）などを形成し、このカーボン接づ、１３を含
めた表面上に剥離可能なレジスト層１４全印刷形成した
ものである。Conventionally, the method for manufacturing this type of printed wiring board has been as shown in FIG. FIG. 2 (2L) is a cross-sectional view of a printed wiring board made by a conventional method.
A carbon contact 13 (for example, a contact made of carbon paint) is formed on the surface of the entire circuit pattern of the copper foil 12 formed thereon, and this carbon contact 13 can be peeled off on the surface including the carbon contact 13. The entire resist layer 14 is formed by printing.
その後第２図（１））に示すような打抜金型１６によっ
て、外形１６や穴１７などを加工していた。Thereafter, the outer shape 16, holes 17, etc. were processed using a punching die 16 as shown in FIG. 2 (1)).
発明が解決しようとする課題
このような従来の製造方法では、第２図（ｂ）に示すよ
うに打抜加工の際、剥離可能なレジスト層１４に打抜金
型の対向面１８が当たるため、前記レジスト層１４が打
抜金型の対向面１８に密着して絶縁基板１１上から剥離
してしまうなどの不具合があった。また、打抜金型１６
の穴明ポンチ１９や外形抜ポンチ２ｏも剥離可能なレジ
スト層１４を直接打抜くため、打抜時に絶縁基板１１か
ら剥離する場合が多かった。Problems to be Solved by the Invention In such a conventional manufacturing method, as shown in FIG. 2(b), during punching, the opposing surface 18 of the punching die hits the peelable resist layer 14. However, there was a problem in that the resist layer 14 adhered closely to the opposing surface 18 of the punching die and peeled off from the insulating substrate 11. In addition, the punching die 16
Since the hole punch 19 and outline punch 2o directly punch the peelable resist layer 14, the resist layer 14 often peels off from the insulating substrate 11 during punching.
本発明はこのような課題を解決するもので、剥離可能な
レジスト層付のプリント配線板の品質の向上を図り、生
産性を大幅に向上させること全目的とするものである。The present invention is intended to solve these problems, and the overall purpose of the present invention is to improve the quality of a printed wiring board with a removable resist layer and to significantly improve productivity.
課題を解決するための手段
この課題を解決するために本発明は、回路パターンを形
成した絶縁基板上に剥離可能なレジスト層を形成する際
に、打抜加工を施す打抜金型ポンチの周囲を除いて形成
し、かつ前記レジスト層部に対向する金型面に逃し加工
を施した金型を用いて打抜加工をするものである。Means for Solving the Problems In order to solve the problems, the present invention provides a method for forming a removable resist layer on an insulating substrate on which a circuit pattern is formed. The punching process is performed using a mold which is formed by removing the resist layer part and which has a relief process on the mold surface facing the resist layer part.
作用
この製造方法によれば、剥離可能なレジスト層へ打抜加
工時に直接金型が当たることがないため、このレジスト
層は金型へ密着しない。このため、このレジスト層が加
工中に剥離することなく打抜加工を施すことができる。Effect: According to this manufacturing method, the mold does not directly contact the peelable resist layer during punching, so the resist layer does not adhere to the mold. Therefore, punching can be performed without this resist layer peeling off during processing.
実施例
以下、本発明の一実施例を第１図の図面を用いて説明す
る。第１図（＆）ば、紙フェノール銅張漬層阪の＠はく
をエツチングし、回路パターンを形成したものであり、
絶縁基板１上に＠は〈２の回路パターンが形成されてい
る。さらにこの銅はく２を含めた表面上に、カーボンペ
イントによるカーボン接点３をスクリーン印刷法にて形
成した後、剥離可能なレジスト層４を打抜ｎｏ工時の打
抜金型の穴明用のポンチ９や外形用のポンチ１０などに
当たらないようにそのポンチ９．１０の周囲を除いてス
クリーン印刷法にて形成した。なお穴明ポンチまたは外
形ポンチから剥離可能なレジスト迄の距離となる逃がし
部４′：・ま２．Ｏｆｆ１ｍ以上が望ましい。EXAMPLE Hereinafter, an example of the present invention will be explained using the drawing of FIG. Figure 1 (&) shows a circuit pattern formed by etching the paper phenol copper-clad layer Saka's @ foil.
A circuit pattern of @<2 is formed on the insulating substrate 1. Furthermore, after forming carbon contacts 3 using carbon paint by screen printing on the surface including this copper foil 2, a removable resist layer 4 is applied for making holes in the punching die during punching process. It was formed by a screen printing method except for the area around the punches 9 and 10 so as not to hit the punches 9 and 10 for the outer shape. Note that the relief portion 4' is the distance from the hole punch or contour punch to the resist that can be peeled off:・Ma2. Off1m or more is desirable.
次に第１図中）に示すように、打抜金型５で外形６及び
穴７を打抜加工する際、剥離可能なレジスト層４を形成
した部分に対向する打抜金型５の対同面８に深さ０，６
ＬＩＩｍ以上の凹部による逃がし部８′を形成した。こ
の打抜金型６を用いて打抜加工を行った結果、剥離可能
なレジスト層４に当たる金型部がないため剥離可能なレ
ジスト層４を剥離することなく打抜加工ができた。この
ように形成したプリント配線板の銅はぐ面を希硫酸など
の洗浄液で清浄にした後、プリフラックスを全面に塗布
し、抵抗やコンテ”ンサなどのチノグ部品や、リード付
の挿入部品などを半田リフローや半田フローにより、半
田付した。この後、剥離可能なレジスト層４をピンセッ
トなどを用いて剥離し、カーボン接点３全露出させた。Next, as shown in FIG. Depth 0,6 on same plane 8
A relief portion 8' was formed by a concave portion larger than LIIm. As a result of punching using this punching die 6, since there was no die part that corresponded to the peelable resist layer 4, the punching could be performed without peeling off the peelable resist layer 4. After cleaning the surface of the printed wiring board formed in this way with a cleaning solution such as dilute sulfuric acid, pre-flux is applied to the entire surface, and chinog parts such as resistors and capacitors, as well as insert parts with leads, etc. Soldering was carried out by solder reflow or solder flow. Thereafter, the removable resist layer 4 was peeled off using tweezers or the like to completely expose the carbon contacts 3.
カーボン接点３は前記レジスト層４が途中で剥れること
なく、最後まで保護されているため、フラフクスや半田
の汚れもなく清浄な面を保持していた。なお、この実施
例においてはプリント配線板の打抜カロエを上面側より
行う例を述べたが、下面、または両面でも可能である。Since the carbon contact 3 was protected until the end without the resist layer 4 peeling off midway, the carbon contact 3 maintained a clean surface free from flux and solder stains. In this embodiment, an example has been described in which the printed wiring board is punched from the top side, but it is also possible to punch the printed wiring board from the bottom side or both sides.
発明の効果
以上のような本発明によれば、剥離可能なレジスト層と
打抜金型に選択的に逃し部を設けることにより、剥離可
能なレジスト層の剥がれ不良を防止することができ、効
率よく生産することができる。Effects of the Invention According to the present invention as described above, by selectively providing relief portions in the removable resist layer and the punching die, defective peeling of the removable resist layer can be prevented and efficiency can be improved. Can be produced well.
第１図・帽、（ｂ）は本発明の一実施例によるプリント
配線板の製造方法を示す要部の断面図と打抜金型の断面
図、第２図；ａ） 、 （ｂ）け従来のプリント配線板
の製造方法を示す要部の断面図と打抜金型の断面図であ
る。
１・・・・・絶縁基板、２・・・・鋼はく、３・・・・
カーボン接点、４・・・・剥離可能なレジスト層、４′
・・・・・逃がし部、６・・・・・打抜金型、６・・・
・外形、７・・・・穴、８・・・・・・打抜金型の対向
面、８′・・・・逃がし部、９・・・・・穴明用ポンチ
、１０・・・・・・外形用ポンチ。Figure 1: Figure 1; (b) is a cross-sectional view of the main parts showing a method for manufacturing a printed wiring board according to an embodiment of the present invention, and a cross-sectional view of a punching die; Figure 2: a), (b). FIG. 2 is a cross-sectional view of main parts and a cross-sectional view of a punching die showing a conventional printed wiring board manufacturing method. 1...Insulating substrate, 2...Steel foil, 3...
Carbon contact, 4...Removable resist layer, 4'
... relief part, 6 ... punching die, 6 ...
・External shape, 7... Hole, 8... Opposing surface of punching die, 8'... Relief part, 9... Hole punch, 10... ... Punch for external shapes.
Claims (1)
ト層を形成する際に、打抜加工を施す打抜金型ポンチの
周囲を除いて形成し、かつ前記レジスト層部に対向する
金型面に逃し加工を施した金型を用いて打抜加工するプ
リント配線板の製造方法。When forming a peelable resist layer on an insulating substrate on which a circuit pattern is formed, a resist layer is formed except for the area around the punch of a punching die that performs the punching process, and on the die surface facing the resist layer portion. A method for manufacturing printed wiring boards that involves punching using a mold with relief processing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28053989A JPH03141685A (en) | 1989-10-26 | 1989-10-26 | Manufacture of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28053989A JPH03141685A (en) | 1989-10-26 | 1989-10-26 | Manufacture of printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03141685A true JPH03141685A (en) | 1991-06-17 |
Family
ID=17626489
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28053989A Pending JPH03141685A (en) | 1989-10-26 | 1989-10-26 | Manufacture of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03141685A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63260194A (en) * | 1987-04-17 | 1988-10-27 | 松下電工株式会社 | Manufacture of printed wiring board |
-
1989
- 1989-10-26 JP JP28053989A patent/JPH03141685A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63260194A (en) * | 1987-04-17 | 1988-10-27 | 松下電工株式会社 | Manufacture of printed wiring board |
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