JPH03141424A - Coded data developing device - Google Patents

Abstract

PURPOSE:To develope the decoded data edited in real time to a frame buffer by performing the write of the decoded data to a line buffer and the read of the data via a processor in parallel with each other with synchronization secured via a line synchronization control part for each line. CONSTITUTION:The decoded data b1 outputted from a decoding part 2 is written into a line buffer 3 having a capacity equal to plural lines of the data b1 and also read out the buffer 3 to an editing processor 4 in parallel with each other for each line with synchronization secured via a line synchronization control part 5 for each line. The processor 4 applies the editing processes like a clipping process, etc., to the read data b1 for each line. This processed data is evolved to a frame buffer 6. Thus, it is possible to apply the editing processes including a clipping process, etc., to an original image at a high speed and in real time. Then the processed image can be developed to the buffer 6.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a coded data expansion device that decodes code-compressed image data used in printer printing, etc. and expands it into a frame buffer. .

[Conventional technology]

FIG. 6 is a block diagram showing the configuration of a conventional coded data expansion device. In the figure, 1 is a code buffer that stores coded and compressed data (hereinafter referred to as code data), and 2 is the code buffer 1. The decoding section 6 decodes the encoded data read from the decoding section 2, and is a frame buffer that expands the data decoded by the decoding section 2 (hereinafter referred to as decoded data) into a print image and stores it. In addition, a is code data input from the code buffer 1 to the decoding unit 2,
b is decoded data input from the decoding unit 2 to the frame buffer 6.

Next, the operation will be explained.

First, the original image 10 as shown in FIG. 7(a) is
For example, it is assumed that the code is compressed according to the regulations of CCITT Recommendation 7.4 G3 facsimile, etc., and stored in the code buffer 1. The decoding unit 2 sequentially reads code data a from the code buffer 1, decodes the code data a, and develops it into a print image in the frame buffer 6 as decoded data b.

That is, the decoding unit 2 directly decodes the original image 10 (stored as code data a) as shown in FIG. 7(a) stored in the code buffer 1, and Since the original image 10 is expanded as shown in FIG. 7(b), the original image 10 is reproduced as is in the frame buffer 6.

[Problem to be solved by the invention]

Since the conventional encoded data expansion device is configured as described above, the original image is decoded as it is and expanded to the frame buffer, and clipping, etc., in which only a part of the original image is extracted and written to the frame buffer, etc. When performing predetermined editing processing, the editing processing must be performed after the original image has been developed into the frame buffer, which takes time, and the editing processing must be performed while the original image is being developed into the frame buffer. Even if a request occurs, there is a problem that the editing process cannot be executed in real time.

This invention was made in order to solve the above-mentioned problems, and it is an object of the present invention to provide an encoded data expansion device that can perform editing processing such as clipping of an original image at high speed and in real time, and can expand it to a frame buffer. purpose.

[Means to solve the problem]

The coded data expansion device according to the present invention synchronizes the decoded data output from the decoding unit line by line with the line synchronization control unit, and synchronizes the decoded data output from the decoding unit into a line buffer address having a capacity for multiple lines of the decoded data. Writing to the line buffer and reading from the line buffer to a processor that performs editing processing are performed line by line in parallel, and the processor performs editing processing such as clipping on the decoded data read line by line while expanding it to the frame buffer. It was designed to do so.

[For production]

The line buffer in the second invention is a dual port R
AM is configured, and decoded data is temporarily stored line by line, and writing and reading in line units are performed in parallel while being synchronized by the line synchronization control unit, so editing processing by the processor can be performed arbitrarily. and can be executed in real time.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a diagram showing the configuration of an encoded data expansion device according to an embodiment of the present invention, and the same or equivalent parts as in the conventional encoded data expansion device (FIG. 6) are given the same reference numerals and explanations are omitted. do. In the figure, 3 is composed of a dual port RAM, and decoded data b output from the decoding unit 2,
It is assumed here that the line buffer has a capacity to store decoded data b for four lines. 4 is storage in the line buffer 3 (
5 is a processor that performs editing processing such as clipping on the decoded data b2 read out in parallel with the writing of one line of decoded data b, and outputs the edited data to the frame buffer 6; This is a line synchronization control unit that synchronizes writing of decoded data b to the line buffer 3 and reading of decoded data b2 to the processor. Further, a is code data, bl is decoded data output from the decoding unit 2, b2 is decoded data output from the line buffer 3, and C is output from the processor 4 to the frame buffer 6 after editing processing. Write data, d is the address A8 signal that notifies line switching of the decoded data b output from the decoding unit 2 to the line synchronization control unit 5, and e is the signal from the decoding unit 2 to the line synchronization control unit 5. decoded data b to be written to line buffer 3
A write strobe signal notifies the output timing for each word of l, f is a line synchronization reset signal for confirming synchronization from the processor 4 to the line synchronization control unit 5 and canceling the write wait state in the line buffer 3,
g is a line synchronization signal as a weight input from the line synchronization control unit 5 to the decoding unit 2 and as a signal requesting synchronization confirmation to the processor 4; h is a line synchronization signal from the line synchronization control unit 5 to the line buffer 3; This is a signal instructing storage and reading of decoded data b.

Next, the operation will be explained using the time chart shown in FIG.

First, as in the conventional coded data expansion device, the original image 10 is code-compressed and stored in a code buffer 1, and the decoding unit 2 sequentially reads code data a from the code buffer 1 and decodes it. The data is stored in the line buffer 3 which can store 4 lines.

At this time, when the first word data of the next line is written to the line buffer 3 (in FIG. 3, the address A8 signal d
is the signal for the first line, and the first write strobe signal e of the first line is notified), the line synchronization control unit 5 receives the line synchronization signal g (wait input) in the “ON” state from the decoding unit 2 and Output to processor 4. When the decoding unit 2 receives the line synchronization signal g (wait input) in the "ON" state, it enters a wait state, and writing of the remaining line data to the line buffer 3 is inhibited. processor 4
When it detects that this line synchronization signal g is in the “ON” state, it notifies the line synchronization reset signal f to the line synchronization control unit 5, and transfers the decoded data of the previous line that has already been written (in this case, line 0). (corresponding to the second decoded data) is read from the line buffer 3. In parallel with this, the line synchronization control unit 5, which has received the line synchronization reset signal f, outputs the line synchronization signal g in the “OFF” state, thereby canceling the wait state in the decoding unit 2, and the write strobe signal Writing of the remaining line data to the line buffer 3 is restarted in accordance with e. In this way, the line synchronization control unit 5 performs writing and reading from the line buffer 3 in parallel while synchronizing each line of the decoded data b.

The processor 4 reads the decoded data b3 from the line buffer 3 while synchronizing each line as described above, performs editing processing such as clipping on the decoded data b2, outputs the write data C, and outputs the write data C.
It will expand to.

Furthermore, FIG. 3 shows how only a portion 11 of the original image 10 (FIG. 3(a)) is developed into the frame buffer 6 (the third
It is a figure showing figure (b)).

Next, the storage state of decoded data in the line buffer 3 will be explained using FIG.

The first line data (0th line) from the decoding unit 2 is written to the line buffer 3 (Fig. 4 (a)), and the first 1 word data of the next line (lth line) is written. At this point, the decoding unit 2 that has received the line synchronization signal g enters a wait state, and writing is interrupted (FIG. 4(b)).
. Furthermore, a line synchronization reset signal f is sent from the processor 4.
is notified to the line synchronization control unit 5, the remaining line data (1st line) from the decoding unit 2 is written, and in parallel, the previous line data (0th line) that has already been written is written. ) is successively output to the processor 4 (Fig. 4(C)).
, and after the writing of the remaining line data (L line) is completed, the first one of the next line data (Line 2) is written.
At the point when the word data is written, the decoding unit 2 enters the wait state again, and the writing is interrupted (Fig. 4(d)).
).

The line buffer 3 repeats this series of operations for all line data.

Next, the operation of the processor 4 will be explained using the flowchart shown in FIG.

The processor 4 monitors the line synchronization signal g output from the line synchronization control section 5, and when it detects that the line synchronization signal g is in the "ON" state (step 5T
I) A line synchronization reset signal f is sent to the line synchronization control unit 5.
(Step 5T2). Then, the decoded data b, which has already been written from the line buffer 3,
The line data is read out, predetermined editing processing such as clipping is performed, and the write data C is output and developed in the frame buffer 6 (step 5T3). When the development is completed for all line data (step 5T4),
Finish the process.

〔Effect of the invention〕

As described above, according to the present invention, dual baud) RA
The writing of decoded data by the decoding unit into the line buffer composed of M and the reading of the decoded data by the processor that performs predetermined editing processing such as clipping are synchronized line by line by the line synchronization control unit. Since the configuration is configured so that the editing can be performed in parallel, it is possible to obtain an encoded data expansion device that can expand decoded data that has been edited and processed into a frame buffer at high speed and in real time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an encoded data expansion device according to an embodiment of the present invention, FIG. 2 is a time chart explaining the operation of the encoded data expansion device of this invention, and FIG.
FIG. 4 is an explanatory diagram illustrating how an original image is developed into a frame buffer by clipping by the processor according to the present invention, FIG. The figure is a flowchart explaining the operation of the processor in the present invention, FIG. 6 is a block diagram showing the configuration of a conventional encoded data expansion device, and FIG. 7 is a flow chart showing the configuration of a conventional encoded data expansion device. FIG. 3 is an explanatory diagram showing the state of development. In the figure, 1 is a code buffer, 2 is a decoding section, 3 is a line buffer, 4 is a processor, 5 is a line synchronization control section, and 6 is a frame buffer. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] In an encoded data expansion device that decodes code-compressed image data stored in a code buffer in a decoding unit and expands the decoded data into a frame buffer that stores the decoded data as a print image, a plurality of lines of the decoded data are a line buffer that has a capacity and writes and reads the decoded data in line units in parallel; and a line buffer that performs a predetermined editing process on the decoded data that is read out in line units from the line buffer and outputs it to the frame buffer. and a line synchronization control unit that synchronizes writing to the line buffer and reading to the processor on a line-by-line basis of the decoded data.